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@@ -0,0 +1,329 @@
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+#![cfg_attr(test, allow(unused_imports))]
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+#![cfg_attr(not(test), no_std)]
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+#![cfg_attr(not(test), no_main)]
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+#![feature(half_open_range_patterns)]
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+#![feature(exclusive_range_pattern)]
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+#![feature(destructuring_assignment)]
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+#![allow(dead_code)]
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+
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+// custom panic handler
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+#[cfg(not(test))]
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+use core::panic::PanicInfo;
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+
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+use core::{cell::RefCell, ops::DerefMut};
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+use cortex_m::interrupt::{Mutex, free};
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+use stm32l4xx_hal::{delay::Delay, device::{I2C1, TIM2, TIM7}, gpio::{
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+ Alternate, Edge, Floating, Input, OpenDrain, Output, PullUp, PushPull, AF4, PA3, PB5, PC15,
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+ }, gpio::{State, PA10, PA9}, i2c::I2c, prelude::*, rcc, rng::Rng, timer::{Timer, Event}};
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+
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+mod ds3231;
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+mod nixie;
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+mod pca9685;
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+mod tusb322;
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+
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+use nixie::*;
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+
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+type FaultLed = PC15<Output<PushPull>>;
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+static FAULT_LED: Mutex<RefCell<Option<FaultLed>>> = Mutex::new(RefCell::new(None));
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+
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+#[rtic::app(device = stm32l4xx_hal::pac, peripherals = true)]
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+const APP: () = {
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+ struct Resources {
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+ #[init(Clock::default())]
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+ clock: Clock,
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+
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+ // Late initialized resources (shared peripherals)
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+ rtc_int: PB5<Input<Floating>>,
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+ fault_int: PA3<Input<PullUp>>,
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+ i2c: I2c<I2C1, (PA9<Alternate<AF4, Output<OpenDrain>>>,PA10<Alternate<AF4,Output<OpenDrain>>>)>,
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+ refresh_timer: Timer<TIM2>,
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+ cycle_timer: Timer<TIM7>,
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+ delay_timer: Delay,
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+ rng: Rng,
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+ }
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+
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+ #[init(spawn = [start_cycle])]
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+ fn init(ctx: init::Context) -> init::LateResources {
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+ let mut dp = ctx.device;
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+ let cp = ctx.core;
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+
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+ // Consume the raw peripheral and return a new object that implements a higher level API
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+ let mut flash = dp.FLASH.constrain();
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+ let mut rcc = dp.RCC.constrain();
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+ let mut pwr = dp.PWR.constrain(&mut rcc.apb1r1);
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+
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+ // Configure clocks to run at maximum frequency off internal oscillator
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+ let clocks = rcc
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+ .cfgr
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+ .pll_source(rcc::PllSource::HSI16)
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+ .sysclk(64.mhz())
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+ .hclk(64.mhz())
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+ .pclk1(64.mhz())
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+ .pclk2(64.mhz())
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+ .hsi48(true)
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+ .freeze(&mut flash.acr, &mut pwr);
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+
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+ // Configure delay timer that operates off systick timer
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+ let mut delay_timer = Delay::new(cp.SYST, clocks);
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+
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+ // Split GPIO peripheral into independent pins and registers
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+ let mut gpioa = dp.GPIOA.split(&mut rcc.ahb2);
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+ let mut gpiob = dp.GPIOB.split(&mut rcc.ahb2);
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+ let mut gpioc = dp.GPIOC.split(&mut rcc.ahb2);
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+
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+ // Configure high voltage PSU enable pin on PA2
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+ let mut hv_enable = gpioa.pa2.into_push_pull_output_with_state(&mut gpioa.moder, &mut gpioa.otyper, State::Low);
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+
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+ // Configure serial port
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+ // let tx = gpiob.pb6.into_af7(&mut gpiob.moder, &mut gpiob.afrl);
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+ // let rx = gpiob.pb7.into_af7(&mut gpiob.moder, &mut gpiob.afrl);
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+ // let _serial = Serial::usart1(
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+ // dp.USART1,
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+ // (tx, rx),
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+ // Config::default().baudrate(115_200.bps()),
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+ // clocks,
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+ // &mut rcc.apb2,
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+ // );
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+
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+ // Configure fault LED output on PC15
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+ let fault_led = gpioc.pc15.into_push_pull_output_with_state(&mut gpioc.moder, &mut gpioc.otyper, State::Low);
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+
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+ // Store fault LED in static singleton so that it's accessible from anywhere
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+ free(|cs| {
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+ FAULT_LED.borrow(cs).replace(Some(fault_led));
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+ });
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+
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+ // Configure fault input interrupt on PA3
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+ let mut fault_int = gpioa.pa3.into_pull_up_input(&mut gpioa.moder, &mut gpioa.pupdr);
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+ fault_int.make_interrupt_source(&mut dp.SYSCFG, &mut rcc.apb2);
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+ fault_int.enable_interrupt(&mut dp.EXTI);
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+ fault_int.trigger_on_edge(&mut dp.EXTI, Edge::FALLING);
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+
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+ // Sanity check that fault pin isn't already set (active low)
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+ if fault_int.is_low().unwrap() {
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+ panic!();
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+ }
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+
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+ // Enable RNG peripheral
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+ let rng = dp.RNG.enable(&mut rcc.ahb2, clocks);
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+
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+ // Configure I2C SCL pin
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+ let scl = gpioa.pa9.into_open_drain_output(&mut gpioa.moder, &mut gpioa.otyper);
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+ let scl = scl.into_af4(&mut gpioa.moder, &mut gpioa.afrh);
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+
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+ // Configure I2C SDA pin
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+ let sda = gpioa.pa10.into_open_drain_output(&mut gpioa.moder, &mut gpioa.otyper);
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+ let sda = sda.into_af4(&mut gpioa.moder, &mut gpioa.afrh);
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+
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+ // Initialize I2C (configured for 1Mhz, but actually runs at 600kHz)
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+ let mut i2c = I2c::i2c1(dp.I2C1, (scl, sda), 1.mhz(), clocks, &mut rcc.apb1r1);
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+
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+ // Initialize TUSB322 (USB Type-C configuration chip)
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+ tusb322::init(TUSB322_ADDR, &mut i2c);
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+
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+ // Initialize DS3231 (RTC)
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+ ds3231::init(DS3231_ADDR, &mut i2c);
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+
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+ // ds3231::set_date(DS3231_ADDR, &mut i2c, ds3231::Weekday::Wednesday, 15, 9, 21, 20);
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+ // ds3231::set_time(DS3231_ADDR, &mut i2c, 00, 37, 12);
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+
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+ // Configure input interrupt pin from DS3231 on PB5
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+ // Interrupt is pulled high, with open drain on DS3231
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+ // Interrupt enable is automatically handled by RTIC's #[task]
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+ let mut rtc_int = gpiob.pb5.into_floating_input(&mut gpiob.moder, &mut gpiob.pupdr);
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+ rtc_int.make_interrupt_source(&mut dp.SYSCFG, &mut rcc.apb2);
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+ rtc_int.enable_interrupt(&mut dp.EXTI);
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+ rtc_int.trigger_on_edge(&mut dp.EXTI, Edge::FALLING);
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+
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+ // Configure DAC AMP enable pin for AD8591 on PB1
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+ let mut _dac_enable = gpiob.pb1.into_push_pull_output_with_state(&mut gpiob.moder, &mut gpiob.otyper, State::High);
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+
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+ // Configure DAC VIN for AD8591 on PA5
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+ // Note that this pin should actually be configured as analog output (for DAC)
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+ // but stm32l4xx_hal doesn't have support for the DAC as of now. We also currently
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+ // set the output to only the highest possible voltage, so the same functionality
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+ // can be achieved by configuring the pin as a digital output set to high.
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+ let mut _dac_output = gpioa.pa5.into_push_pull_output_with_state(&mut gpioa.moder, &mut gpioa.otyper, State::High);
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+
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+ // Configure PWM enable pin (active low) for PCA9685 on PA7
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+ let mut pwm_enable = gpioa.pa7.into_push_pull_output_with_state(&mut gpioa.moder, &mut gpioa.otyper, State::High);
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+
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+ // Initialize the PCA9685 display refresh timer
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+ // Interrupt enable is automatically handled by RTIC's #[task]
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+ let refresh_timer = Timer::tim2(dp.TIM2, nixie::DISPLAY_REFRESH_FPS.hz(), clocks, &mut rcc.apb1r1);
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+
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+ // Initiaize display cycle timer
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+ // Interrupt enable is automatically handled by RTIC's #[task]
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+ let cycle_timer = Timer::tim7(dp.TIM7, (1000 / nixie::CYCLE_FADE_DURATION_MS).hz(), clocks, &mut rcc.apb1r1);
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+
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+ // Small delay to ensure that PCA9685 is fully powered on before writing to it
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+ delay_timer.delay_us(10_u32);
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+
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+ // Initialize PCA9685 (PWM driver)
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+ pca9685::init(PCA9685_ALL_CALL, &mut i2c);
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+
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+ // Enable PWM output after PCA9685 has been initialized
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+ pwm_enable.set_low().unwrap();
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+
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+ // Enable the high voltage power supply last
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+ hv_enable.set_high().unwrap();
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+
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+ // Spawn tasks to cycle through all tubes on powerup
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+ ctx.spawn.start_cycle(0).unwrap();
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+ ctx.spawn.start_cycle(1).unwrap();
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+ ctx.spawn.start_cycle(2).unwrap();
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+ ctx.spawn.start_cycle(3).unwrap();
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+
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+ init::LateResources { rtc_int, fault_int, i2c, refresh_timer, cycle_timer, delay_timer, rng }
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+ }
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+
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+ #[idle(spawn = [start_cycle], resources = [delay_timer, rng])]
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+ fn idle(ctx: idle::Context) -> ! {
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+ let idle::Resources {delay_timer, rng} = ctx.resources;
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+
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+ loop {
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+ // Delay before cycling digits to prevent cathode poisoning
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+ delay_timer.delay_ms(CYCLE_REFRESH_INTERVAL * 1000);
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+
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+ // Choose a random tube to cycle
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+ let tube = (rng.get_random_data() % 4) as usize;
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+ ctx.spawn.start_cycle(tube).unwrap();
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+ }
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+ }
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+
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+ // Interrupt handler for 1HZ signal from offchip RTC (DS3231)
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+ #[task(binds = EXTI9_5, priority = 1, resources = [clock, rtc_int, i2c, refresh_timer])]
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+ fn rtc_interrupt(ctx: rtc_interrupt::Context) {
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+ let rtc_interrupt::Resources {mut clock, rtc_int, mut i2c, mut refresh_timer} = ctx.resources;
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+
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+ let (mut second, mut minute, mut hour) = (0, 0, 0);
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+ let (mut weekday, mut day, mut month) = (ds3231::Weekday::Sunday, 0, 0);
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+
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+ // Lower priority task requires a critical section to access shared peripheral
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+ i2c.lock(|i2c| {
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+ // Read new time from DS3231
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+ (second, minute, hour) = ds3231::get_time(DS3231_ADDR, i2c);
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+ (weekday, day, month, ..) = ds3231::get_date(DS3231_ADDR, i2c);
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+ });
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+
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+ // Calculate new values and account for DST
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+ let hour = if ds3231::in_dst(weekday, day, month, hour) { (hour + 1) % 12 } else { hour % 12 };
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+ let hour = if hour == 0 { 12 } else { hour };
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+
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+ // Lower priority task requires a critical section to access shared peripheral
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+ clock.lock(|clock| {
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+ // Trigger the processing of a new time value
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+ clock.rtc_tick(second, minute, hour);
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+ });
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+
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+ // Start the refresh timer to update the display
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+ // Lower priority task requires a critical section to access shared peripheral
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+ refresh_timer.lock(|refresh_timer| {
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+ refresh_timer.listen(Event::TimeOut);
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+ });
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+
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+ // Clear the interrupt flag for the timer
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+ rtc_int.clear_interrupt_pending_bit();
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+ }
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+
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+ // Interrupt handler for fault interrupt from USB monitor (TUSB322)
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+ // Configured as priority 4 for highest priority (pre-empts all other interrupts)
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+ #[task(binds = EXTI3, priority = 4, resources = [fault_int])]
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+ fn fault_interrupt(ctx: fault_interrupt::Context) {
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+ let fault_interrupt::Resources {fault_int} = ctx.resources;
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+
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+ if fault_int.check_interrupt() {
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+ fault_int.clear_interrupt_pending_bit();
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+ panic!();
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+ }
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+ }
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+
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+ // Interrupt handler for internal timer that drives display refresh rate
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+ #[task(binds = TIM2, priority = 3, resources = [clock, i2c, refresh_timer])]
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+ fn refresh_interrupt(ctx: refresh_interrupt::Context) {
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+ let refresh_interrupt::Resources {clock, refresh_timer, i2c} = ctx.resources;
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+
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+ // Compute updates for non-static digits
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+ let updated = clock.fps_tick();
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+
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+ // Write new values if values have changed, otherwise disable the refresh timer
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+ if updated {
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+ clock.write_i2c(i2c);
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+ refresh_timer.clear_interrupt(Event::TimeOut);
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+ } else {
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+ refresh_timer.unlisten(Event::TimeOut);
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+ }
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+ }
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+
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+ // Interrupt handler for internal timer that drives individual digits within a cycle sequence
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+ #[task(binds = TIM7, priority = 2, resources = [clock, refresh_timer, cycle_timer])]
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+ fn cycle_interrupt(ctx: cycle_interrupt::Context) {
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+ let cycle_interrupt::Resources {mut clock, mut refresh_timer, cycle_timer} = ctx.resources;
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+ let mut cycle_ended = true;
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+
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+ // Lower priority task requires a critical section to access shared data
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+ clock.lock(|clock| {
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+ cycle_ended = clock.cycle_tick();
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+ });
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+
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+ // Trigger the next step in the cycling sequence
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+ if cycle_ended {
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+ cycle_timer.unlisten(Event::TimeOut);
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+ } else {
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+ cycle_timer.clear_interrupt(Event::TimeOut);
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+ }
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+
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+ // Start the refresh timer to update the display
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+ // Lower priority task requires a critical section to access shared peripheral
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+ refresh_timer.lock(|refresh_timer| {
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+ refresh_timer.listen(Event::TimeOut);
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+ });
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+ }
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+
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+ // Trigger the start of a new cycle sequence
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+ #[task(resources = [clock, cycle_timer], priority = 2, capacity = 4)]
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+ fn start_cycle(ctx: start_cycle::Context, tube: usize) {
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+ let start_cycle::Resources {mut clock, cycle_timer} = ctx.resources;
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+
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+ // Lower priority task requires a critical section to access shared data
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+ clock.lock(|clock| {
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+ // Trigger the start of a cycling sequence
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+ clock.cycle_start(tube);
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+ });
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+
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+ // Start the timer to cycle through individual digits
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+ cycle_timer.listen(Event::TimeOut);
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+ }
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+
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+ // RTIC requires that unused interrupts are declared in an extern block when
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+ // using software tasks; these free interrupts will be used to dispatch the
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+ // software tasks.
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+ extern "C" {
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+ fn TSC();
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+ fn LCD();
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+ fn AES();
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+ }
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+};
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+
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+// Helper function to set onboard LED state
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+fn set_fault_led(state: State) {
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+ free(|cs| {
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+ let mut led_ref = FAULT_LED.borrow(cs).borrow_mut();
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+ if let Some(ref mut led) = led_ref.deref_mut() {
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+ match state {
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+ State::High => led.set_high().unwrap(),
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+ State::Low => led.set_low().unwrap(),
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+ };
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+ }
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+ });
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+}
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+
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+// Custom panic handler
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+#[panic_handler]
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+#[cfg(not(test))]
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+fn panic(_info: &PanicInfo) -> ! {
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+ set_fault_led(State::High);
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+ loop {
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+ continue;
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+ }
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+}
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