main.rs 1.4 KB

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  1. #![cfg_attr(test, allow(unused_imports))]
  2. #![cfg_attr(not(test), no_std)]
  3. #![cfg_attr(not(test), no_main)]
  4. // pick a panicking behavior
  5. // #[cfg(not(test))]
  6. // use panic_halt as _; // you can put a breakpoint on `rust_begin_unwind` to catch panics
  7. // use panic_abort as _; // requires nightly
  8. // use panic_itm as _; // logs messages over ITM; requires ITM support
  9. // use panic_semihosting as _; // logs messages to the host stderr; requires a debugger
  10. use core::panic::PanicInfo; // custom panic handler
  11. // use cortex_m::asm;
  12. use cortex_m_rt::entry;
  13. // use stm32l4::stm32l4x2;
  14. use stm32l4xx_hal::{prelude::*, pac, rcc};
  15. use cortex_m_semihosting::{debug, hprintln};
  16. #[cfg(not(test))]
  17. #[entry]
  18. fn main() -> ! {
  19. // asm::nop(); // To not have main optimize to abort in release mode, remove when you add code
  20. hprintln!("Hello, world!").unwrap();
  21. let peripherals = pac::Peripherals::take().unwrap();
  22. let _core = cortex_m::Peripherals::take().unwrap();
  23. let gpioa = &peripherals.GPIOA;
  24. gpioa.odr.modify(|_, w| w.odr0().set_bit());
  25. panic!();
  26. loop {
  27. // your code goes here
  28. }
  29. }
  30. #[panic_handler]
  31. #[cfg(not(test))]
  32. fn panic(_info: &PanicInfo) -> ! {
  33. hprintln!("Panic!").unwrap();
  34. loop {}
  35. }
  36. fn add(a: i32, b: i32) -> i32 {
  37. a + b
  38. }
  39. #[cfg(test)]
  40. mod test {
  41. use super::*;
  42. #[test]
  43. fn foo() {
  44. println!("tests work!");
  45. assert!(2 == add(1,1));
  46. }
  47. }