stm32l4xx_hal_uart_ex.h 41 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32l4xx_hal_uart_ex.h
  4. * @author MCD Application Team
  5. * @brief Header file of UART HAL Extended module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  10. *
  11. * Redistribution and use in source and binary forms, with or without modification,
  12. * are permitted provided that the following conditions are met:
  13. * 1. Redistributions of source code must retain the above copyright notice,
  14. * this list of conditions and the following disclaimer.
  15. * 2. Redistributions in binary form must reproduce the above copyright notice,
  16. * this list of conditions and the following disclaimer in the documentation
  17. * and/or other materials provided with the distribution.
  18. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  19. * may be used to endorse or promote products derived from this software
  20. * without specific prior written permission.
  21. *
  22. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  23. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  25. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  26. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  28. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  29. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. ******************************************************************************
  34. */
  35. /* Define to prevent recursive inclusion -------------------------------------*/
  36. #ifndef __STM32L4xx_HAL_UART_EX_H
  37. #define __STM32L4xx_HAL_UART_EX_H
  38. #ifdef __cplusplus
  39. extern "C" {
  40. #endif
  41. /* Includes ------------------------------------------------------------------*/
  42. #include "stm32l4xx_hal_def.h"
  43. /** @addtogroup STM32L4xx_HAL_Driver
  44. * @{
  45. */
  46. /** @addtogroup UARTEx
  47. * @{
  48. */
  49. /* Exported types ------------------------------------------------------------*/
  50. /** @defgroup UARTEx_Exported_Types UARTEx Exported Types
  51. * @{
  52. */
  53. /**
  54. * @brief UART wake up from stop mode parameters
  55. */
  56. typedef struct
  57. {
  58. uint32_t WakeUpEvent; /*!< Specifies which event will activat the Wakeup from Stop mode flag (WUF).
  59. This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection.
  60. If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must
  61. be filled up. */
  62. uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long.
  63. This parameter can be a value of @ref UARTEx_WakeUp_Address_Length. */
  64. uint8_t Address; /*!< UART/USART node address (7-bit long max). */
  65. } UART_WakeUpTypeDef;
  66. /**
  67. * @}
  68. */
  69. /* Exported constants --------------------------------------------------------*/
  70. /** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants
  71. * @{
  72. */
  73. /** @defgroup UARTEx_Word_Length UARTEx Word Length
  74. * @{
  75. */
  76. #define UART_WORDLENGTH_7B USART_CR1_M1 /*!< 7-bit long UART frame */
  77. #define UART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long UART frame */
  78. #define UART_WORDLENGTH_9B USART_CR1_M0 /*!< 9-bit long UART frame */
  79. /**
  80. * @}
  81. */
  82. /** @defgroup UARTEx_WakeUp_Address_Length UARTEx WakeUp Address Length
  83. * @{
  84. */
  85. #define UART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit long wake-up address */
  86. #define UART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit long wake-up address */
  87. /**
  88. * @}
  89. */
  90. #if defined(USART_CR2_SLVEN)
  91. /** @defgroup UARTEx_Slave_Select_management UARTEx Slave Select Management
  92. * @{
  93. */
  94. #define UART_NSS_HARD 0x00000000U /*!< SPI slave selection depends on NSS input pin */
  95. #define UART_NSS_SOFT USART_CR2_DIS_NSS /*!< SPI slave is always selected and NSS input pin is ignored */
  96. /**
  97. * @}
  98. */
  99. #endif
  100. #if defined(USART_CR1_FIFOEN)
  101. /** @defgroup UARTEx_TXFIFO_threshold_level UARTEx TXFIFO threshold level
  102. * @brief UART TXFIFO level
  103. * @{
  104. */
  105. #define UART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TXFIFO reaches 1/8 of its depth */
  106. #define UART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TXFIFO reaches 1/4 of its depth */
  107. #define UART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TXFIFO reaches 1/2 of its depth */
  108. #define UART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TXFIFO reaches 3/4 of its depth */
  109. #define UART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TXFIFO reaches 7/8 of its depth */
  110. #define UART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TXFIFO becomes empty */
  111. /**
  112. * @}
  113. */
  114. /** @defgroup UARTEx_RXFIFO_threshold_level UARTEx RXFIFO threshold level
  115. * @brief UART RXFIFO level
  116. * @{
  117. */
  118. #define UART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RXFIFO FIFO reaches 1/8 of its depth */
  119. #define UART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RXFIFO FIFO reaches 1/4 of its depth */
  120. #define UART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RXFIFO FIFO reaches 1/2 of its depth */
  121. #define UART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RXFIFO FIFO reaches 3/4 of its depth */
  122. #define UART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RXFIFO FIFO reaches 7/8 of its depth */
  123. #define UART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RXFIFO FIFO becomes full */
  124. /**
  125. * @}
  126. */
  127. #endif
  128. /**
  129. * @}
  130. */
  131. /* Exported macros -----------------------------------------------------------*/
  132. /* Exported functions --------------------------------------------------------*/
  133. /** @addtogroup UARTEx_Exported_Functions
  134. * @{
  135. */
  136. /** @addtogroup UARTEx_Exported_Functions_Group1
  137. * @{
  138. */
  139. /* Initialization and de-initialization functions ****************************/
  140. HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, uint32_t DeassertionTime);
  141. /**
  142. * @}
  143. */
  144. /** @addtogroup UARTEx_Exported_Functions_Group2
  145. * @{
  146. */
  147. /* IO operation functions *****************************************************/
  148. void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart);
  149. #if defined(USART_CR1_FIFOEN)
  150. void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart);
  151. void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart);
  152. #endif
  153. /**
  154. * @}
  155. */
  156. /** @addtogroup UARTEx_Exported_Functions_Group3
  157. * @{
  158. */
  159. /* Peripheral Control functions **********************************************/
  160. HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection);
  161. HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart);
  162. HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart);
  163. HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength);
  164. #if defined(USART_CR2_SLVEN)
  165. HAL_StatusTypeDef HAL_UARTEx_EnableSlaveMode(UART_HandleTypeDef *huart);
  166. HAL_StatusTypeDef HAL_UARTEx_DisableSlaveMode(UART_HandleTypeDef *huart);
  167. HAL_StatusTypeDef HAL_UARTEx_ConfigNSS(UART_HandleTypeDef *huart, uint32_t NSSConfig);
  168. #endif
  169. #if defined(USART_CR1_FIFOEN)
  170. HAL_StatusTypeDef HAL_UARTEx_EnableFifoMode(UART_HandleTypeDef *huart);
  171. HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart);
  172. HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold);
  173. HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold);
  174. #endif
  175. /**
  176. * @}
  177. */
  178. /**
  179. * @}
  180. */
  181. /* Private constants ---------------------------------------------------------*/
  182. /** @defgroup UARTEx_Private_Constants UARTEx Private Constants
  183. * @{
  184. */
  185. #if defined(USART_CR2_SLVEN)
  186. /** @defgroup UARTEx_Slave_Mode UARTEx Synchronous Slave mode
  187. * @{
  188. */
  189. #define UART_SLAVEMODE_DISABLE 0x00000000U /*!< USART SPI Slave Mode Enable */
  190. #define UART_SLAVEMODE_ENABLE USART_CR2_SLVEN /*!< USART SPI Slave Mode Disable */
  191. /**
  192. * @}
  193. */
  194. #endif
  195. #if defined(USART_CR1_FIFOEN)
  196. /** @defgroup UARTEx_FIFO_mode UARTEx FIFO mode
  197. * @{
  198. */
  199. #define UART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */
  200. #define UART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */
  201. /**
  202. * @}
  203. */
  204. #endif
  205. /**
  206. * @}
  207. */
  208. /* Private macros ------------------------------------------------------------*/
  209. /** @defgroup UARTEx_Private_Macros UARTEx Private Macros
  210. * @{
  211. */
  212. /** @brief Report the UART clock source.
  213. * @param __HANDLE__ specifies the UART Handle.
  214. * @param __CLOCKSOURCE__ output variable.
  215. * @retval UART clocking source, written in __CLOCKSOURCE__.
  216. */
  217. #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \
  218. defined (STM32L496xx) || defined (STM32L4A6xx) || \
  219. defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)
  220. #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
  221. do { \
  222. if((__HANDLE__)->Instance == USART1) \
  223. { \
  224. switch(__HAL_RCC_GET_USART1_SOURCE()) \
  225. { \
  226. case RCC_USART1CLKSOURCE_PCLK2: \
  227. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \
  228. break; \
  229. case RCC_USART1CLKSOURCE_HSI: \
  230. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  231. break; \
  232. case RCC_USART1CLKSOURCE_SYSCLK: \
  233. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  234. break; \
  235. case RCC_USART1CLKSOURCE_LSE: \
  236. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  237. break; \
  238. default: \
  239. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  240. break; \
  241. } \
  242. } \
  243. else if((__HANDLE__)->Instance == USART2) \
  244. { \
  245. switch(__HAL_RCC_GET_USART2_SOURCE()) \
  246. { \
  247. case RCC_USART2CLKSOURCE_PCLK1: \
  248. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  249. break; \
  250. case RCC_USART2CLKSOURCE_HSI: \
  251. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  252. break; \
  253. case RCC_USART2CLKSOURCE_SYSCLK: \
  254. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  255. break; \
  256. case RCC_USART2CLKSOURCE_LSE: \
  257. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  258. break; \
  259. default: \
  260. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  261. break; \
  262. } \
  263. } \
  264. else if((__HANDLE__)->Instance == USART3) \
  265. { \
  266. switch(__HAL_RCC_GET_USART3_SOURCE()) \
  267. { \
  268. case RCC_USART3CLKSOURCE_PCLK1: \
  269. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  270. break; \
  271. case RCC_USART3CLKSOURCE_HSI: \
  272. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  273. break; \
  274. case RCC_USART3CLKSOURCE_SYSCLK: \
  275. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  276. break; \
  277. case RCC_USART3CLKSOURCE_LSE: \
  278. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  279. break; \
  280. default: \
  281. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  282. break; \
  283. } \
  284. } \
  285. else if((__HANDLE__)->Instance == UART4) \
  286. { \
  287. switch(__HAL_RCC_GET_UART4_SOURCE()) \
  288. { \
  289. case RCC_UART4CLKSOURCE_PCLK1: \
  290. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  291. break; \
  292. case RCC_UART4CLKSOURCE_HSI: \
  293. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  294. break; \
  295. case RCC_UART4CLKSOURCE_SYSCLK: \
  296. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  297. break; \
  298. case RCC_UART4CLKSOURCE_LSE: \
  299. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  300. break; \
  301. default: \
  302. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  303. break; \
  304. } \
  305. } \
  306. else if((__HANDLE__)->Instance == UART5) \
  307. { \
  308. switch(__HAL_RCC_GET_UART5_SOURCE()) \
  309. { \
  310. case RCC_UART5CLKSOURCE_PCLK1: \
  311. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  312. break; \
  313. case RCC_UART5CLKSOURCE_HSI: \
  314. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  315. break; \
  316. case RCC_UART5CLKSOURCE_SYSCLK: \
  317. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  318. break; \
  319. case RCC_UART5CLKSOURCE_LSE: \
  320. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  321. break; \
  322. default: \
  323. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  324. break; \
  325. } \
  326. } \
  327. else if((__HANDLE__)->Instance == LPUART1) \
  328. { \
  329. switch(__HAL_RCC_GET_LPUART1_SOURCE()) \
  330. { \
  331. case RCC_LPUART1CLKSOURCE_PCLK1: \
  332. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  333. break; \
  334. case RCC_LPUART1CLKSOURCE_HSI: \
  335. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  336. break; \
  337. case RCC_LPUART1CLKSOURCE_SYSCLK: \
  338. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  339. break; \
  340. case RCC_LPUART1CLKSOURCE_LSE: \
  341. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  342. break; \
  343. default: \
  344. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  345. break; \
  346. } \
  347. } \
  348. } while(0)
  349. #elif defined (STM32L431xx) || defined (STM32L433xx) || defined (STM32L443xx)
  350. #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
  351. do { \
  352. if((__HANDLE__)->Instance == USART1) \
  353. { \
  354. switch(__HAL_RCC_GET_USART1_SOURCE()) \
  355. { \
  356. case RCC_USART1CLKSOURCE_PCLK2: \
  357. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \
  358. break; \
  359. case RCC_USART1CLKSOURCE_HSI: \
  360. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  361. break; \
  362. case RCC_USART1CLKSOURCE_SYSCLK: \
  363. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  364. break; \
  365. case RCC_USART1CLKSOURCE_LSE: \
  366. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  367. break; \
  368. default: \
  369. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  370. break; \
  371. } \
  372. } \
  373. else if((__HANDLE__)->Instance == USART2) \
  374. { \
  375. switch(__HAL_RCC_GET_USART2_SOURCE()) \
  376. { \
  377. case RCC_USART2CLKSOURCE_PCLK1: \
  378. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  379. break; \
  380. case RCC_USART2CLKSOURCE_HSI: \
  381. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  382. break; \
  383. case RCC_USART2CLKSOURCE_SYSCLK: \
  384. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  385. break; \
  386. case RCC_USART2CLKSOURCE_LSE: \
  387. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  388. break; \
  389. default: \
  390. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  391. break; \
  392. } \
  393. } \
  394. else if((__HANDLE__)->Instance == USART3) \
  395. { \
  396. switch(__HAL_RCC_GET_USART3_SOURCE()) \
  397. { \
  398. case RCC_USART3CLKSOURCE_PCLK1: \
  399. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  400. break; \
  401. case RCC_USART3CLKSOURCE_HSI: \
  402. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  403. break; \
  404. case RCC_USART3CLKSOURCE_SYSCLK: \
  405. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  406. break; \
  407. case RCC_USART3CLKSOURCE_LSE: \
  408. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  409. break; \
  410. default: \
  411. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  412. break; \
  413. } \
  414. } \
  415. else if((__HANDLE__)->Instance == LPUART1) \
  416. { \
  417. switch(__HAL_RCC_GET_LPUART1_SOURCE()) \
  418. { \
  419. case RCC_LPUART1CLKSOURCE_PCLK1: \
  420. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  421. break; \
  422. case RCC_LPUART1CLKSOURCE_HSI: \
  423. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  424. break; \
  425. case RCC_LPUART1CLKSOURCE_SYSCLK: \
  426. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  427. break; \
  428. case RCC_LPUART1CLKSOURCE_LSE: \
  429. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  430. break; \
  431. default: \
  432. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  433. break; \
  434. } \
  435. } \
  436. } while(0)
  437. #elif defined (STM32L432xx) || defined (STM32L442xx)
  438. #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
  439. do { \
  440. if((__HANDLE__)->Instance == USART1) \
  441. { \
  442. switch(__HAL_RCC_GET_USART1_SOURCE()) \
  443. { \
  444. case RCC_USART1CLKSOURCE_PCLK2: \
  445. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \
  446. break; \
  447. case RCC_USART1CLKSOURCE_HSI: \
  448. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  449. break; \
  450. case RCC_USART1CLKSOURCE_SYSCLK: \
  451. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  452. break; \
  453. case RCC_USART1CLKSOURCE_LSE: \
  454. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  455. break; \
  456. default: \
  457. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  458. break; \
  459. } \
  460. } \
  461. else if((__HANDLE__)->Instance == USART2) \
  462. { \
  463. switch(__HAL_RCC_GET_USART2_SOURCE()) \
  464. { \
  465. case RCC_USART2CLKSOURCE_PCLK1: \
  466. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  467. break; \
  468. case RCC_USART2CLKSOURCE_HSI: \
  469. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  470. break; \
  471. case RCC_USART2CLKSOURCE_SYSCLK: \
  472. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  473. break; \
  474. case RCC_USART2CLKSOURCE_LSE: \
  475. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  476. break; \
  477. default: \
  478. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  479. break; \
  480. } \
  481. } \
  482. else if((__HANDLE__)->Instance == LPUART1) \
  483. { \
  484. switch(__HAL_RCC_GET_LPUART1_SOURCE()) \
  485. { \
  486. case RCC_LPUART1CLKSOURCE_PCLK1: \
  487. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  488. break; \
  489. case RCC_LPUART1CLKSOURCE_HSI: \
  490. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  491. break; \
  492. case RCC_LPUART1CLKSOURCE_SYSCLK: \
  493. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  494. break; \
  495. case RCC_LPUART1CLKSOURCE_LSE: \
  496. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  497. break; \
  498. default: \
  499. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  500. break; \
  501. } \
  502. } \
  503. } while(0)
  504. #elif defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx)
  505. #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
  506. do { \
  507. if((__HANDLE__)->Instance == USART1) \
  508. { \
  509. switch(__HAL_RCC_GET_USART1_SOURCE()) \
  510. { \
  511. case RCC_USART1CLKSOURCE_PCLK2: \
  512. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \
  513. break; \
  514. case RCC_USART1CLKSOURCE_HSI: \
  515. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  516. break; \
  517. case RCC_USART1CLKSOURCE_SYSCLK: \
  518. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  519. break; \
  520. case RCC_USART1CLKSOURCE_LSE: \
  521. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  522. break; \
  523. default: \
  524. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  525. break; \
  526. } \
  527. } \
  528. else if((__HANDLE__)->Instance == USART2) \
  529. { \
  530. switch(__HAL_RCC_GET_USART2_SOURCE()) \
  531. { \
  532. case RCC_USART2CLKSOURCE_PCLK1: \
  533. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  534. break; \
  535. case RCC_USART2CLKSOURCE_HSI: \
  536. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  537. break; \
  538. case RCC_USART2CLKSOURCE_SYSCLK: \
  539. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  540. break; \
  541. case RCC_USART2CLKSOURCE_LSE: \
  542. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  543. break; \
  544. default: \
  545. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  546. break; \
  547. } \
  548. } \
  549. else if((__HANDLE__)->Instance == USART3) \
  550. { \
  551. switch(__HAL_RCC_GET_USART3_SOURCE()) \
  552. { \
  553. case RCC_USART3CLKSOURCE_PCLK1: \
  554. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  555. break; \
  556. case RCC_USART3CLKSOURCE_HSI: \
  557. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  558. break; \
  559. case RCC_USART3CLKSOURCE_SYSCLK: \
  560. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  561. break; \
  562. case RCC_USART3CLKSOURCE_LSE: \
  563. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  564. break; \
  565. default: \
  566. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  567. break; \
  568. } \
  569. } \
  570. else if((__HANDLE__)->Instance == UART4) \
  571. { \
  572. switch(__HAL_RCC_GET_UART4_SOURCE()) \
  573. { \
  574. case RCC_UART4CLKSOURCE_PCLK1: \
  575. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  576. break; \
  577. case RCC_UART4CLKSOURCE_HSI: \
  578. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  579. break; \
  580. case RCC_UART4CLKSOURCE_SYSCLK: \
  581. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  582. break; \
  583. case RCC_UART4CLKSOURCE_LSE: \
  584. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  585. break; \
  586. default: \
  587. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  588. break; \
  589. } \
  590. } \
  591. else if((__HANDLE__)->Instance == LPUART1) \
  592. { \
  593. switch(__HAL_RCC_GET_LPUART1_SOURCE()) \
  594. { \
  595. case RCC_LPUART1CLKSOURCE_PCLK1: \
  596. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  597. break; \
  598. case RCC_LPUART1CLKSOURCE_HSI: \
  599. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  600. break; \
  601. case RCC_LPUART1CLKSOURCE_SYSCLK: \
  602. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  603. break; \
  604. case RCC_LPUART1CLKSOURCE_LSE: \
  605. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  606. break; \
  607. default: \
  608. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  609. break; \
  610. } \
  611. } \
  612. } while(0)
  613. #endif
  614. /** @brief Report the UART mask to apply to retrieve the received data
  615. * according to the word length and to the parity bits activation.
  616. * @note If PCE = 1, the parity bit is not included in the data extracted
  617. * by the reception API().
  618. * This masking operation is not carried out in the case of
  619. * DMA transfers.
  620. * @param __HANDLE__: specifies the UART Handle.
  621. * @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field.
  622. */
  623. #define UART_MASK_COMPUTATION(__HANDLE__) \
  624. do { \
  625. if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \
  626. { \
  627. if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
  628. { \
  629. (__HANDLE__)->Mask = 0x01FF ; \
  630. } \
  631. else \
  632. { \
  633. (__HANDLE__)->Mask = 0x00FF ; \
  634. } \
  635. } \
  636. else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \
  637. { \
  638. if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
  639. { \
  640. (__HANDLE__)->Mask = 0x00FF ; \
  641. } \
  642. else \
  643. { \
  644. (__HANDLE__)->Mask = 0x007F ; \
  645. } \
  646. } \
  647. else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \
  648. { \
  649. if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
  650. { \
  651. (__HANDLE__)->Mask = 0x007F ; \
  652. } \
  653. else \
  654. { \
  655. (__HANDLE__)->Mask = 0x003F ; \
  656. } \
  657. } \
  658. } while(0)
  659. /**
  660. * @brief Ensure that UART frame length is valid.
  661. * @param __LENGTH__ UART frame length.
  662. * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
  663. */
  664. #define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \
  665. ((__LENGTH__) == UART_WORDLENGTH_8B) || \
  666. ((__LENGTH__) == UART_WORDLENGTH_9B))
  667. /**
  668. * @brief Ensure that UART wake-up address length is valid.
  669. * @param __ADDRESS__ UART wake-up address length.
  670. * @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid)
  671. */
  672. #define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \
  673. ((__ADDRESS__) == UART_ADDRESS_DETECT_7B))
  674. #if defined(USART_CR2_SLVEN)
  675. /**
  676. * @brief Ensure that UART Negative Slave Select (NSS) pin management is valid.
  677. * @param __NSS__ UART Negative Slave Select pin management.
  678. * @retval SET (__NSS__ is valid) or RESET (__NSS__ is invalid)
  679. */
  680. #define IS_UART_NSS(__NSS__) (((__NSS__) == UART_NSS_HARD) || \
  681. ((__NSS__) == UART_NSS_SOFT))
  682. #endif
  683. #if defined(USART_CR1_FIFOEN)
  684. /**
  685. * @brief Ensure that UART TXFIFO threshold level is valid.
  686. * @param __THRESHOLD__ UART TXFIFO threshold level.
  687. * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid)
  688. */
  689. #define IS_UART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_8) || \
  690. ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_4) || \
  691. ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_2) || \
  692. ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_3_4) || \
  693. ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_7_8) || \
  694. ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_8_8))
  695. /**
  696. * @brief Ensure that USART RXFIFO threshold level is valid.
  697. * @param __THRESHOLD__ USART RXFIFO threshold level.
  698. * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid)
  699. */
  700. #define IS_UART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_8) || \
  701. ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_4) || \
  702. ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_2) || \
  703. ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_3_4) || \
  704. ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_7_8) || \
  705. ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_8_8))
  706. #endif
  707. /**
  708. * @}
  709. */
  710. /* Private functions ---------------------------------------------------------*/
  711. /**
  712. * @}
  713. */
  714. /**
  715. * @}
  716. */
  717. #ifdef __cplusplus
  718. }
  719. #endif
  720. #endif /* __STM32L4xx_HAL_UART_EX_H */
  721. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/