stm32l4xx_hal_pcd.h 37 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32l4xx_hal_pcd.h
  4. * @author MCD Application Team
  5. * @brief Header file of PCD HAL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  10. *
  11. * Redistribution and use in source and binary forms, with or without modification,
  12. * are permitted provided that the following conditions are met:
  13. * 1. Redistributions of source code must retain the above copyright notice,
  14. * this list of conditions and the following disclaimer.
  15. * 2. Redistributions in binary form must reproduce the above copyright notice,
  16. * this list of conditions and the following disclaimer in the documentation
  17. * and/or other materials provided with the distribution.
  18. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  19. * may be used to endorse or promote products derived from this software
  20. * without specific prior written permission.
  21. *
  22. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  23. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  25. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  26. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  28. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  29. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. ******************************************************************************
  34. */
  35. /* Define to prevent recursive inclusion -------------------------------------*/
  36. #ifndef __STM32L4xx_HAL_PCD_H
  37. #define __STM32L4xx_HAL_PCD_H
  38. #ifdef __cplusplus
  39. extern "C" {
  40. #endif
  41. #if defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx) || \
  42. defined(STM32L452xx) || defined(STM32L462xx) || \
  43. defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \
  44. defined(STM32L496xx) || defined(STM32L4A6xx) || \
  45. defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  46. /* Includes ------------------------------------------------------------------*/
  47. #include "stm32l4xx_ll_usb.h"
  48. /** @addtogroup STM32L4xx_HAL_Driver
  49. * @{
  50. */
  51. /** @addtogroup PCD
  52. * @{
  53. */
  54. /* Exported types ------------------------------------------------------------*/
  55. /** @defgroup PCD_Exported_Types PCD Exported Types
  56. * @{
  57. */
  58. /**
  59. * @brief PCD State structure definition
  60. */
  61. typedef enum
  62. {
  63. HAL_PCD_STATE_RESET = 0x00,
  64. HAL_PCD_STATE_READY = 0x01,
  65. HAL_PCD_STATE_ERROR = 0x02,
  66. HAL_PCD_STATE_BUSY = 0x03,
  67. HAL_PCD_STATE_TIMEOUT = 0x04
  68. } PCD_StateTypeDef;
  69. /* Device LPM suspend state */
  70. typedef enum
  71. {
  72. LPM_L0 = 0x00, /* on */
  73. LPM_L1 = 0x01, /* LPM L1 sleep */
  74. LPM_L2 = 0x02, /* suspend */
  75. LPM_L3 = 0x03, /* off */
  76. }PCD_LPM_StateTypeDef;
  77. #if defined (USB)
  78. /**
  79. * @brief PCD double buffered endpoint direction
  80. */
  81. typedef enum
  82. {
  83. PCD_EP_DBUF_OUT,
  84. PCD_EP_DBUF_IN,
  85. PCD_EP_DBUF_ERR,
  86. }PCD_EP_DBUF_DIR;
  87. /**
  88. * @brief PCD endpoint buffer number
  89. */
  90. typedef enum
  91. {
  92. PCD_EP_NOBUF,
  93. PCD_EP_BUF0,
  94. PCD_EP_BUF1
  95. }PCD_EP_BUF_NUM;
  96. #endif /* USB */
  97. #if defined (USB_OTG_FS)
  98. typedef USB_OTG_GlobalTypeDef PCD_TypeDef;
  99. typedef USB_OTG_CfgTypeDef PCD_InitTypeDef;
  100. typedef USB_OTG_EPTypeDef PCD_EPTypeDef;
  101. #endif /* USB_OTG_FS */
  102. #if defined (USB)
  103. typedef USB_TypeDef PCD_TypeDef;
  104. typedef USB_CfgTypeDef PCD_InitTypeDef;
  105. typedef USB_EPTypeDef PCD_EPTypeDef;
  106. #endif /* USB */
  107. /**
  108. * @brief PCD Handle Structure definition
  109. */
  110. typedef struct
  111. {
  112. PCD_TypeDef *Instance; /*!< Register base address */
  113. PCD_InitTypeDef Init; /*!< PCD required parameters */
  114. __IO uint8_t USB_Address; /*!< USB Address: not used by USB OTG FS */
  115. PCD_EPTypeDef IN_ep[15]; /*!< IN endpoint parameters */
  116. PCD_EPTypeDef OUT_ep[15]; /*!< OUT endpoint parameters */
  117. HAL_LockTypeDef Lock; /*!< PCD peripheral status */
  118. __IO PCD_StateTypeDef State; /*!< PCD communication state */
  119. uint32_t Setup[12]; /*!< Setup packet buffer */
  120. PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */
  121. uint32_t BESL;
  122. uint32_t lpm_active; /*!< Enable or disable the Link Power Management .
  123. This parameter can be set to ENABLE or DISABLE */
  124. uint32_t battery_charging_active; /*!< Enable or disable Battery charging.
  125. This parameter can be set to ENABLE or DISABLE */
  126. void *pData; /*!< Pointer to upper stack Handler */
  127. } PCD_HandleTypeDef;
  128. /**
  129. * @}
  130. */
  131. /* Include PCD HAL Extended module */
  132. #include "stm32l4xx_hal_pcd_ex.h"
  133. /* Exported constants --------------------------------------------------------*/
  134. /** @defgroup PCD_Exported_Constants PCD Exported Constants
  135. * @{
  136. */
  137. /** @defgroup PCD_Speed PCD Speed
  138. * @{
  139. */
  140. #define PCD_SPEED_FULL 1
  141. /**
  142. * @}
  143. */
  144. /** @defgroup PCD_PHY_Module PCD PHY Module
  145. * @{
  146. */
  147. #define PCD_PHY_EMBEDDED 1
  148. /**
  149. * @}
  150. */
  151. /** @defgroup PCD_Turnaround_Timeout Turnaround Timeout Value
  152. * @{
  153. */
  154. #ifndef USBD_FS_TRDT_VALUE
  155. #define USBD_FS_TRDT_VALUE 5
  156. #endif /* USBD_FS_TRDT_VALUE */
  157. /**
  158. * @}
  159. */
  160. /**
  161. * @}
  162. */
  163. /* Exported macros -----------------------------------------------------------*/
  164. /** @defgroup PCD_Exported_Macros PCD Exported Macros
  165. * @brief macros to handle interrupts and specific clock configurations
  166. * @{
  167. */
  168. #if defined (USB_OTG_FS)
  169. #define __HAL_PCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance)
  170. #define __HAL_PCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance)
  171. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
  172. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) &= (__INTERRUPT__))
  173. #define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0)
  174. #define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= \
  175. ~(USB_OTG_PCGCCTL_STOPCLK)
  176. #define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK
  177. #define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE))&0x10)
  178. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE
  179. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE)
  180. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG() EXTI->PR1 & (USB_OTG_FS_WAKEUP_EXTI_LINE)
  181. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR1 = USB_OTG_FS_WAKEUP_EXTI_LINE
  182. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() do {\
  183. EXTI->FTSR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
  184. EXTI->RTSR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE;\
  185. } while(0)
  186. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE() do {\
  187. EXTI->FTSR1 |= (USB_OTG_FS_WAKEUP_EXTI_LINE);\
  188. EXTI->RTSR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
  189. } while(0)
  190. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() do {\
  191. EXTI->RTSR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
  192. EXTI->FTSR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
  193. EXTI->RTSR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE;\
  194. EXTI->FTSR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE;\
  195. } while(0)
  196. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT() (EXTI->SWIER1 |= USB_OTG_FS_WAKEUP_EXTI_LINE)
  197. #endif /* USB_OTG_FS */
  198. #if defined (USB)
  199. #define __HAL_PCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance)
  200. #define __HAL_PCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance)
  201. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
  202. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__))
  203. #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR1 |= USB_WAKEUP_EXTI_LINE
  204. #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR1 &= ~(USB_WAKEUP_EXTI_LINE)
  205. #define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR1 & (USB_WAKEUP_EXTI_LINE)
  206. #define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR1 = USB_WAKEUP_EXTI_LINE
  207. #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() do {\
  208. EXTI->FTSR1 &= ~(USB_WAKEUP_EXTI_LINE);\
  209. EXTI->RTSR1 |= USB_WAKEUP_EXTI_LINE;\
  210. } while(0)
  211. #define __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE() do {\
  212. EXTI->FTSR1 |= (USB_WAKEUP_EXTI_LINE);\
  213. EXTI->RTSR1 &= ~(USB_WAKEUP_EXTI_LINE);\
  214. } while(0)
  215. #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() do {\
  216. EXTI->RTSR1 &= ~(USB_WAKEUP_EXTI_LINE);\
  217. EXTI->FTSR1 &= ~(USB_WAKEUP_EXTI_LINE);\
  218. EXTI->RTSR1 |= USB_WAKEUP_EXTI_LINE;\
  219. EXTI->FTSR1 |= USB_WAKEUP_EXTI_LINE;\
  220. } while(0)
  221. #define __HAL_USB_WAKEUP_EXTI_GENERATE_SWIT() (EXTI->SWIER1 |= USB_WAKEUP_EXTI_LINE)
  222. #endif /* USB */
  223. /**
  224. * @}
  225. */
  226. /** @addtogroup PCD_Exported_Functions PCD Exported Functions
  227. * @{
  228. */
  229. /* Initialization/de-initialization functions ********************************/
  230. /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
  231. * @{
  232. */
  233. HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
  234. HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd);
  235. void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
  236. void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
  237. /**
  238. * @}
  239. */
  240. /* I/O operation functions ***************************************************/
  241. /* Non-Blocking mode: Interrupt */
  242. /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
  243. * @{
  244. */
  245. /* Non-Blocking mode: Interrupt */
  246. HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
  247. HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
  248. void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
  249. void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  250. void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  251. void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
  252. void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
  253. void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
  254. void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
  255. void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
  256. void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  257. void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  258. void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
  259. void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
  260. /**
  261. * @}
  262. */
  263. /* Peripheral Control functions **********************************************/
  264. /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
  265. * @{
  266. */
  267. HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
  268. HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
  269. HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
  270. HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
  271. HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  272. HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  273. HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  274. uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  275. HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  276. HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  277. HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  278. HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  279. HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  280. /**
  281. * @}
  282. */
  283. /* Peripheral State functions ************************************************/
  284. /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
  285. * @{
  286. */
  287. PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
  288. /**
  289. * @}
  290. */
  291. /**
  292. * @}
  293. */
  294. /* Private constants ---------------------------------------------------------*/
  295. /** @defgroup PCD_Private_Constants PCD Private Constants
  296. * @{
  297. */
  298. /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
  299. * @{
  300. */
  301. #if defined (USB_OTG_FS)
  302. #define USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE ((uint32_t)0x08)
  303. #define USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE ((uint32_t)0x0C)
  304. #define USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE ((uint32_t)0x10)
  305. #define USB_OTG_FS_WAKEUP_EXTI_LINE ((uint32_t)0x00020000) /*!< External interrupt line 17 Connected to the USB EXTI Line */
  306. #endif /* USB_OTG_FS */
  307. #if defined (USB)
  308. #define USB_WAKEUP_EXTI_LINE ((uint32_t)0x00020000) /*!< External interrupt line 17Connected to the USB EXTI Line */
  309. #endif /* USB */
  310. /**
  311. * @}
  312. */
  313. #if defined (USB)
  314. /** @defgroup PCD_EP0_MPS PCD EP0 MPS
  315. * @{
  316. */
  317. #define PCD_EP0MPS_64 DEP0CTL_MPS_64
  318. #define PCD_EP0MPS_32 DEP0CTL_MPS_32
  319. #define PCD_EP0MPS_16 DEP0CTL_MPS_16
  320. #define PCD_EP0MPS_08 DEP0CTL_MPS_8
  321. /**
  322. * @}
  323. */
  324. /** @defgroup PCD_ENDP PCD ENDP
  325. * @{
  326. */
  327. #define PCD_ENDP0 ((uint8_t)0)
  328. #define PCD_ENDP1 ((uint8_t)1)
  329. #define PCD_ENDP2 ((uint8_t)2)
  330. #define PCD_ENDP3 ((uint8_t)3)
  331. #define PCD_ENDP4 ((uint8_t)4)
  332. #define PCD_ENDP5 ((uint8_t)5)
  333. #define PCD_ENDP6 ((uint8_t)6)
  334. #define PCD_ENDP7 ((uint8_t)7)
  335. /**
  336. * @}
  337. */
  338. /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
  339. * @{
  340. */
  341. #define PCD_SNG_BUF 0
  342. #define PCD_DBL_BUF 1
  343. /**
  344. * @}
  345. */
  346. #endif /* USB */
  347. /**
  348. * @}
  349. */
  350. /* Private macros ------------------------------------------------------------*/
  351. /** @addtogroup PCD_Private_Macros PCD Private Macros
  352. * @{
  353. */
  354. #if defined (USB)
  355. /* SetENDPOINT */
  356. #define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) (*(&(USBx)->EP0R + (bEpNum) * 2)= (uint16_t)(wRegValue))
  357. /* GetENDPOINT */
  358. #define PCD_GET_ENDPOINT(USBx, bEpNum) (*(&(USBx)->EP0R + (bEpNum) * 2))
  359. /* ENDPOINT transfer */
  360. #define USB_EP0StartXfer USB_EPStartXfer
  361. /**
  362. * @brief sets the type in the endpoint register(bits EP_TYPE[1:0])
  363. * @param USBx: USB peripheral instance register address.
  364. * @param bEpNum: Endpoint Number.
  365. * @param wType: Endpoint Type.
  366. * @retval None
  367. */
  368. #define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
  369. ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) )))
  370. /**
  371. * @brief gets the type in the endpoint register(bits EP_TYPE[1:0])
  372. * @param USBx: USB peripheral instance register address.
  373. * @param bEpNum: Endpoint Number.
  374. * @retval Endpoint Type
  375. */
  376. #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
  377. /**
  378. * @brief free buffer used from the application realizing it to the line
  379. toggles bit SW_BUF in the double buffered endpoint register
  380. * @param USBx: USB peripheral instance register address.
  381. * @param bEpNum: Endpoint Number.
  382. * @param bDir: Direction
  383. * @retval None
  384. */
  385. #define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\
  386. {\
  387. if ((bDir) == PCD_EP_DBUF_OUT)\
  388. { /* OUT double buffered endpoint */\
  389. PCD_TX_DTOG((USBx), (bEpNum));\
  390. }\
  391. else if ((bDir) == PCD_EP_DBUF_IN)\
  392. { /* IN double buffered endpoint */\
  393. PCD_RX_DTOG((USBx), (bEpNum));\
  394. }\
  395. }
  396. /**
  397. * @brief gets direction of the double buffered endpoint
  398. * @param USBx: USB peripheral instance register address.
  399. * @param bEpNum: Endpoint Number.
  400. * @retval EP_DBUF_OUT, EP_DBUF_IN,
  401. * EP_DBUF_ERR if the endpoint counter not yet programmed.
  402. */
  403. #define PCD_GET_DB_DIR(USBx, bEpNum)\
  404. {\
  405. if ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum)) & 0xFC00) != 0)\
  406. return(PCD_EP_DBUF_OUT);\
  407. else if (((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x03FF) != 0)\
  408. return(PCD_EP_DBUF_IN);\
  409. else\
  410. return(PCD_EP_DBUF_ERR);\
  411. }
  412. /**
  413. * @brief sets the status for tx transfer (bits STAT_TX[1:0]).
  414. * @param USBx: USB peripheral instance register address.
  415. * @param bEpNum: Endpoint Number.
  416. * @param wState: new state
  417. * @retval None
  418. */
  419. #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) { register uint16_t _wRegVal;\
  420. \
  421. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK;\
  422. /* toggle first bit ? */ \
  423. if((USB_EPTX_DTOG1 & (wState))!= 0)\
  424. { \
  425. _wRegVal ^= USB_EPTX_DTOG1; \
  426. } \
  427. /* toggle second bit ? */ \
  428. if((USB_EPTX_DTOG2 & (wState))!= 0) \
  429. { \
  430. _wRegVal ^= USB_EPTX_DTOG2; \
  431. } \
  432. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX));\
  433. } /* PCD_SET_EP_TX_STATUS */
  434. /**
  435. * @brief sets the status for rx transfer (bits STAT_TX[1:0])
  436. * @param USBx: USB peripheral instance register address.
  437. * @param bEpNum: Endpoint Number.
  438. * @param wState: new state
  439. * @retval None
  440. */
  441. #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\
  442. register uint16_t _wRegVal; \
  443. \
  444. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK;\
  445. /* toggle first bit ? */ \
  446. if((USB_EPRX_DTOG1 & (wState))!= 0) \
  447. { \
  448. _wRegVal ^= USB_EPRX_DTOG1; \
  449. } \
  450. /* toggle second bit ? */ \
  451. if((USB_EPRX_DTOG2 & (wState))!= 0) \
  452. { \
  453. _wRegVal ^= USB_EPRX_DTOG2; \
  454. } \
  455. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX)); \
  456. } /* PCD_SET_EP_RX_STATUS */
  457. /**
  458. * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
  459. * @param USBx: USB peripheral instance register address.
  460. * @param bEpNum: Endpoint Number.
  461. * @param wStaterx: new state.
  462. * @param wStatetx: new state.
  463. * @retval None
  464. */
  465. #define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) {\
  466. register uint32_t _wRegVal; \
  467. \
  468. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK |USB_EPTX_STAT) ;\
  469. /* toggle first bit ? */ \
  470. if((USB_EPRX_DTOG1 & ((wStaterx)))!= 0) \
  471. { \
  472. _wRegVal ^= USB_EPRX_DTOG1; \
  473. } \
  474. /* toggle second bit ? */ \
  475. if((USB_EPRX_DTOG2 & (wStaterx))!= 0) \
  476. { \
  477. _wRegVal ^= USB_EPRX_DTOG2; \
  478. } \
  479. /* toggle first bit ? */ \
  480. if((USB_EPTX_DTOG1 & (wStatetx))!= 0) \
  481. { \
  482. _wRegVal ^= USB_EPTX_DTOG1; \
  483. } \
  484. /* toggle second bit ? */ \
  485. if((USB_EPTX_DTOG2 & (wStatetx))!= 0) \
  486. { \
  487. _wRegVal ^= USB_EPTX_DTOG2; \
  488. } \
  489. PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX); \
  490. } /* PCD_SET_EP_TXRX_STATUS */
  491. /**
  492. * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0]
  493. * /STAT_RX[1:0])
  494. * @param USBx: USB peripheral instance register address.
  495. * @param bEpNum: Endpoint Number.
  496. * @retval status
  497. */
  498. #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
  499. #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
  500. /**
  501. * @brief sets directly the VALID tx/rx-status into the endpoint register
  502. * @param USBx: USB peripheral instance register address.
  503. * @param bEpNum: Endpoint Number.
  504. * @retval None
  505. */
  506. #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
  507. #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
  508. /**
  509. * @brief checks stall condition in an endpoint.
  510. * @param USBx: USB peripheral instance register address.
  511. * @param bEpNum: Endpoint Number.
  512. * @retval TRUE = endpoint in stall condition.
  513. */
  514. #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \
  515. == USB_EP_TX_STALL)
  516. #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \
  517. == USB_EP_RX_STALL)
  518. /**
  519. * @brief set & clear EP_KIND bit.
  520. * @param USBx: USB peripheral instance register address.
  521. * @param bEpNum: Endpoint Number.
  522. * @retval None
  523. */
  524. #define PCD_SET_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  525. (USB_EP_CTR_RX|USB_EP_CTR_TX|((PCD_GET_ENDPOINT((USBx), (bEpNum)) | USB_EP_KIND) & USB_EPREG_MASK))))
  526. #define PCD_CLEAR_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  527. (USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK))))
  528. /**
  529. * @brief Sets/clears directly STATUS_OUT bit in the endpoint register.
  530. * @param USBx: USB peripheral instance register address.
  531. * @param bEpNum: Endpoint Number.
  532. * @retval None
  533. */
  534. #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  535. #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  536. /**
  537. * @brief Sets/clears directly EP_KIND bit in the endpoint register.
  538. * @param USBx: USB peripheral instance register address.
  539. * @param bEpNum: Endpoint Number.
  540. * @retval None
  541. */
  542. #define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  543. #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  544. /**
  545. * @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
  546. * @param USBx: USB peripheral instance register address.
  547. * @param bEpNum: Endpoint Number.
  548. * @retval None
  549. */
  550. #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
  551. PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0x7FFF & USB_EPREG_MASK))
  552. #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
  553. PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0xFF7F & USB_EPREG_MASK))
  554. /**
  555. * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
  556. * @param USBx: USB peripheral instance register address.
  557. * @param bEpNum: Endpoint Number.
  558. * @retval None
  559. */
  560. #define PCD_RX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  561. USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX | (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK)))
  562. #define PCD_TX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  563. USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX | (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK)))
  564. /**
  565. * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
  566. * @param USBx: USB peripheral instance register address.
  567. * @param bEpNum: Endpoint Number.
  568. * @retval None
  569. */
  570. #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_RX) != 0)\
  571. { \
  572. PCD_RX_DTOG((USBx), (bEpNum)); \
  573. }
  574. #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_TX) != 0)\
  575. { \
  576. PCD_TX_DTOG((USBx), (bEpNum)); \
  577. }
  578. /**
  579. * @brief Sets address in an endpoint register.
  580. * @param USBx: USB peripheral instance register address.
  581. * @param bEpNum: Endpoint Number.
  582. * @param bAddr: Address.
  583. * @retval None
  584. */
  585. #define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT((USBx), (bEpNum),\
  586. USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr))
  587. #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
  588. #define PCD_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t *)(((USBx)->BTABLE+(bEpNum)*8)+ ((uint32_t)(USBx) + 0x400)))
  589. #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)(((USBx)->BTABLE+(bEpNum)*8+2)+ ((uint32_t)(USBx) + 0x400)))
  590. #define PCD_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t *)(((USBx)->BTABLE+(bEpNum)*8+4)+ ((uint32_t)(USBx) + 0x400)))
  591. #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)(((USBx)->BTABLE+(bEpNum)*8+6)+ ((uint32_t)(USBx) + 0x400)))
  592. #define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) {\
  593. uint16_t *pdwReg = PCD_EP_RX_CNT((USBx), (bEpNum)); \
  594. PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\
  595. }
  596. /**
  597. * @brief sets address of the tx/rx buffer.
  598. * @param USBx: USB peripheral instance register address.
  599. * @param bEpNum: Endpoint Number.
  600. * @param wAddr: address to be set (must be word aligned).
  601. * @retval None
  602. */
  603. #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1) << 1))
  604. #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1) << 1))
  605. /**
  606. * @brief Gets address of the tx/rx buffer.
  607. * @param USBx: USB peripheral instance register address.
  608. * @param bEpNum: Endpoint Number.
  609. * @retval address of the buffer.
  610. */
  611. #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
  612. #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
  613. /**
  614. * @brief Sets counter of rx buffer with no. of blocks.
  615. * @param dwReg: Register
  616. * @param wCount: Counter.
  617. * @param wNBlocks: no. of Blocks.
  618. * @retval None
  619. */
  620. #define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\
  621. (wNBlocks) = (wCount) >> 5;\
  622. if(((wCount) & 0x1f) == 0)\
  623. { \
  624. (wNBlocks)--;\
  625. } \
  626. *pdwReg = (uint16_t)((uint16_t)((wNBlocks) << 10) | 0x8000); \
  627. }/* PCD_CALC_BLK32 */
  628. #define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\
  629. (wNBlocks) = (wCount) >> 1;\
  630. if(((wCount) & 0x1) != 0)\
  631. { \
  632. (wNBlocks)++;\
  633. } \
  634. *pdwReg = (uint16_t)((wNBlocks) << 10);\
  635. }/* PCD_CALC_BLK2 */
  636. #define PCD_SET_EP_CNT_RX_REG(dwReg,wCount) {\
  637. uint16_t wNBlocks;\
  638. if((wCount) > 62) \
  639. { \
  640. PCD_CALC_BLK32((dwReg),(wCount),wNBlocks); \
  641. } \
  642. else \
  643. { \
  644. PCD_CALC_BLK2((dwReg),(wCount),wNBlocks); \
  645. } \
  646. }/* PCD_SET_EP_CNT_RX_REG */
  647. #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) {\
  648. uint16_t *pdwReg = PCD_EP_TX_CNT((USBx), (bEpNum)); \
  649. PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\
  650. }
  651. /**
  652. * @brief sets counter for the tx/rx buffer.
  653. * @param USBx: USB peripheral instance register address.
  654. * @param bEpNum: Endpoint Number.
  655. * @param wCount: Counter value.
  656. * @retval None
  657. */
  658. #define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT((USBx), (bEpNum)) = (wCount))
  659. /**
  660. * @brief gets counter of the tx buffer.
  661. * @param USBx: USB peripheral instance register address.
  662. * @param bEpNum: Endpoint Number.
  663. * @retval Counter value
  664. */
  665. #define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ff)
  666. #define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ff)
  667. /**
  668. * @brief Sets buffer 0/1 address in a double buffer endpoint.
  669. * @param USBx: USB peripheral instance register address.
  670. * @param bEpNum: Endpoint Number.
  671. * @param wBuf0Addr: buffer 0 address.
  672. * @retval Counter value
  673. */
  674. #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) {PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr));}
  675. #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) {PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr));}
  676. /**
  677. * @brief Sets addresses in a double buffer endpoint.
  678. * @param USBx: USB peripheral instance register address.
  679. * @param bEpNum: Endpoint Number.
  680. * @param wBuf0Addr: buffer 0 address.
  681. * @param wBuf1Addr = buffer 1 address.
  682. * @retval None
  683. */
  684. #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \
  685. PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr));\
  686. PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr));\
  687. } /* PCD_SET_EP_DBUF_ADDR */
  688. /**
  689. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  690. * @param USBx: USB peripheral instance register address.
  691. * @param bEpNum: Endpoint Number.
  692. * @retval None
  693. */
  694. #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
  695. #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
  696. /**
  697. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  698. * @param USBx: USB peripheral instance register address.
  699. * @param bEpNum: Endpoint Number.
  700. * @param bDir: endpoint dir EP_DBUF_OUT = OUT
  701. * EP_DBUF_IN = IN
  702. * @param wCount: Counter value
  703. * @retval None
  704. */
  705. #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) { \
  706. if((bDir) == PCD_EP_DBUF_OUT)\
  707. /* OUT endpoint */ \
  708. {PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum),(wCount));} \
  709. else if((bDir) == PCD_EP_DBUF_IN)\
  710. /* IN endpoint */ \
  711. *PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
  712. } /* SetEPDblBuf0Count*/
  713. #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) { \
  714. if((bDir) == PCD_EP_DBUF_OUT)\
  715. {/* OUT endpoint */ \
  716. PCD_SET_EP_RX_CNT((USBx), (bEpNum),(wCount)); \
  717. } \
  718. else if((bDir) == PCD_EP_DBUF_IN)\
  719. {/* IN endpoint */ \
  720. *PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
  721. } \
  722. } /* SetEPDblBuf1Count */
  723. #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) {\
  724. PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  725. PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  726. } /* PCD_SET_EP_DBUF_CNT */
  727. /**
  728. * @brief Gets buffer 0/1 rx/tx counter for double buffering.
  729. * @param USBx: USB peripheral instance register address.
  730. * @param bEpNum: Endpoint Number.
  731. * @retval None
  732. */
  733. #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
  734. #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
  735. #endif /* USB */
  736. #if defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx) || \
  737. defined(STM32L452xx) || defined(STM32L462xx)
  738. /** @defgroup PCD_Instance_definition PCD Instance definition
  739. * @{
  740. */
  741. #define IS_PCD_ALL_INSTANCE IS_USB_ALL_INSTANCE
  742. /**
  743. * @}
  744. */
  745. #endif /* STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx || */
  746. /* STM32L452xx || STM32L462xx */
  747. /**
  748. * @}
  749. */
  750. /**
  751. * @}
  752. */
  753. /**
  754. * @}
  755. */
  756. #endif /* STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx || */
  757. /* STM32L452xx || STM32L462xx || */
  758. /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */
  759. /* STM32L496xx || STM32L4A6xx || */
  760. /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
  761. #ifdef __cplusplus
  762. }
  763. #endif
  764. #endif /* __STM32L4xx_HAL_PCD_H */
  765. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/