stm32l4xx_ll_dma2d.h 88 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32l4xx_ll_dma2d.h
  4. * @author MCD Application Team
  5. * @brief Header file of DMA2D LL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  10. *
  11. * Redistribution and use in source and binary forms, with or without modification,
  12. * are permitted provided that the following conditions are met:
  13. * 1. Redistributions of source code must retain the above copyright notice,
  14. * this list of conditions and the following disclaimer.
  15. * 2. Redistributions in binary form must reproduce the above copyright notice,
  16. * this list of conditions and the following disclaimer in the documentation
  17. * and/or other materials provided with the distribution.
  18. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  19. * may be used to endorse or promote products derived from this software
  20. * without specific prior written permission.
  21. *
  22. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  23. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  25. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  26. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  28. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  29. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. ******************************************************************************
  34. */
  35. /* Define to prevent recursive inclusion -------------------------------------*/
  36. #ifndef __STM32L4xx_LL_DMA2D_H
  37. #define __STM32L4xx_LL_DMA2D_H
  38. #ifdef __cplusplus
  39. extern "C" {
  40. #endif
  41. /* Includes ------------------------------------------------------------------*/
  42. #include "stm32l4xx.h"
  43. /** @addtogroup STM32L4xx_LL_Driver
  44. * @{
  45. */
  46. #if defined (DMA2D)
  47. /** @defgroup DMA2D_LL DMA2D
  48. * @{
  49. */
  50. /* Private types -------------------------------------------------------------*/
  51. /* Private variables ---------------------------------------------------------*/
  52. /* Private constants ---------------------------------------------------------*/
  53. /* Private macros ------------------------------------------------------------*/
  54. #if defined(USE_FULL_LL_DRIVER)
  55. /** @defgroup DMA2D_LL_Private_Macros DMA2D Private Macros
  56. * @{
  57. */
  58. /**
  59. * @}
  60. */
  61. #endif /*USE_FULL_LL_DRIVER*/
  62. /* Exported types ------------------------------------------------------------*/
  63. #if defined(USE_FULL_LL_DRIVER)
  64. /** @defgroup DMA2D_LL_ES_Init_Struct DMA2D Exported Init structures
  65. * @{
  66. */
  67. /**
  68. * @brief LL DMA2D Init Structure Definition
  69. */
  70. typedef struct
  71. {
  72. uint32_t Mode; /*!< Specifies the DMA2D transfer mode.
  73. - This parameter can be one value of @ref DMA2D_LL_EC_MODE.
  74. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetMode().*/
  75. uint32_t ColorMode; /*!< Specifies the color format of the output image.
  76. - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
  77. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */
  78. uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
  79. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  80. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  81. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  82. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  83. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  84. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  85. function @ref LL_DMA2D_ConfigOutputColor(). */
  86. uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
  87. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  88. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  89. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
  90. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  91. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  92. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  93. function @ref LL_DMA2D_ConfigOutputColor(). */
  94. uint32_t OutputRed; /*!< Specifies the Red value of the output image.
  95. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  96. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  97. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  98. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  99. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  100. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  101. function @ref LL_DMA2D_ConfigOutputColor(). */
  102. uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
  103. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  104. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
  105. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  106. - This parameter is not considered if RGB888 or RGB565 color mode is selected.
  107. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  108. function @ref LL_DMA2D_ConfigOutputColor(). */
  109. uint32_t OutputMemoryAddress; /*!< Specifies the memory address.
  110. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  111. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputMemAddr(). */
  112. #if defined(DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT)
  113. uint32_t OutputSwapMode; /*!< Specifies the output swap mode color format of the output image.
  114. - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_SWAP_MODE.
  115. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputSwapMode(). */
  116. #endif /* DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT */
  117. #if defined(DMA2D_LINE_OFFSET_MODE_SUPPORT)
  118. uint32_t LineOffsetMode; /*!< Specifies the output line offset mode.
  119. - This parameter can be one value of @ref DMA2D_LL_EC_LINE_OFFSET_MODE.
  120. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetLineOffsetMode(). */
  121. #endif /* DMA2D_LINE_OFFSET_MODE_SUPPORT */
  122. uint32_t LineOffset; /*!< Specifies the output line offset value.
  123. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF on STM32L496xx/STM32L4A6xx
  124. else between Min_Data = 0x0000 and Max_Data = 0xFFFF on other devices.
  125. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetLineOffset(). */
  126. uint32_t NbrOfLines; /*!< Specifies the number of lines of the area to be transferred.
  127. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF.
  128. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfLines(). */
  129. uint32_t NbrOfPixelsPerLines; /*!< Specifies the number of pixels per lines of the area to be transfered.
  130. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  131. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfPixelsPerLines(). */
  132. uint32_t AlphaInversionMode; /*!< Specifies the output alpha inversion mode.
  133. - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_INVERSION.
  134. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputAlphaInvMode(). */
  135. uint32_t RBSwapMode; /*!< Specifies the output Red Blue swap mode.
  136. - This parameter can be one value of @ref DMA2D_LL_EC_RED_BLUE_SWAP.
  137. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputRBSwapMode(). */
  138. } LL_DMA2D_InitTypeDef;
  139. /**
  140. * @brief LL DMA2D Layer Configuration Structure Definition
  141. */
  142. typedef struct
  143. {
  144. uint32_t MemoryAddress; /*!< Specifies the foreground or background memory address.
  145. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  146. This parameter can be modified afterwards using unitary functions
  147. - @ref LL_DMA2D_FGND_SetMemAddr() for foreground layer,
  148. - @ref LL_DMA2D_BGND_SetMemAddr() for background layer. */
  149. uint32_t LineOffset; /*!< Specifies the foreground or background line offset value.
  150. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  151. This parameter can be modified afterwards using unitary functions
  152. - @ref LL_DMA2D_FGND_SetLineOffset() for foreground layer,
  153. - @ref LL_DMA2D_BGND_SetLineOffset() for background layer. */
  154. uint32_t ColorMode; /*!< Specifies the foreground or background color mode.
  155. - This parameter can be one value of @ref DMA2D_LL_EC_INPUT_COLOR_MODE.
  156. This parameter can be modified afterwards using unitary functions
  157. - @ref LL_DMA2D_FGND_SetColorMode() for foreground layer,
  158. - @ref LL_DMA2D_BGND_SetColorMode() for background layer. */
  159. uint32_t CLUTColorMode; /*!< Specifies the foreground or background CLUT color mode.
  160. - This parameter can be one value of @ref DMA2D_LL_EC_CLUT_COLOR_MODE.
  161. This parameter can be modified afterwards using unitary functions
  162. - @ref LL_DMA2D_FGND_SetCLUTColorMode() for foreground layer,
  163. - @ref LL_DMA2D_BGND_SetCLUTColorMode() for background layer. */
  164. uint32_t CLUTSize; /*!< Specifies the foreground or background CLUT size.
  165. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  166. This parameter can be modified afterwards using unitary functions
  167. - @ref LL_DMA2D_FGND_SetCLUTSize() for foreground layer,
  168. - @ref LL_DMA2D_BGND_SetCLUTSize() for background layer. */
  169. uint32_t AlphaMode; /*!< Specifies the foreground or background alpha mode.
  170. - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_MODE.
  171. This parameter can be modified afterwards using unitary functions
  172. - @ref LL_DMA2D_FGND_SetAlphaMode() for foreground layer,
  173. - @ref LL_DMA2D_BGND_SetAlphaMode() for background layer. */
  174. uint32_t Alpha; /*!< Specifies the foreground or background Alpha value.
  175. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  176. This parameter can be modified afterwards using unitary functions
  177. - @ref LL_DMA2D_FGND_SetAlpha() for foreground layer,
  178. - @ref LL_DMA2D_BGND_SetAlpha() for background layer. */
  179. uint32_t Blue; /*!< Specifies the foreground or background Blue color value.
  180. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  181. This parameter can be modified afterwards using unitary functions
  182. - @ref LL_DMA2D_FGND_SetBlueColor() for foreground layer,
  183. - @ref LL_DMA2D_BGND_SetBlueColor() for background layer. */
  184. uint32_t Green; /*!< Specifies the foreground or background Green color value.
  185. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  186. This parameter can be modified afterwards using unitary functions
  187. - @ref LL_DMA2D_FGND_SetGreenColor() for foreground layer,
  188. - @ref LL_DMA2D_BGND_SetGreenColor() for background layer. */
  189. uint32_t Red; /*!< Specifies the foreground or background Red color value.
  190. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  191. This parameter can be modified afterwards using unitary functions
  192. - @ref LL_DMA2D_FGND_SetRedColor() for foreground layer,
  193. - @ref LL_DMA2D_BGND_SetRedColor() for background layer. */
  194. uint32_t CLUTMemoryAddress; /*!< Specifies the foreground or background CLUT memory address.
  195. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  196. This parameter can be modified afterwards using unitary functions
  197. - @ref LL_DMA2D_FGND_SetCLUTMemAddr() for foreground layer,
  198. - @ref LL_DMA2D_BGND_SetCLUTMemAddr() for background layer. */
  199. uint32_t AlphaInversionMode; /*!< Specifies the foreground or background alpha inversion mode.
  200. - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_INVERSION.
  201. This parameter can be modified afterwards using unitary functions
  202. - @ref LL_DMA2D_FGND_SetAlphaInvMode() for foreground layer,
  203. - @ref LL_DMA2D_BGND_SetAlphaInvMode() for background layer. */
  204. uint32_t RBSwapMode; /*!< Specifies the foreground or background Red Blue swap mode.
  205. This parameter can be one value of @ref DMA2D_LL_EC_RED_BLUE_SWAP .
  206. This parameter can be modified afterwards using unitary functions
  207. - @ref LL_DMA2D_FGND_SetRBSwapMode() for foreground layer,
  208. - @ref LL_DMA2D_BGND_SetRBSwapMode() for background layer. */
  209. } LL_DMA2D_LayerCfgTypeDef;
  210. /**
  211. * @brief LL DMA2D Output Color Structure Definition
  212. */
  213. typedef struct
  214. {
  215. uint32_t ColorMode; /*!< Specifies the color format of the output image.
  216. - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
  217. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */
  218. uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
  219. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  220. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  221. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  222. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  223. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  224. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  225. function @ref LL_DMA2D_ConfigOutputColor(). */
  226. uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
  227. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  228. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  229. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
  230. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  231. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  232. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  233. function @ref LL_DMA2D_ConfigOutputColor(). */
  234. uint32_t OutputRed; /*!< Specifies the Red value of the output image.
  235. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  236. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  237. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  238. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  239. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  240. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  241. function @ref LL_DMA2D_ConfigOutputColor(). */
  242. uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
  243. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  244. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
  245. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  246. - This parameter is not considered if RGB888 or RGB565 color mode is selected.
  247. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  248. function @ref LL_DMA2D_ConfigOutputColor(). */
  249. } LL_DMA2D_ColorTypeDef;
  250. /**
  251. * @}
  252. */
  253. #endif /* USE_FULL_LL_DRIVER */
  254. /* Exported constants --------------------------------------------------------*/
  255. /** @defgroup DMA2D_LL_Exported_Constants DMA2D Exported Constants
  256. * @{
  257. */
  258. /** @defgroup DMA2D_LL_EC_GET_FLAG Get Flags Defines
  259. * @brief Flags defines which can be used with LL_DMA2D_ReadReg function
  260. * @{
  261. */
  262. #define LL_DMA2D_FLAG_CEIF DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */
  263. #define LL_DMA2D_FLAG_CTCIF DMA2D_ISR_CTCIF /*!< CLUT Transfer Complete Interrupt Flag */
  264. #define LL_DMA2D_FLAG_CAEIF DMA2D_ISR_CAEIF /*!< CLUT Access Error Interrupt Flag */
  265. #define LL_DMA2D_FLAG_TWIF DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */
  266. #define LL_DMA2D_FLAG_TCIF DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */
  267. #define LL_DMA2D_FLAG_TEIF DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */
  268. /**
  269. * @}
  270. */
  271. /** @defgroup DMA2D_LL_EC_IT IT Defines
  272. * @brief IT defines which can be used with LL_DMA2D_ReadReg and LL_DMA2D_WriteReg functions
  273. * @{
  274. */
  275. #define LL_DMA2D_IT_CEIE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */
  276. #define LL_DMA2D_IT_CTCIE DMA2D_CR_CTCIE /*!< CLUT Transfer Complete Interrupt */
  277. #define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
  278. #define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
  279. #define LL_DMA2D_IT_TCIE DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */
  280. #define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
  281. /**
  282. * @}
  283. */
  284. /** @defgroup DMA2D_LL_EC_MODE Mode
  285. * @{
  286. */
  287. #define LL_DMA2D_MODE_M2M 0x00000000U /*!< DMA2D memory to memory transfer mode */
  288. #define LL_DMA2D_MODE_M2M_PFC DMA2D_CR_MODE_0 /*!< DMA2D memory to memory with pixel format conversion transfer mode */
  289. #define LL_DMA2D_MODE_M2M_BLEND DMA2D_CR_MODE_1 /*!< DMA2D memory to memory with blending transfer mode */
  290. #define LL_DMA2D_MODE_R2M (DMA2D_CR_MODE_0|DMA2D_CR_MODE_1) /*!< DMA2D register to memory transfer mode */
  291. #if defined(DMA2D_M2M_BLEND_FIXED_COLOR_FG_BG_SUPPORT)
  292. #define LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_FG DMA2D_CR_MODE_2 /*!< DMA2D memory to memory with blending transfer mode and fixed color foreground */
  293. #define LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_BG (DMA2D_CR_MODE_0|DMA2D_CR_MODE_2) /*!< DMA2D memory to memory with blending transfer mode and fixed color background */
  294. #endif /* DMA2D_M2M_BLEND_FIXED_COLOR_FG_BG_SUPPORT */
  295. /**
  296. * @}
  297. */
  298. /** @defgroup DMA2D_LL_EC_OUTPUT_COLOR_MODE Output Color Mode
  299. * @{
  300. */
  301. #define LL_DMA2D_OUTPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  302. #define LL_DMA2D_OUTPUT_MODE_RGB888 DMA2D_OPFCCR_CM_0 /*!< RGB888 */
  303. #define LL_DMA2D_OUTPUT_MODE_RGB565 DMA2D_OPFCCR_CM_1 /*!< RGB565 */
  304. #define LL_DMA2D_OUTPUT_MODE_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) /*!< ARGB1555 */
  305. #define LL_DMA2D_OUTPUT_MODE_ARGB4444 DMA2D_OPFCCR_CM_2 /*!< ARGB4444 */
  306. /**
  307. * @}
  308. */
  309. /** @defgroup DMA2D_LL_EC_INPUT_COLOR_MODE Input Color Mode
  310. * @{
  311. */
  312. #define LL_DMA2D_INPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  313. #define LL_DMA2D_INPUT_MODE_RGB888 DMA2D_FGPFCCR_CM_0 /*!< RGB888 */
  314. #define LL_DMA2D_INPUT_MODE_RGB565 DMA2D_FGPFCCR_CM_1 /*!< RGB565 */
  315. #define LL_DMA2D_INPUT_MODE_ARGB1555 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1) /*!< ARGB1555 */
  316. #define LL_DMA2D_INPUT_MODE_ARGB4444 DMA2D_FGPFCCR_CM_2 /*!< ARGB4444 */
  317. #define LL_DMA2D_INPUT_MODE_L8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_2) /*!< L8 */
  318. #define LL_DMA2D_INPUT_MODE_AL44 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL44 */
  319. #define LL_DMA2D_INPUT_MODE_AL88 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL88 */
  320. #define LL_DMA2D_INPUT_MODE_L4 DMA2D_FGPFCCR_CM_3 /*!< L4 */
  321. #define LL_DMA2D_INPUT_MODE_A8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_3) /*!< A8 */
  322. #define LL_DMA2D_INPUT_MODE_A4 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_3) /*!< A4 */
  323. /**
  324. * @}
  325. */
  326. /** @defgroup DMA2D_LL_EC_ALPHA_MODE Alpha Mode
  327. * @{
  328. */
  329. #define LL_DMA2D_ALPHA_MODE_NO_MODIF 0x00000000U /*!< No modification of the alpha channel value */
  330. #define LL_DMA2D_ALPHA_MODE_REPLACE DMA2D_FGPFCCR_AM_0 /*!< Replace original alpha channel value by programmed alpha value */
  331. #define LL_DMA2D_ALPHA_MODE_COMBINE DMA2D_FGPFCCR_AM_1 /*!< Replace original alpha channel value by programmed alpha value
  332. with original alpha channel value */
  333. /**
  334. * @}
  335. */
  336. #if defined(DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT)
  337. /** @defgroup DMA2D_LL_EC_OUTPUT_SWAP_MODE Swap Mode
  338. * @{
  339. */
  340. #define LL_DMA2D_SWAP_MODE_REGULAR ((uint32_t)0x00000000) /*!< Regular order */
  341. #define LL_DMA2D_SWAP_MODE_TWO_BY_TWO DMA2D_OPFCCR_SB /*!< Bytes swapped two by two */
  342. /**
  343. * @}
  344. */
  345. #endif /* DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT */
  346. /** @defgroup DMA2D_LL_EC_RED_BLUE_SWAP Red Blue Swap
  347. * @{
  348. */
  349. #define LL_DMA2D_RB_MODE_REGULAR 0x00000000U /*!< RGB or ARGB */
  350. #define LL_DMA2D_RB_MODE_SWAP DMA2D_FGPFCCR_RBS /*!< BGR or ABGR */
  351. /**
  352. * @}
  353. */
  354. /** @defgroup DMA2D_LL_EC_ALPHA_INVERSION Alpha Inversion
  355. * @{
  356. */
  357. #define LL_DMA2D_ALPHA_REGULAR 0x00000000U /*!< Regular alpha */
  358. #define LL_DMA2D_ALPHA_INVERTED DMA2D_FGPFCCR_AI /*!< Inverted alpha */
  359. /**
  360. * @}
  361. */
  362. #if defined(DMA2D_LINE_OFFSET_MODE_SUPPORT)
  363. /** @defgroup DMA2D_LL_EC_LINE_OFFSET_MODE Line Offset Mode
  364. * @{
  365. */
  366. #define LL_DMA2D_LINE_OFFSET_PIXELS ((uint32_t)0x00000000) /*!< Line offsets are expressed in pixels */
  367. #define LL_DMA2D_LINE_OFFSET_BYTES DMA2D_CR_LOM /*!< Line offsets are expressed in bytes */
  368. /**
  369. * @}
  370. */
  371. #endif /* DMA2D_LINE_OFFSET_MODE_SUPPORT */
  372. /** @defgroup DMA2D_LL_EC_CLUT_COLOR_MODE CLUT Color Mode
  373. * @{
  374. */
  375. #define LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  376. #define LL_DMA2D_CLUT_COLOR_MODE_RGB888 DMA2D_FGPFCCR_CCM /*!< RGB888 */
  377. /**
  378. * @}
  379. */
  380. /**
  381. * @}
  382. */
  383. /* Exported macro ------------------------------------------------------------*/
  384. /** @defgroup DMA2D_LL_Exported_Macros DMA2D Exported Macros
  385. * @{
  386. */
  387. /** @defgroup DMA2D_LL_EM_WRITE_READ Common Write and read registers Macros
  388. * @{
  389. */
  390. /**
  391. * @brief Write a value in DMA2D register.
  392. * @param __INSTANCE__ DMA2D Instance
  393. * @param __REG__ Register to be written
  394. * @param __VALUE__ Value to be written in the register
  395. * @retval None
  396. */
  397. #define LL_DMA2D_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
  398. /**
  399. * @brief Read a value in DMA2D register.
  400. * @param __INSTANCE__ DMA2D Instance
  401. * @param __REG__ Register to be read
  402. * @retval Register value
  403. */
  404. #define LL_DMA2D_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
  405. /**
  406. * @}
  407. */
  408. /**
  409. * @}
  410. */
  411. /* Exported functions --------------------------------------------------------*/
  412. /** @defgroup DMA2D_LL_Exported_Functions DMA2D Exported Functions
  413. * @{
  414. */
  415. /** @defgroup DMA2D_LL_EF_Configuration Configuration Functions
  416. * @{
  417. */
  418. /**
  419. * @brief Start a DMA2D transfer.
  420. * @rmtoll CR START LL_DMA2D_Start
  421. * @param DMA2Dx DMA2D Instance
  422. * @retval None
  423. */
  424. __STATIC_INLINE void LL_DMA2D_Start(DMA2D_TypeDef *DMA2Dx)
  425. {
  426. SET_BIT(DMA2Dx->CR, DMA2D_CR_START);
  427. }
  428. /**
  429. * @brief Indicate if a DMA2D transfer is ongoing.
  430. * @rmtoll CR START LL_DMA2D_IsTransferOngoing
  431. * @param DMA2Dx DMA2D Instance
  432. * @retval State of bit (1 or 0).
  433. */
  434. __STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(DMA2D_TypeDef *DMA2Dx)
  435. {
  436. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_START) == (DMA2D_CR_START));
  437. }
  438. /**
  439. * @brief Suspend DMA2D transfer.
  440. * @note This API can be used to suspend automatic foreground or background CLUT loading.
  441. * @rmtoll CR SUSP LL_DMA2D_Suspend
  442. * @param DMA2Dx DMA2D Instance
  443. * @retval None
  444. */
  445. __STATIC_INLINE void LL_DMA2D_Suspend(DMA2D_TypeDef *DMA2Dx)
  446. {
  447. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START, DMA2D_CR_SUSP);
  448. }
  449. /**
  450. * @brief Resume DMA2D transfer.
  451. * @note This API can be used to resume automatic foreground or background CLUT loading.
  452. * @rmtoll CR SUSP LL_DMA2D_Resume
  453. * @param DMA2Dx DMA2D Instance
  454. * @retval None
  455. */
  456. __STATIC_INLINE void LL_DMA2D_Resume(DMA2D_TypeDef *DMA2Dx)
  457. {
  458. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START);
  459. }
  460. /**
  461. * @brief Indicate if DMA2D transfer is suspended.
  462. * @note This API can be used to indicate whether or not automatic foreground or
  463. * background CLUT loading is suspended.
  464. * @rmtoll CR SUSP LL_DMA2D_IsSuspended
  465. * @param DMA2Dx DMA2D Instance
  466. * @retval State of bit (1 or 0).
  467. */
  468. __STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(DMA2D_TypeDef *DMA2Dx)
  469. {
  470. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_SUSP) == (DMA2D_CR_SUSP));
  471. }
  472. /**
  473. * @brief Abort DMA2D transfer.
  474. * @note This API can be used to abort automatic foreground or background CLUT loading.
  475. * @rmtoll CR ABORT LL_DMA2D_Abort
  476. * @param DMA2Dx DMA2D Instance
  477. * @retval None
  478. */
  479. __STATIC_INLINE void LL_DMA2D_Abort(DMA2D_TypeDef *DMA2Dx)
  480. {
  481. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_ABORT | DMA2D_CR_START, DMA2D_CR_ABORT);
  482. }
  483. /**
  484. * @brief Indicate if DMA2D transfer is aborted.
  485. * @note This API can be used to indicate whether or not automatic foreground or
  486. * background CLUT loading is aborted.
  487. * @rmtoll CR ABORT LL_DMA2D_IsAborted
  488. * @param DMA2Dx DMA2D Instance
  489. * @retval State of bit (1 or 0).
  490. */
  491. __STATIC_INLINE uint32_t LL_DMA2D_IsAborted(DMA2D_TypeDef *DMA2Dx)
  492. {
  493. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_ABORT) == (DMA2D_CR_ABORT));
  494. }
  495. /**
  496. * @brief Set DMA2D mode.
  497. * @rmtoll CR MODE LL_DMA2D_SetMode
  498. * @param DMA2Dx DMA2D Instance
  499. * @param Mode This parameter can be one of the following values:
  500. * @arg @ref LL_DMA2D_MODE_M2M
  501. * @arg @ref LL_DMA2D_MODE_M2M_PFC
  502. * @arg @ref LL_DMA2D_MODE_M2M_BLEND
  503. * @arg @ref LL_DMA2D_MODE_R2M
  504. * @arg @ref LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_FG (*)
  505. * @arg @ref LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_BG (*)
  506. *
  507. * (*) value not defined in all devices.
  508. * @retval None
  509. */
  510. __STATIC_INLINE void LL_DMA2D_SetMode(DMA2D_TypeDef *DMA2Dx, uint32_t Mode)
  511. {
  512. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_MODE, Mode);
  513. }
  514. /**
  515. * @brief Return DMA2D mode
  516. * @rmtoll CR MODE LL_DMA2D_GetMode
  517. * @param DMA2Dx DMA2D Instance
  518. * @retval Returned value can be one of the following values:
  519. * @arg @ref LL_DMA2D_MODE_M2M
  520. * @arg @ref LL_DMA2D_MODE_M2M_PFC
  521. * @arg @ref LL_DMA2D_MODE_M2M_BLEND
  522. * @arg @ref LL_DMA2D_MODE_R2M
  523. * @arg @ref LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_FG (*)
  524. * @arg @ref LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_BG (*)
  525. *
  526. * (*) value not defined in all devices.
  527. */
  528. __STATIC_INLINE uint32_t LL_DMA2D_GetMode(DMA2D_TypeDef *DMA2Dx)
  529. {
  530. return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_MODE));
  531. }
  532. /**
  533. * @brief Set DMA2D output color mode.
  534. * @rmtoll OPFCCR CM LL_DMA2D_SetOutputColorMode
  535. * @param DMA2Dx DMA2D Instance
  536. * @param ColorMode This parameter can be one of the following values:
  537. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
  538. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
  539. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
  540. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
  541. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
  542. * @retval None
  543. */
  544. __STATIC_INLINE void LL_DMA2D_SetOutputColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  545. {
  546. MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM, ColorMode);
  547. }
  548. /**
  549. * @brief Return DMA2D output color mode.
  550. * @rmtoll OPFCCR CM LL_DMA2D_GetOutputColorMode
  551. * @param DMA2Dx DMA2D Instance
  552. * @retval Returned value can be one of the following values:
  553. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
  554. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
  555. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
  556. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
  557. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
  558. */
  559. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(DMA2D_TypeDef *DMA2Dx)
  560. {
  561. return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM));
  562. }
  563. /**
  564. * @brief Set DMA2D output Red Blue swap mode.
  565. * @rmtoll OPFCCR RBS LL_DMA2D_SetOutputRBSwapMode
  566. * @param DMA2Dx DMA2D Instance
  567. * @param RBSwapMode This parameter can be one of the following values:
  568. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  569. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  570. * @retval None
  571. */
  572. __STATIC_INLINE void LL_DMA2D_SetOutputRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
  573. {
  574. MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_RBS, RBSwapMode);
  575. }
  576. /**
  577. * @brief Return DMA2D output Red Blue swap mode.
  578. * @rmtoll OPFCCR RBS LL_DMA2D_GetOutputRBSwapMode
  579. * @param DMA2Dx DMA2D Instance
  580. * @retval Returned value can be one of the following values:
  581. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  582. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  583. */
  584. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputRBSwapMode(DMA2D_TypeDef *DMA2Dx)
  585. {
  586. return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_RBS));
  587. }
  588. /**
  589. * @brief Set DMA2D output alpha inversion mode.
  590. * @rmtoll OPFCCR AI LL_DMA2D_SetOutputAlphaInvMode
  591. * @param DMA2Dx DMA2D Instance
  592. * @param AlphaInversionMode This parameter can be one of the following values:
  593. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  594. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  595. * @retval None
  596. */
  597. __STATIC_INLINE void LL_DMA2D_SetOutputAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
  598. {
  599. MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_AI, AlphaInversionMode);
  600. }
  601. /**
  602. * @brief Return DMA2D output alpha inversion mode.
  603. * @rmtoll OPFCCR AI LL_DMA2D_GetOutputAlphaInvMode
  604. * @param DMA2Dx DMA2D Instance
  605. * @retval Returned value can be one of the following values:
  606. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  607. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  608. */
  609. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputAlphaInvMode(DMA2D_TypeDef *DMA2Dx)
  610. {
  611. return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_AI));
  612. }
  613. #if defined(DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT)
  614. /**
  615. * @brief Set DMA2D output swap mode.
  616. * @rmtoll OPFCCR SB LL_DMA2D_SetOutputSwapMode
  617. * @param DMA2Dx DMA2D Instance
  618. * @param OutputSwapMode This parameter can be one of the following values:
  619. * @arg @ref LL_DMA2D_SWAP_MODE_REGULAR
  620. * @arg @ref LL_DMA2D_SWAP_MODE_TWO_BY_TWO
  621. * @retval None
  622. */
  623. __STATIC_INLINE void LL_DMA2D_SetOutputSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t OutputSwapMode)
  624. {
  625. MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_SB, OutputSwapMode);
  626. }
  627. /**
  628. * @brief Return DMA2D output swap mode.
  629. * @rmtoll OPFCCR SB LL_DMA2D_GetOutputSwapMode
  630. * @param DMA2Dx DMA2D Instance
  631. * @retval Returned value can be one of the following values:
  632. * @arg @ref LL_DMA2D_SWAP_MODE_REGULAR
  633. * @arg @ref LL_DMA2D_SWAP_MODE_TWO_BY_TWO
  634. */
  635. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputSwapMode(DMA2D_TypeDef *DMA2Dx)
  636. {
  637. return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_SB));
  638. }
  639. #endif /* DMA2D_OUTPUT_TWO_BY_TWO_SWAP_SUPPORT */
  640. #if defined(DMA2D_LINE_OFFSET_MODE_SUPPORT)
  641. /**
  642. * @brief Set DMA2D line offset mode.
  643. * @rmtoll CR LOM LL_DMA2D_SetLineOffsetMode
  644. * @param DMA2Dx DMA2D Instance
  645. * @param LineOffsetMode This parameter can be one of the following values:
  646. * @arg @ref LL_DMA2D_LINE_OFFSET_PIXELS
  647. * @arg @ref LL_DMA2D_LINE_OFFSET_BYTES
  648. * @retval None
  649. */
  650. __STATIC_INLINE void LL_DMA2D_SetLineOffsetMode(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffsetMode)
  651. {
  652. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_LOM, LineOffsetMode);
  653. }
  654. /**
  655. * @brief Return DMA2D line offset mode.
  656. * @rmtoll CR LOM LL_DMA2D_GetLineOffsetMode
  657. * @param DMA2Dx DMA2D Instance
  658. * @retval Returned value can be one of the following values:
  659. * @arg @ref LL_DMA2D_LINE_OFFSET_PIXELS
  660. * @arg @ref LL_DMA2D_LINE_OFFSET_BYTES
  661. */
  662. __STATIC_INLINE uint32_t LL_DMA2D_GetLineOffsetMode(DMA2D_TypeDef *DMA2Dx)
  663. {
  664. return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_LOM));
  665. }
  666. #endif /* DMA2D_LINE_OFFSET_MODE_SUPPORT */
  667. /**
  668. * @brief Set DMA2D line offset, expressed on 14 bits ([13:0] bits).
  669. * @rmtoll OOR LO LL_DMA2D_SetLineOffset
  670. * @param DMA2Dx DMA2D Instance
  671. @if DMA2D_LINE_OFFSET_MODE_SUPPORT
  672. * @param LineOffset Value between Min_Data=0 and Max_Data=0xFFFF
  673. @else
  674. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FFF
  675. @endif
  676. * @retval None
  677. */
  678. __STATIC_INLINE void LL_DMA2D_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  679. {
  680. MODIFY_REG(DMA2Dx->OOR, DMA2D_OOR_LO, LineOffset);
  681. }
  682. /**
  683. * @brief Return DMA2D line offset, expressed on 14 bits ([13:0] bits).
  684. * @rmtoll OOR LO LL_DMA2D_GetLineOffset
  685. * @param DMA2Dx DMA2D Instance
  686. @if DMA2D_LINE_OFFSET_MODE_SUPPORT
  687. * @retval Line offset value between Min_Data=0 and Max_Data=0xFFFF
  688. @else
  689. * @retval Line offset value between Min_Data=0 and Max_Data=0x3FFF
  690. @endif
  691. */
  692. __STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  693. {
  694. return (uint32_t)(READ_BIT(DMA2Dx->OOR, DMA2D_OOR_LO));
  695. }
  696. /**
  697. * @brief Set DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits).
  698. * @rmtoll NLR PL LL_DMA2D_SetNbrOfPixelsPerLines
  699. * @param DMA2Dx DMA2D Instance
  700. * @param NbrOfPixelsPerLines Value between Min_Data=0 and Max_Data=0x3FFF
  701. * @retval None
  702. */
  703. __STATIC_INLINE void LL_DMA2D_SetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfPixelsPerLines)
  704. {
  705. MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_PL, (NbrOfPixelsPerLines << DMA2D_NLR_PL_Pos));
  706. }
  707. /**
  708. * @brief Return DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits)
  709. * @rmtoll NLR PL LL_DMA2D_GetNbrOfPixelsPerLines
  710. * @param DMA2Dx DMA2D Instance
  711. * @retval Number of pixels per lines value between Min_Data=0 and Max_Data=0x3FFF
  712. */
  713. __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx)
  714. {
  715. return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_PL) >> DMA2D_NLR_PL_Pos);
  716. }
  717. /**
  718. * @brief Set DMA2D number of lines, expressed on 16 bits ([15:0] bits).
  719. * @rmtoll NLR NL LL_DMA2D_SetNbrOfLines
  720. * @param DMA2Dx DMA2D Instance
  721. * @param NbrOfLines Value between Min_Data=0 and Max_Data=0xFFFF
  722. * @retval None
  723. */
  724. __STATIC_INLINE void LL_DMA2D_SetNbrOfLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines)
  725. {
  726. MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_NL, NbrOfLines);
  727. }
  728. /**
  729. * @brief Return DMA2D number of lines, expressed on 16 bits ([15:0] bits).
  730. * @rmtoll NLR NL LL_DMA2D_GetNbrOfLines
  731. * @param DMA2Dx DMA2D Instance
  732. * @retval Number of lines value between Min_Data=0 and Max_Data=0xFFFF
  733. */
  734. __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(DMA2D_TypeDef *DMA2Dx)
  735. {
  736. return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_NL));
  737. }
  738. /**
  739. * @brief Set DMA2D output memory address, expressed on 32 bits ([31:0] bits).
  740. * @rmtoll OMAR MA LL_DMA2D_SetOutputMemAddr
  741. * @param DMA2Dx DMA2D Instance
  742. * @param OutputMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  743. * @retval None
  744. */
  745. __STATIC_INLINE void LL_DMA2D_SetOutputMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t OutputMemoryAddress)
  746. {
  747. LL_DMA2D_WriteReg(DMA2Dx, OMAR, OutputMemoryAddress);
  748. }
  749. /**
  750. * @brief Get DMA2D output memory address, expressed on 32 bits ([31:0] bits).
  751. * @rmtoll OMAR MA LL_DMA2D_GetOutputMemAddr
  752. * @param DMA2Dx DMA2D Instance
  753. * @retval Output memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  754. */
  755. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(DMA2D_TypeDef *DMA2Dx)
  756. {
  757. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, OMAR));
  758. }
  759. /**
  760. * @brief Set DMA2D output color, expressed on 32 bits ([31:0] bits).
  761. * @note Output color format depends on output color mode, ARGB8888, RGB888,
  762. * RGB565, ARGB1555 or ARGB4444.
  763. * @note LL_DMA2D_ConfigOutputColor() API may be used instead if colors values formatting
  764. * with respect to color mode is not done by the user code.
  765. * @rmtoll OCOLR BLUE LL_DMA2D_SetOutputColor\n
  766. * OCOLR GREEN LL_DMA2D_SetOutputColor\n
  767. * OCOLR RED LL_DMA2D_SetOutputColor\n
  768. * OCOLR ALPHA LL_DMA2D_SetOutputColor
  769. * @param DMA2Dx DMA2D Instance
  770. * @param OutputColor Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  771. * @retval None
  772. */
  773. __STATIC_INLINE void LL_DMA2D_SetOutputColor(DMA2D_TypeDef *DMA2Dx, uint32_t OutputColor)
  774. {
  775. MODIFY_REG(DMA2Dx->OCOLR, (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1), \
  776. OutputColor);
  777. }
  778. /**
  779. * @brief Get DMA2D output color, expressed on 32 bits ([31:0] bits).
  780. * @note Alpha channel and red, green, blue color values must be retrieved from the returned
  781. * value based on the output color mode (ARGB8888, RGB888, RGB565, ARGB1555 or ARGB4444)
  782. * as set by @ref LL_DMA2D_SetOutputColorMode.
  783. * @rmtoll OCOLR BLUE LL_DMA2D_GetOutputColor\n
  784. * OCOLR GREEN LL_DMA2D_GetOutputColor\n
  785. * OCOLR RED LL_DMA2D_GetOutputColor\n
  786. * OCOLR ALPHA LL_DMA2D_GetOutputColor
  787. * @param DMA2Dx DMA2D Instance
  788. * @retval Output color value between Min_Data=0 and Max_Data=0xFFFFFFFF
  789. */
  790. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(DMA2D_TypeDef *DMA2Dx)
  791. {
  792. return (uint32_t)(READ_BIT(DMA2Dx->OCOLR, \
  793. (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1)));
  794. }
  795. /**
  796. * @brief Set DMA2D line watermark, expressed on 16 bits ([15:0] bits).
  797. * @rmtoll LWR LW LL_DMA2D_SetLineWatermark
  798. * @param DMA2Dx DMA2D Instance
  799. * @param LineWatermark Value between Min_Data=0 and Max_Data=0xFFFF
  800. * @retval None
  801. */
  802. __STATIC_INLINE void LL_DMA2D_SetLineWatermark(DMA2D_TypeDef *DMA2Dx, uint32_t LineWatermark)
  803. {
  804. MODIFY_REG(DMA2Dx->LWR, DMA2D_LWR_LW, LineWatermark);
  805. }
  806. /**
  807. * @brief Return DMA2D line watermark, expressed on 16 bits ([15:0] bits).
  808. * @rmtoll LWR LW LL_DMA2D_GetLineWatermark
  809. * @param DMA2Dx DMA2D Instance
  810. * @retval Line watermark value between Min_Data=0 and Max_Data=0xFFFF
  811. */
  812. __STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(DMA2D_TypeDef *DMA2Dx)
  813. {
  814. return (uint32_t)(READ_BIT(DMA2Dx->LWR, DMA2D_LWR_LW));
  815. }
  816. /**
  817. * @brief Set DMA2D dead time, expressed on 8 bits ([7:0] bits).
  818. * @rmtoll AMTCR DT LL_DMA2D_SetDeadTime
  819. * @param DMA2Dx DMA2D Instance
  820. * @param DeadTime Value between Min_Data=0 and Max_Data=0xFF
  821. * @retval None
  822. */
  823. __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime)
  824. {
  825. MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos));
  826. }
  827. /**
  828. * @brief Return DMA2D dead time, expressed on 8 bits ([7:0] bits).
  829. * @rmtoll AMTCR DT LL_DMA2D_GetDeadTime
  830. * @param DMA2Dx DMA2D Instance
  831. * @retval Dead time value between Min_Data=0 and Max_Data=0xFF
  832. */
  833. __STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(DMA2D_TypeDef *DMA2Dx)
  834. {
  835. return (uint32_t)(READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_DT) >> DMA2D_AMTCR_DT_Pos);
  836. }
  837. /**
  838. * @brief Enable DMA2D dead time functionality.
  839. * @rmtoll AMTCR EN LL_DMA2D_EnableDeadTime
  840. * @param DMA2Dx DMA2D Instance
  841. * @retval None
  842. */
  843. __STATIC_INLINE void LL_DMA2D_EnableDeadTime(DMA2D_TypeDef *DMA2Dx)
  844. {
  845. SET_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
  846. }
  847. /**
  848. * @brief Disable DMA2D dead time functionality.
  849. * @rmtoll AMTCR EN LL_DMA2D_DisableDeadTime
  850. * @param DMA2Dx DMA2D Instance
  851. * @retval None
  852. */
  853. __STATIC_INLINE void LL_DMA2D_DisableDeadTime(DMA2D_TypeDef *DMA2Dx)
  854. {
  855. CLEAR_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
  856. }
  857. /**
  858. * @brief Indicate if DMA2D dead time functionality is enabled.
  859. * @rmtoll AMTCR EN LL_DMA2D_IsEnabledDeadTime
  860. * @param DMA2Dx DMA2D Instance
  861. * @retval State of bit (1 or 0).
  862. */
  863. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(DMA2D_TypeDef *DMA2Dx)
  864. {
  865. return (READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN) == (DMA2D_AMTCR_EN));
  866. }
  867. /** @defgroup DMA2D_LL_EF_FGND_Configuration Foreground Configuration Functions
  868. * @{
  869. */
  870. /**
  871. * @brief Set DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
  872. * @rmtoll FGMAR MA LL_DMA2D_FGND_SetMemAddr
  873. * @param DMA2Dx DMA2D Instance
  874. * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  875. * @retval None
  876. */
  877. __STATIC_INLINE void LL_DMA2D_FGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
  878. {
  879. LL_DMA2D_WriteReg(DMA2Dx, FGMAR, MemoryAddress);
  880. }
  881. /**
  882. * @brief Get DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
  883. * @rmtoll FGMAR MA LL_DMA2D_FGND_GetMemAddr
  884. * @param DMA2Dx DMA2D Instance
  885. * @retval Foreground memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  886. */
  887. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
  888. {
  889. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGMAR));
  890. }
  891. /**
  892. * @brief Enable DMA2D foreground CLUT loading.
  893. * @rmtoll FGPFCCR START LL_DMA2D_FGND_EnableCLUTLoad
  894. * @param DMA2Dx DMA2D Instance
  895. * @retval None
  896. */
  897. __STATIC_INLINE void LL_DMA2D_FGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  898. {
  899. SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START);
  900. }
  901. /**
  902. * @brief Indicate if DMA2D foreground CLUT loading is enabled.
  903. * @rmtoll FGPFCCR START LL_DMA2D_FGND_IsEnabledCLUTLoad
  904. * @param DMA2Dx DMA2D Instance
  905. * @retval State of bit (1 or 0).
  906. */
  907. __STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  908. {
  909. return (READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START));
  910. }
  911. /**
  912. * @brief Set DMA2D foreground color mode.
  913. * @rmtoll FGPFCCR CM LL_DMA2D_FGND_SetColorMode
  914. * @param DMA2Dx DMA2D Instance
  915. * @param ColorMode This parameter can be one of the following values:
  916. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  917. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  918. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  919. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  920. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  921. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  922. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  923. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  924. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  925. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  926. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  927. * @retval None
  928. */
  929. __STATIC_INLINE void LL_DMA2D_FGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  930. {
  931. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode);
  932. }
  933. /**
  934. * @brief Return DMA2D foreground color mode.
  935. * @rmtoll FGPFCCR CM LL_DMA2D_FGND_GetColorMode
  936. * @param DMA2Dx DMA2D Instance
  937. * @retval Returned value can be one of the following values:
  938. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  939. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  940. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  941. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  942. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  943. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  944. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  945. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  946. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  947. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  948. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  949. */
  950. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
  951. {
  952. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM));
  953. }
  954. /**
  955. * @brief Set DMA2D foreground alpha mode.
  956. * @rmtoll FGPFCCR AM LL_DMA2D_FGND_SetAlphaMode
  957. * @param DMA2Dx DMA2D Instance
  958. * @param AphaMode This parameter can be one of the following values:
  959. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  960. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  961. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  962. * @retval None
  963. */
  964. __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
  965. {
  966. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode);
  967. }
  968. /**
  969. * @brief Return DMA2D foreground alpha mode.
  970. * @rmtoll FGPFCCR AM LL_DMA2D_FGND_GetAlphaMode
  971. * @param DMA2Dx DMA2D Instance
  972. * @retval Returned value can be one of the following values:
  973. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  974. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  975. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  976. */
  977. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
  978. {
  979. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM));
  980. }
  981. /**
  982. * @brief Set DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
  983. * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_SetAlpha
  984. * @param DMA2Dx DMA2D Instance
  985. * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
  986. * @retval None
  987. */
  988. __STATIC_INLINE void LL_DMA2D_FGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
  989. {
  990. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos));
  991. }
  992. /**
  993. * @brief Return DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
  994. * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_GetAlpha
  995. * @param DMA2Dx DMA2D Instance
  996. * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
  997. */
  998. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
  999. {
  1000. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos);
  1001. }
  1002. /**
  1003. * @brief Set DMA2D foreground Red Blue swap mode.
  1004. * @rmtoll FGPFCCR RBS LL_DMA2D_FGND_SetRBSwapMode
  1005. * @param DMA2Dx DMA2D Instance
  1006. * @param RBSwapMode This parameter can be one of the following values:
  1007. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  1008. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  1009. * @retval None
  1010. */
  1011. __STATIC_INLINE void LL_DMA2D_FGND_SetRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
  1012. {
  1013. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS, RBSwapMode);
  1014. }
  1015. /**
  1016. * @brief Return DMA2D foreground Red Blue swap mode.
  1017. * @rmtoll FGPFCCR RBS LL_DMA2D_FGND_GetRBSwapMode
  1018. * @param DMA2Dx DMA2D Instance
  1019. * @retval Returned value can be one of the following values:
  1020. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  1021. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  1022. */
  1023. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRBSwapMode(DMA2D_TypeDef *DMA2Dx)
  1024. {
  1025. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS));
  1026. }
  1027. /**
  1028. * @brief Set DMA2D foreground alpha inversion mode.
  1029. * @rmtoll FGPFCCR AI LL_DMA2D_FGND_SetAlphaInvMode
  1030. * @param DMA2Dx DMA2D Instance
  1031. * @param AlphaInversionMode This parameter can be one of the following values:
  1032. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  1033. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  1034. * @retval None
  1035. */
  1036. __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
  1037. {
  1038. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AI, AlphaInversionMode);
  1039. }
  1040. /**
  1041. * @brief Return DMA2D foreground alpha inversion mode.
  1042. * @rmtoll FGPFCCR AI LL_DMA2D_FGND_GetAlphaInvMode
  1043. * @param DMA2Dx DMA2D Instance
  1044. * @retval Returned value can be one of the following values:
  1045. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  1046. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  1047. */
  1048. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaInvMode(DMA2D_TypeDef *DMA2Dx)
  1049. {
  1050. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AI));
  1051. }
  1052. /**
  1053. * @brief Set DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
  1054. * @rmtoll FGOR LO LL_DMA2D_FGND_SetLineOffset
  1055. * @param DMA2Dx DMA2D Instance
  1056. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
  1057. * @retval None
  1058. */
  1059. __STATIC_INLINE void LL_DMA2D_FGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  1060. {
  1061. MODIFY_REG(DMA2Dx->FGOR, DMA2D_FGOR_LO, LineOffset);
  1062. }
  1063. /**
  1064. * @brief Return DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
  1065. * @rmtoll FGOR LO LL_DMA2D_FGND_GetLineOffset
  1066. * @param DMA2Dx DMA2D Instance
  1067. * @retval Foreground line offset value between Min_Data=0 and Max_Data=0x3FF
  1068. */
  1069. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  1070. {
  1071. return (uint32_t)(READ_BIT(DMA2Dx->FGOR, DMA2D_FGOR_LO));
  1072. }
  1073. /**
  1074. * @brief Set DMA2D foreground color values, expressed on 24 bits ([23:0] bits).
  1075. * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetColor
  1076. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetColor
  1077. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetColor
  1078. * @param DMA2Dx DMA2D Instance
  1079. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1080. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1081. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1082. * @retval None
  1083. */
  1084. __STATIC_INLINE void LL_DMA2D_FGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
  1085. {
  1086. MODIFY_REG(DMA2Dx->FGCOLR, (DMA2D_FGCOLR_RED | DMA2D_FGCOLR_GREEN | DMA2D_FGCOLR_BLUE), \
  1087. ((Red << DMA2D_FGCOLR_RED_Pos) | (Green << DMA2D_FGCOLR_GREEN_Pos) | Blue));
  1088. }
  1089. /**
  1090. * @brief Set DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
  1091. * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetRedColor
  1092. * @param DMA2Dx DMA2D Instance
  1093. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1094. * @retval None
  1095. */
  1096. __STATIC_INLINE void LL_DMA2D_FGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
  1097. {
  1098. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED, (Red << DMA2D_FGCOLR_RED_Pos));
  1099. }
  1100. /**
  1101. * @brief Return DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
  1102. * @rmtoll FGCOLR RED LL_DMA2D_FGND_GetRedColor
  1103. * @param DMA2Dx DMA2D Instance
  1104. * @retval Red color value between Min_Data=0 and Max_Data=0xFF
  1105. */
  1106. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
  1107. {
  1108. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED) >> DMA2D_FGCOLR_RED_Pos);
  1109. }
  1110. /**
  1111. * @brief Set DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
  1112. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetGreenColor
  1113. * @param DMA2Dx DMA2D Instance
  1114. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1115. * @retval None
  1116. */
  1117. __STATIC_INLINE void LL_DMA2D_FGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
  1118. {
  1119. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN, (Green << DMA2D_FGCOLR_GREEN_Pos));
  1120. }
  1121. /**
  1122. * @brief Return DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
  1123. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_GetGreenColor
  1124. * @param DMA2Dx DMA2D Instance
  1125. * @retval Green color value between Min_Data=0 and Max_Data=0xFF
  1126. */
  1127. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
  1128. {
  1129. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN) >> DMA2D_FGCOLR_GREEN_Pos);
  1130. }
  1131. /**
  1132. * @brief Set DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
  1133. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetBlueColor
  1134. * @param DMA2Dx DMA2D Instance
  1135. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1136. * @retval None
  1137. */
  1138. __STATIC_INLINE void LL_DMA2D_FGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
  1139. {
  1140. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE, Blue);
  1141. }
  1142. /**
  1143. * @brief Return DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
  1144. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_GetBlueColor
  1145. * @param DMA2Dx DMA2D Instance
  1146. * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
  1147. */
  1148. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
  1149. {
  1150. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE));
  1151. }
  1152. /**
  1153. * @brief Set DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
  1154. * @rmtoll FGCMAR MA LL_DMA2D_FGND_SetCLUTMemAddr
  1155. * @param DMA2Dx DMA2D Instance
  1156. * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1157. * @retval None
  1158. */
  1159. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
  1160. {
  1161. LL_DMA2D_WriteReg(DMA2Dx, FGCMAR, CLUTMemoryAddress);
  1162. }
  1163. /**
  1164. * @brief Get DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
  1165. * @rmtoll FGCMAR MA LL_DMA2D_FGND_GetCLUTMemAddr
  1166. * @param DMA2Dx DMA2D Instance
  1167. * @retval Foreground CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1168. */
  1169. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
  1170. {
  1171. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGCMAR));
  1172. }
  1173. /**
  1174. * @brief Set DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
  1175. * @rmtoll FGPFCCR CS LL_DMA2D_FGND_SetCLUTSize
  1176. * @param DMA2Dx DMA2D Instance
  1177. * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
  1178. * @retval None
  1179. */
  1180. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
  1181. {
  1182. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS, (CLUTSize << DMA2D_FGPFCCR_CS_Pos));
  1183. }
  1184. /**
  1185. * @brief Get DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
  1186. * @rmtoll FGPFCCR CS LL_DMA2D_FGND_GetCLUTSize
  1187. * @param DMA2Dx DMA2D Instance
  1188. * @retval Foreground CLUT size value between Min_Data=0 and Max_Data=0xFF
  1189. */
  1190. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
  1191. {
  1192. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS) >> DMA2D_FGPFCCR_CS_Pos);
  1193. }
  1194. /**
  1195. * @brief Set DMA2D foreground CLUT color mode.
  1196. * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_SetCLUTColorMode
  1197. * @param DMA2Dx DMA2D Instance
  1198. * @param CLUTColorMode This parameter can be one of the following values:
  1199. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1200. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1201. * @retval None
  1202. */
  1203. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
  1204. {
  1205. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM, CLUTColorMode);
  1206. }
  1207. /**
  1208. * @brief Return DMA2D foreground CLUT color mode.
  1209. * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_GetCLUTColorMode
  1210. * @param DMA2Dx DMA2D Instance
  1211. * @retval Returned value can be one of the following values:
  1212. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1213. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1214. */
  1215. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
  1216. {
  1217. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM));
  1218. }
  1219. /**
  1220. * @}
  1221. */
  1222. /** @defgroup DMA2D_LL_EF_BGND_Configuration Background Configuration Functions
  1223. * @{
  1224. */
  1225. /**
  1226. * @brief Set DMA2D background memory address, expressed on 32 bits ([31:0] bits).
  1227. * @rmtoll BGMAR MA LL_DMA2D_BGND_SetMemAddr
  1228. * @param DMA2Dx DMA2D Instance
  1229. * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1230. * @retval None
  1231. */
  1232. __STATIC_INLINE void LL_DMA2D_BGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
  1233. {
  1234. LL_DMA2D_WriteReg(DMA2Dx, BGMAR, MemoryAddress);
  1235. }
  1236. /**
  1237. * @brief Get DMA2D background memory address, expressed on 32 bits ([31:0] bits).
  1238. * @rmtoll BGMAR MA LL_DMA2D_BGND_GetMemAddr
  1239. * @param DMA2Dx DMA2D Instance
  1240. * @retval Background memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1241. */
  1242. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
  1243. {
  1244. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGMAR));
  1245. }
  1246. /**
  1247. * @brief Enable DMA2D background CLUT loading.
  1248. * @rmtoll BGPFCCR START LL_DMA2D_BGND_EnableCLUTLoad
  1249. * @param DMA2Dx DMA2D Instance
  1250. * @retval None
  1251. */
  1252. __STATIC_INLINE void LL_DMA2D_BGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  1253. {
  1254. SET_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START);
  1255. }
  1256. /**
  1257. * @brief Indicate if DMA2D background CLUT loading is enabled.
  1258. * @rmtoll BGPFCCR START LL_DMA2D_BGND_IsEnabledCLUTLoad
  1259. * @param DMA2Dx DMA2D Instance
  1260. * @retval State of bit (1 or 0).
  1261. */
  1262. __STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  1263. {
  1264. return (READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START) == (DMA2D_BGPFCCR_START));
  1265. }
  1266. /**
  1267. * @brief Set DMA2D background color mode.
  1268. * @rmtoll BGPFCCR CM LL_DMA2D_BGND_SetColorMode
  1269. * @param DMA2Dx DMA2D Instance
  1270. * @param ColorMode This parameter can be one of the following values:
  1271. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  1272. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  1273. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  1274. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  1275. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  1276. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  1277. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  1278. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  1279. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  1280. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  1281. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  1282. * @retval None
  1283. */
  1284. __STATIC_INLINE void LL_DMA2D_BGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  1285. {
  1286. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM, ColorMode);
  1287. }
  1288. /**
  1289. * @brief Return DMA2D background color mode.
  1290. * @rmtoll BGPFCCR CM LL_DMA2D_BGND_GetColorMode
  1291. * @param DMA2Dx DMA2D Instance
  1292. * @retval Returned value can be one of the following values:
  1293. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  1294. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  1295. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  1296. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  1297. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  1298. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  1299. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  1300. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  1301. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  1302. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  1303. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  1304. */
  1305. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
  1306. {
  1307. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM));
  1308. }
  1309. /**
  1310. * @brief Set DMA2D background alpha mode.
  1311. * @rmtoll BGPFCCR AM LL_DMA2D_BGND_SetAlphaMode
  1312. * @param DMA2Dx DMA2D Instance
  1313. * @param AphaMode This parameter can be one of the following values:
  1314. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  1315. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  1316. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  1317. * @retval None
  1318. */
  1319. __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
  1320. {
  1321. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM, AphaMode);
  1322. }
  1323. /**
  1324. * @brief Return DMA2D background alpha mode.
  1325. * @rmtoll BGPFCCR AM LL_DMA2D_BGND_GetAlphaMode
  1326. * @param DMA2Dx DMA2D Instance
  1327. * @retval Returned value can be one of the following values:
  1328. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  1329. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  1330. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  1331. */
  1332. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
  1333. {
  1334. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM));
  1335. }
  1336. /**
  1337. * @brief Set DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
  1338. * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_SetAlpha
  1339. * @param DMA2Dx DMA2D Instance
  1340. * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
  1341. * @retval None
  1342. */
  1343. __STATIC_INLINE void LL_DMA2D_BGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
  1344. {
  1345. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA, (Alpha << DMA2D_BGPFCCR_ALPHA_Pos));
  1346. }
  1347. /**
  1348. * @brief Return DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
  1349. * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_GetAlpha
  1350. * @param DMA2Dx DMA2D Instance
  1351. * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
  1352. */
  1353. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
  1354. {
  1355. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA) >> DMA2D_BGPFCCR_ALPHA_Pos);
  1356. }
  1357. /**
  1358. * @brief Set DMA2D background Red Blue swap mode.
  1359. * @rmtoll BGPFCCR RBS LL_DMA2D_BGND_SetRBSwapMode
  1360. * @param DMA2Dx DMA2D Instance
  1361. * @param RBSwapMode This parameter can be one of the following values:
  1362. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  1363. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  1364. * @retval None
  1365. */
  1366. __STATIC_INLINE void LL_DMA2D_BGND_SetRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
  1367. {
  1368. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_RBS, RBSwapMode);
  1369. }
  1370. /**
  1371. * @brief Return DMA2D background Red Blue swap mode.
  1372. * @rmtoll BGPFCCR RBS LL_DMA2D_BGND_GetRBSwapMode
  1373. * @param DMA2Dx DMA2D Instance
  1374. * @retval Returned value can be one of the following values:
  1375. * @arg @ref LL_DMA2D_RB_MODE_REGULAR
  1376. * @arg @ref LL_DMA2D_RB_MODE_SWAP
  1377. */
  1378. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRBSwapMode(DMA2D_TypeDef *DMA2Dx)
  1379. {
  1380. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_RBS));
  1381. }
  1382. /**
  1383. * @brief Set DMA2D background alpha inversion mode.
  1384. * @rmtoll BGPFCCR AI LL_DMA2D_BGND_SetAlphaInvMode
  1385. * @param DMA2Dx DMA2D Instance
  1386. * @param AlphaInversionMode This parameter can be one of the following values:
  1387. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  1388. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  1389. * @retval None
  1390. */
  1391. __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
  1392. {
  1393. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AI, AlphaInversionMode);
  1394. }
  1395. /**
  1396. * @brief Return DMA2D background alpha inversion mode.
  1397. * @rmtoll BGPFCCR AI LL_DMA2D_BGND_GetAlphaInvMode
  1398. * @param DMA2Dx DMA2D Instance
  1399. * @retval Returned value can be one of the following values:
  1400. * @arg @ref LL_DMA2D_ALPHA_REGULAR
  1401. * @arg @ref LL_DMA2D_ALPHA_INVERTED
  1402. */
  1403. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaInvMode(DMA2D_TypeDef *DMA2Dx)
  1404. {
  1405. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AI));
  1406. }
  1407. /**
  1408. * @brief Set DMA2D background line offset, expressed on 14 bits ([13:0] bits).
  1409. * @rmtoll BGOR LO LL_DMA2D_BGND_SetLineOffset
  1410. * @param DMA2Dx DMA2D Instance
  1411. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
  1412. * @retval None
  1413. */
  1414. __STATIC_INLINE void LL_DMA2D_BGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  1415. {
  1416. MODIFY_REG(DMA2Dx->BGOR, DMA2D_BGOR_LO, LineOffset);
  1417. }
  1418. /**
  1419. * @brief Return DMA2D background line offset, expressed on 14 bits ([13:0] bits).
  1420. * @rmtoll BGOR LO LL_DMA2D_BGND_GetLineOffset
  1421. * @param DMA2Dx DMA2D Instance
  1422. * @retval Background line offset value between Min_Data=0 and Max_Data=0x3FF
  1423. */
  1424. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  1425. {
  1426. return (uint32_t)(READ_BIT(DMA2Dx->BGOR, DMA2D_BGOR_LO));
  1427. }
  1428. /**
  1429. * @brief Set DMA2D background color values, expressed on 24 bits ([23:0] bits).
  1430. * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetColor
  1431. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetColor
  1432. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetColor
  1433. * @param DMA2Dx DMA2D Instance
  1434. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1435. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1436. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1437. * @retval None
  1438. */
  1439. __STATIC_INLINE void LL_DMA2D_BGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
  1440. {
  1441. MODIFY_REG(DMA2Dx->BGCOLR, (DMA2D_BGCOLR_RED | DMA2D_BGCOLR_GREEN | DMA2D_BGCOLR_BLUE), \
  1442. ((Red << DMA2D_BGCOLR_RED_Pos) | (Green << DMA2D_BGCOLR_GREEN_Pos) | Blue));
  1443. }
  1444. /**
  1445. * @brief Set DMA2D background red color value, expressed on 8 bits ([7:0] bits).
  1446. * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetRedColor
  1447. * @param DMA2Dx DMA2D Instance
  1448. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1449. * @retval None
  1450. */
  1451. __STATIC_INLINE void LL_DMA2D_BGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
  1452. {
  1453. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED, (Red << DMA2D_BGCOLR_RED_Pos));
  1454. }
  1455. /**
  1456. * @brief Return DMA2D background red color value, expressed on 8 bits ([7:0] bits).
  1457. * @rmtoll BGCOLR RED LL_DMA2D_BGND_GetRedColor
  1458. * @param DMA2Dx DMA2D Instance
  1459. * @retval Red color value between Min_Data=0 and Max_Data=0xFF
  1460. */
  1461. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
  1462. {
  1463. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED) >> DMA2D_BGCOLR_RED_Pos);
  1464. }
  1465. /**
  1466. * @brief Set DMA2D background green color value, expressed on 8 bits ([7:0] bits).
  1467. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetGreenColor
  1468. * @param DMA2Dx DMA2D Instance
  1469. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1470. * @retval None
  1471. */
  1472. __STATIC_INLINE void LL_DMA2D_BGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
  1473. {
  1474. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN, (Green << DMA2D_BGCOLR_GREEN_Pos));
  1475. }
  1476. /**
  1477. * @brief Return DMA2D background green color value, expressed on 8 bits ([7:0] bits).
  1478. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_GetGreenColor
  1479. * @param DMA2Dx DMA2D Instance
  1480. * @retval Green color value between Min_Data=0 and Max_Data=0xFF
  1481. */
  1482. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
  1483. {
  1484. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN) >> DMA2D_BGCOLR_GREEN_Pos);
  1485. }
  1486. /**
  1487. * @brief Set DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
  1488. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetBlueColor
  1489. * @param DMA2Dx DMA2D Instance
  1490. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1491. * @retval None
  1492. */
  1493. __STATIC_INLINE void LL_DMA2D_BGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
  1494. {
  1495. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE, Blue);
  1496. }
  1497. /**
  1498. * @brief Return DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
  1499. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_GetBlueColor
  1500. * @param DMA2Dx DMA2D Instance
  1501. * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
  1502. */
  1503. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
  1504. {
  1505. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE));
  1506. }
  1507. /**
  1508. * @brief Set DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
  1509. * @rmtoll BGCMAR MA LL_DMA2D_BGND_SetCLUTMemAddr
  1510. * @param DMA2Dx DMA2D Instance
  1511. * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1512. * @retval None
  1513. */
  1514. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
  1515. {
  1516. LL_DMA2D_WriteReg(DMA2Dx, BGCMAR, CLUTMemoryAddress);
  1517. }
  1518. /**
  1519. * @brief Get DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
  1520. * @rmtoll BGCMAR MA LL_DMA2D_BGND_GetCLUTMemAddr
  1521. * @param DMA2Dx DMA2D Instance
  1522. * @retval Background CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1523. */
  1524. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
  1525. {
  1526. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGCMAR));
  1527. }
  1528. /**
  1529. * @brief Set DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
  1530. * @rmtoll BGPFCCR CS LL_DMA2D_BGND_SetCLUTSize
  1531. * @param DMA2Dx DMA2D Instance
  1532. * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
  1533. * @retval None
  1534. */
  1535. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
  1536. {
  1537. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS, (CLUTSize << DMA2D_BGPFCCR_CS_Pos));
  1538. }
  1539. /**
  1540. * @brief Get DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
  1541. * @rmtoll BGPFCCR CS LL_DMA2D_BGND_GetCLUTSize
  1542. * @param DMA2Dx DMA2D Instance
  1543. * @retval Background CLUT size value between Min_Data=0 and Max_Data=0xFF
  1544. */
  1545. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
  1546. {
  1547. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS) >> DMA2D_BGPFCCR_CS_Pos);
  1548. }
  1549. /**
  1550. * @brief Set DMA2D background CLUT color mode.
  1551. * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_SetCLUTColorMode
  1552. * @param DMA2Dx DMA2D Instance
  1553. * @param CLUTColorMode This parameter can be one of the following values:
  1554. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1555. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1556. * @retval None
  1557. */
  1558. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
  1559. {
  1560. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM, CLUTColorMode);
  1561. }
  1562. /**
  1563. * @brief Return DMA2D background CLUT color mode.
  1564. * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_GetCLUTColorMode
  1565. * @param DMA2Dx DMA2D Instance
  1566. * @retval Returned value can be one of the following values:
  1567. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1568. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1569. */
  1570. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
  1571. {
  1572. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM));
  1573. }
  1574. /**
  1575. * @}
  1576. */
  1577. /**
  1578. * @}
  1579. */
  1580. /** @defgroup DMA2D_LL_EF_FLAG_MANAGEMENT Flag Management
  1581. * @{
  1582. */
  1583. /**
  1584. * @brief Check if the DMA2D Configuration Error Interrupt Flag is set or not
  1585. * @rmtoll ISR CEIF LL_DMA2D_IsActiveFlag_CE
  1586. * @param DMA2Dx DMA2D Instance
  1587. * @retval State of bit (1 or 0).
  1588. */
  1589. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(DMA2D_TypeDef *DMA2Dx)
  1590. {
  1591. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CEIF) == (DMA2D_ISR_CEIF));
  1592. }
  1593. /**
  1594. * @brief Check if the DMA2D CLUT Transfer Complete Interrupt Flag is set or not
  1595. * @rmtoll ISR CTCIF LL_DMA2D_IsActiveFlag_CTC
  1596. * @param DMA2Dx DMA2D Instance
  1597. * @retval State of bit (1 or 0).
  1598. */
  1599. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(DMA2D_TypeDef *DMA2Dx)
  1600. {
  1601. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CTCIF) == (DMA2D_ISR_CTCIF));
  1602. }
  1603. /**
  1604. * @brief Check if the DMA2D CLUT Access Error Interrupt Flag is set or not
  1605. * @rmtoll ISR CAEIF LL_DMA2D_IsActiveFlag_CAE
  1606. * @param DMA2Dx DMA2D Instance
  1607. * @retval State of bit (1 or 0).
  1608. */
  1609. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(DMA2D_TypeDef *DMA2Dx)
  1610. {
  1611. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CAEIF) == (DMA2D_ISR_CAEIF));
  1612. }
  1613. /**
  1614. * @brief Check if the DMA2D Transfer Watermark Interrupt Flag is set or not
  1615. * @rmtoll ISR TWIF LL_DMA2D_IsActiveFlag_TW
  1616. * @param DMA2Dx DMA2D Instance
  1617. * @retval State of bit (1 or 0).
  1618. */
  1619. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(DMA2D_TypeDef *DMA2Dx)
  1620. {
  1621. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TWIF) == (DMA2D_ISR_TWIF));
  1622. }
  1623. /**
  1624. * @brief Check if the DMA2D Transfer Complete Interrupt Flag is set or not
  1625. * @rmtoll ISR TCIF LL_DMA2D_IsActiveFlag_TC
  1626. * @param DMA2Dx DMA2D Instance
  1627. * @retval State of bit (1 or 0).
  1628. */
  1629. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(DMA2D_TypeDef *DMA2Dx)
  1630. {
  1631. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TCIF) == (DMA2D_ISR_TCIF));
  1632. }
  1633. /**
  1634. * @brief Check if the DMA2D Transfer Error Interrupt Flag is set or not
  1635. * @rmtoll ISR TEIF LL_DMA2D_IsActiveFlag_TE
  1636. * @param DMA2Dx DMA2D Instance
  1637. * @retval State of bit (1 or 0).
  1638. */
  1639. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(DMA2D_TypeDef *DMA2Dx)
  1640. {
  1641. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TEIF) == (DMA2D_ISR_TEIF));
  1642. }
  1643. /**
  1644. * @brief Clear DMA2D Configuration Error Interrupt Flag
  1645. * @rmtoll IFCR CCEIF LL_DMA2D_ClearFlag_CE
  1646. * @param DMA2Dx DMA2D Instance
  1647. * @retval None
  1648. */
  1649. __STATIC_INLINE void LL_DMA2D_ClearFlag_CE(DMA2D_TypeDef *DMA2Dx)
  1650. {
  1651. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCEIF);
  1652. }
  1653. /**
  1654. * @brief Clear DMA2D CLUT Transfer Complete Interrupt Flag
  1655. * @rmtoll IFCR CCTCIF LL_DMA2D_ClearFlag_CTC
  1656. * @param DMA2Dx DMA2D Instance
  1657. * @retval None
  1658. */
  1659. __STATIC_INLINE void LL_DMA2D_ClearFlag_CTC(DMA2D_TypeDef *DMA2Dx)
  1660. {
  1661. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCTCIF);
  1662. }
  1663. /**
  1664. * @brief Clear DMA2D CLUT Access Error Interrupt Flag
  1665. * @rmtoll IFCR CAECIF LL_DMA2D_ClearFlag_CAE
  1666. * @param DMA2Dx DMA2D Instance
  1667. * @retval None
  1668. */
  1669. __STATIC_INLINE void LL_DMA2D_ClearFlag_CAE(DMA2D_TypeDef *DMA2Dx)
  1670. {
  1671. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CAECIF);
  1672. }
  1673. /**
  1674. * @brief Clear DMA2D Transfer Watermark Interrupt Flag
  1675. * @rmtoll IFCR CTWIF LL_DMA2D_ClearFlag_TW
  1676. * @param DMA2Dx DMA2D Instance
  1677. * @retval None
  1678. */
  1679. __STATIC_INLINE void LL_DMA2D_ClearFlag_TW(DMA2D_TypeDef *DMA2Dx)
  1680. {
  1681. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTWIF);
  1682. }
  1683. /**
  1684. * @brief Clear DMA2D Transfer Complete Interrupt Flag
  1685. * @rmtoll IFCR CTCIF LL_DMA2D_ClearFlag_TC
  1686. * @param DMA2Dx DMA2D Instance
  1687. * @retval None
  1688. */
  1689. __STATIC_INLINE void LL_DMA2D_ClearFlag_TC(DMA2D_TypeDef *DMA2Dx)
  1690. {
  1691. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTCIF);
  1692. }
  1693. /**
  1694. * @brief Clear DMA2D Transfer Error Interrupt Flag
  1695. * @rmtoll IFCR CTEIF LL_DMA2D_ClearFlag_TE
  1696. * @param DMA2Dx DMA2D Instance
  1697. * @retval None
  1698. */
  1699. __STATIC_INLINE void LL_DMA2D_ClearFlag_TE(DMA2D_TypeDef *DMA2Dx)
  1700. {
  1701. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTEIF);
  1702. }
  1703. /**
  1704. * @}
  1705. */
  1706. /** @defgroup DMA2D_LL_EF_IT_MANAGEMENT Interruption Management
  1707. * @{
  1708. */
  1709. /**
  1710. * @brief Enable Configuration Error Interrupt
  1711. * @rmtoll CR CEIE LL_DMA2D_EnableIT_CE
  1712. * @param DMA2Dx DMA2D Instance
  1713. * @retval None
  1714. */
  1715. __STATIC_INLINE void LL_DMA2D_EnableIT_CE(DMA2D_TypeDef *DMA2Dx)
  1716. {
  1717. SET_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
  1718. }
  1719. /**
  1720. * @brief Enable CLUT Transfer Complete Interrupt
  1721. * @rmtoll CR CTCIE LL_DMA2D_EnableIT_CTC
  1722. * @param DMA2Dx DMA2D Instance
  1723. * @retval None
  1724. */
  1725. __STATIC_INLINE void LL_DMA2D_EnableIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1726. {
  1727. SET_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
  1728. }
  1729. /**
  1730. * @brief Enable CLUT Access Error Interrupt
  1731. * @rmtoll CR CAEIE LL_DMA2D_EnableIT_CAE
  1732. * @param DMA2Dx DMA2D Instance
  1733. * @retval None
  1734. */
  1735. __STATIC_INLINE void LL_DMA2D_EnableIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1736. {
  1737. SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
  1738. }
  1739. /**
  1740. * @brief Enable Transfer Watermark Interrupt
  1741. * @rmtoll CR TWIE LL_DMA2D_EnableIT_TW
  1742. * @param DMA2Dx DMA2D Instance
  1743. * @retval None
  1744. */
  1745. __STATIC_INLINE void LL_DMA2D_EnableIT_TW(DMA2D_TypeDef *DMA2Dx)
  1746. {
  1747. SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
  1748. }
  1749. /**
  1750. * @brief Enable Transfer Complete Interrupt
  1751. * @rmtoll CR TCIE LL_DMA2D_EnableIT_TC
  1752. * @param DMA2Dx DMA2D Instance
  1753. * @retval None
  1754. */
  1755. __STATIC_INLINE void LL_DMA2D_EnableIT_TC(DMA2D_TypeDef *DMA2Dx)
  1756. {
  1757. SET_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
  1758. }
  1759. /**
  1760. * @brief Enable Transfer Error Interrupt
  1761. * @rmtoll CR TEIE LL_DMA2D_EnableIT_TE
  1762. * @param DMA2Dx DMA2D Instance
  1763. * @retval None
  1764. */
  1765. __STATIC_INLINE void LL_DMA2D_EnableIT_TE(DMA2D_TypeDef *DMA2Dx)
  1766. {
  1767. SET_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
  1768. }
  1769. /**
  1770. * @brief Disable Configuration Error Interrupt
  1771. * @rmtoll CR CEIE LL_DMA2D_DisableIT_CE
  1772. * @param DMA2Dx DMA2D Instance
  1773. * @retval None
  1774. */
  1775. __STATIC_INLINE void LL_DMA2D_DisableIT_CE(DMA2D_TypeDef *DMA2Dx)
  1776. {
  1777. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
  1778. }
  1779. /**
  1780. * @brief Disable CLUT Transfer Complete Interrupt
  1781. * @rmtoll CR CTCIE LL_DMA2D_DisableIT_CTC
  1782. * @param DMA2Dx DMA2D Instance
  1783. * @retval None
  1784. */
  1785. __STATIC_INLINE void LL_DMA2D_DisableIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1786. {
  1787. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
  1788. }
  1789. /**
  1790. * @brief Disable CLUT Access Error Interrupt
  1791. * @rmtoll CR CAEIE LL_DMA2D_DisableIT_CAE
  1792. * @param DMA2Dx DMA2D Instance
  1793. * @retval None
  1794. */
  1795. __STATIC_INLINE void LL_DMA2D_DisableIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1796. {
  1797. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
  1798. }
  1799. /**
  1800. * @brief Disable Transfer Watermark Interrupt
  1801. * @rmtoll CR TWIE LL_DMA2D_DisableIT_TW
  1802. * @param DMA2Dx DMA2D Instance
  1803. * @retval None
  1804. */
  1805. __STATIC_INLINE void LL_DMA2D_DisableIT_TW(DMA2D_TypeDef *DMA2Dx)
  1806. {
  1807. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
  1808. }
  1809. /**
  1810. * @brief Disable Transfer Complete Interrupt
  1811. * @rmtoll CR TCIE LL_DMA2D_DisableIT_TC
  1812. * @param DMA2Dx DMA2D Instance
  1813. * @retval None
  1814. */
  1815. __STATIC_INLINE void LL_DMA2D_DisableIT_TC(DMA2D_TypeDef *DMA2Dx)
  1816. {
  1817. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
  1818. }
  1819. /**
  1820. * @brief Disable Transfer Error Interrupt
  1821. * @rmtoll CR TEIE LL_DMA2D_DisableIT_TE
  1822. * @param DMA2Dx DMA2D Instance
  1823. * @retval None
  1824. */
  1825. __STATIC_INLINE void LL_DMA2D_DisableIT_TE(DMA2D_TypeDef *DMA2Dx)
  1826. {
  1827. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
  1828. }
  1829. /**
  1830. * @brief Check if the DMA2D Configuration Error interrupt source is enabled or disabled.
  1831. * @rmtoll CR CEIE LL_DMA2D_IsEnabledIT_CE
  1832. * @param DMA2Dx DMA2D Instance
  1833. * @retval State of bit (1 or 0).
  1834. */
  1835. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(DMA2D_TypeDef *DMA2Dx)
  1836. {
  1837. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CEIE) == (DMA2D_CR_CEIE));
  1838. }
  1839. /**
  1840. * @brief Check if the DMA2D CLUT Transfer Complete interrupt source is enabled or disabled.
  1841. * @rmtoll CR CTCIE LL_DMA2D_IsEnabledIT_CTC
  1842. * @param DMA2Dx DMA2D Instance
  1843. * @retval State of bit (1 or 0).
  1844. */
  1845. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1846. {
  1847. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE) == (DMA2D_CR_CTCIE));
  1848. }
  1849. /**
  1850. * @brief Check if the DMA2D CLUT Access Error interrupt source is enabled or disabled.
  1851. * @rmtoll CR CAEIE LL_DMA2D_IsEnabledIT_CAE
  1852. * @param DMA2Dx DMA2D Instance
  1853. * @retval State of bit (1 or 0).
  1854. */
  1855. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1856. {
  1857. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE));
  1858. }
  1859. /**
  1860. * @brief Check if the DMA2D Transfer Watermark interrupt source is enabled or disabled.
  1861. * @rmtoll CR TWIE LL_DMA2D_IsEnabledIT_TW
  1862. * @param DMA2Dx DMA2D Instance
  1863. * @retval State of bit (1 or 0).
  1864. */
  1865. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(DMA2D_TypeDef *DMA2Dx)
  1866. {
  1867. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE));
  1868. }
  1869. /**
  1870. * @brief Check if the DMA2D Transfer Complete interrupt source is enabled or disabled.
  1871. * @rmtoll CR TCIE LL_DMA2D_IsEnabledIT_TC
  1872. * @param DMA2Dx DMA2D Instance
  1873. * @retval State of bit (1 or 0).
  1874. */
  1875. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(DMA2D_TypeDef *DMA2Dx)
  1876. {
  1877. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TCIE) == (DMA2D_CR_TCIE));
  1878. }
  1879. /**
  1880. * @brief Check if the DMA2D Transfer Error interrupt source is enabled or disabled.
  1881. * @rmtoll CR TEIE LL_DMA2D_IsEnabledIT_TE
  1882. * @param DMA2Dx DMA2D Instance
  1883. * @retval State of bit (1 or 0).
  1884. */
  1885. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(DMA2D_TypeDef *DMA2Dx)
  1886. {
  1887. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE));
  1888. }
  1889. /**
  1890. * @}
  1891. */
  1892. #if defined(USE_FULL_LL_DRIVER)
  1893. /** @defgroup DMA2D_LL_EF_Init_Functions Initialization and De-initialization Functions
  1894. * @{
  1895. */
  1896. ErrorStatus LL_DMA2D_DeInit(DMA2D_TypeDef *DMA2Dx);
  1897. ErrorStatus LL_DMA2D_Init(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
  1898. void LL_DMA2D_StructInit(LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
  1899. void LL_DMA2D_ConfigLayer(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg, uint32_t LayerIdx);
  1900. void LL_DMA2D_LayerCfgStructInit(LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg);
  1901. void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_ColorTypeDef *DMA2D_ColorStruct);
  1902. uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1903. uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1904. uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1905. uint32_t LL_DMA2D_GetOutputAlphaColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1906. void LL_DMA2D_ConfigSize(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines);
  1907. /**
  1908. * @}
  1909. */
  1910. #endif /* USE_FULL_LL_DRIVER */
  1911. /**
  1912. * @}
  1913. */
  1914. /**
  1915. * @}
  1916. */
  1917. #endif /* defined (DMA2D) */
  1918. /**
  1919. * @}
  1920. */
  1921. #ifdef __cplusplus
  1922. }
  1923. #endif
  1924. #endif /* __STM32L4xx_LL_DMA2D_H */
  1925. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/