stm32l4xx_hal_uart_ex.c 30 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32l4xx_hal_uart_ex.c
  4. * @author MCD Application Team
  5. * @brief Extended UART HAL module driver.
  6. * This file provides firmware functions to manage the following extended
  7. * functionalities of the Universal Asynchronous Receiver Transmitter Peripheral (UART).
  8. * + Initialization and de-initialization functions
  9. * + Peripheral Control functions
  10. *
  11. *
  12. @verbatim
  13. ==============================================================================
  14. ##### UART peripheral extended features #####
  15. ==============================================================================
  16. (#) Declare a UART_HandleTypeDef handle structure.
  17. (#) For the UART RS485 Driver Enable mode, initialize the UART registers
  18. by calling the HAL_RS485Ex_Init() API.
  19. (#) FIFO mode enabling/disabling and RX/TX FIFO threshold programming.
  20. -@- When USART operates in FIFO mode, FIFO mode must be enabled prior
  21. starting RX/TX transfers. Also RX/TX FIFO thresholds must be
  22. configured prior starting RX/TX transfers.
  23. (#) Slave mode enabling/disabling and NSS pin configuration.
  24. -@- When USART operates in Slave mode, Slave mode must be enabled prior
  25. starting RX/TX transfers.
  26. @endverbatim
  27. ******************************************************************************
  28. * @attention
  29. *
  30. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  31. *
  32. * Redistribution and use in source and binary forms, with or without modification,
  33. * are permitted provided that the following conditions are met:
  34. * 1. Redistributions of source code must retain the above copyright notice,
  35. * this list of conditions and the following disclaimer.
  36. * 2. Redistributions in binary form must reproduce the above copyright notice,
  37. * this list of conditions and the following disclaimer in the documentation
  38. * and/or other materials provided with the distribution.
  39. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  40. * may be used to endorse or promote products derived from this software
  41. * without specific prior written permission.
  42. *
  43. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  44. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  45. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  46. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  47. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  48. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  49. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  50. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  51. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  52. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  53. *
  54. ******************************************************************************
  55. */
  56. /* Includes ------------------------------------------------------------------*/
  57. #include "stm32l4xx_hal.h"
  58. /** @addtogroup STM32L4xx_HAL_Driver
  59. * @{
  60. */
  61. /** @defgroup UARTEx UARTEx
  62. * @brief UART Extended HAL module driver
  63. * @{
  64. */
  65. #ifdef HAL_UART_MODULE_ENABLED
  66. /* Private typedef -----------------------------------------------------------*/
  67. /* Private define ------------------------------------------------------------*/
  68. /* Private macros ------------------------------------------------------------*/
  69. /* Private variables ---------------------------------------------------------*/
  70. /* Private function prototypes -----------------------------------------------*/
  71. /** @defgroup UARTEx_Private_Functions UARTEx Private Functions
  72. * @{
  73. */
  74. static void UARTEx_Wakeup_AddressConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection);
  75. #if defined(USART_CR1_FIFOEN)
  76. static void UARTEx_SetNbDataToProcess(UART_HandleTypeDef *huart);
  77. #endif
  78. /**
  79. * @}
  80. */
  81. /* Exported functions --------------------------------------------------------*/
  82. /** @defgroup UARTEx_Exported_Functions UARTEx Exported Functions
  83. * @{
  84. */
  85. /** @defgroup UARTEx_Exported_Functions_Group1 Initialization and de-initialization functions
  86. * @brief Extended Initialization and Configuration Functions
  87. *
  88. @verbatim
  89. ===============================================================================
  90. ##### Initialization and Configuration functions #####
  91. ===============================================================================
  92. [..]
  93. This subsection provides a set of functions allowing to initialize the USARTx or the UARTy
  94. in asynchronous mode.
  95. (+) For the asynchronous mode the parameters below can be configured:
  96. (++) Baud Rate
  97. (++) Word Length
  98. (++) Stop Bit
  99. (++) Parity: If the parity is enabled, then the MSB bit of the data written
  100. in the data register is transmitted but is changed by the parity bit.
  101. (++) Hardware flow control
  102. (++) Receiver/transmitter modes
  103. (++) Over Sampling Method
  104. (++) One-Bit Sampling Method
  105. (+) For the asynchronous mode, the following advanced features can be configured as well:
  106. (++) TX and/or RX pin level inversion
  107. (++) data logical level inversion
  108. (++) RX and TX pins swap
  109. (++) RX overrun detection disabling
  110. (++) DMA disabling on RX error
  111. (++) MSB first on communication line
  112. (++) auto Baud rate detection
  113. [..]
  114. The HAL_RS485Ex_Init() API follows the UART RS485 mode configuration
  115. procedures (details for the procedures are available in reference manual).
  116. @endverbatim
  117. Depending on the frame length defined by the M1 and M0 bits (7-bit,
  118. 8-bit or 9-bit), the possible UART formats are listed in the
  119. following table.
  120. Table 1. UART frame format.
  121. +-----------------------------------------------------------------------+
  122. | M1 bit | M0 bit | PCE bit | UART frame |
  123. |---------|---------|-----------|---------------------------------------|
  124. | 0 | 0 | 0 | | SB | 8 bit data | STB | |
  125. |---------|---------|-----------|---------------------------------------|
  126. | 0 | 0 | 1 | | SB | 7 bit data | PB | STB | |
  127. |---------|---------|-----------|---------------------------------------|
  128. | 0 | 1 | 0 | | SB | 9 bit data | STB | |
  129. |---------|---------|-----------|---------------------------------------|
  130. | 0 | 1 | 1 | | SB | 8 bit data | PB | STB | |
  131. |---------|---------|-----------|---------------------------------------|
  132. | 1 | 0 | 0 | | SB | 7 bit data | STB | |
  133. |---------|---------|-----------|---------------------------------------|
  134. | 1 | 0 | 1 | | SB | 6 bit data | PB | STB | |
  135. +-----------------------------------------------------------------------+
  136. * @{
  137. */
  138. /**
  139. * @brief Initialize the RS485 Driver enable feature according to the specified
  140. * parameters in the UART_InitTypeDef and creates the associated handle.
  141. * @param huart UART handle.
  142. * @param Polarity Select the driver enable polarity.
  143. * This parameter can be one of the following values:
  144. * @arg @ref UART_DE_POLARITY_HIGH DE signal is active high
  145. * @arg @ref UART_DE_POLARITY_LOW DE signal is active low
  146. * @param AssertionTime Driver Enable assertion time:
  147. * 5-bit value defining the time between the activation of the DE (Driver Enable)
  148. * signal and the beginning of the start bit. It is expressed in sample time
  149. * units (1/8 or 1/16 bit time, depending on the oversampling rate)
  150. * @param DeassertionTime Driver Enable deassertion time:
  151. * 5-bit value defining the time between the end of the last stop bit, in a
  152. * transmitted message, and the de-activation of the DE (Driver Enable) signal.
  153. * It is expressed in sample time units (1/8 or 1/16 bit time, depending on the
  154. * oversampling rate).
  155. * @retval HAL status
  156. */
  157. HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, uint32_t DeassertionTime)
  158. {
  159. uint32_t temp = 0x0;
  160. /* Check the UART handle allocation */
  161. if(huart == NULL)
  162. {
  163. return HAL_ERROR;
  164. }
  165. /* Check the Driver Enable UART instance */
  166. assert_param(IS_UART_DRIVER_ENABLE_INSTANCE(huart->Instance));
  167. /* Check the Driver Enable polarity */
  168. assert_param(IS_UART_DE_POLARITY(Polarity));
  169. /* Check the Driver Enable assertion time */
  170. assert_param(IS_UART_ASSERTIONTIME(AssertionTime));
  171. /* Check the Driver Enable deassertion time */
  172. assert_param(IS_UART_DEASSERTIONTIME(DeassertionTime));
  173. if(huart->gState == HAL_UART_STATE_RESET)
  174. {
  175. /* Allocate lock resource and initialize it */
  176. huart->Lock = HAL_UNLOCKED;
  177. /* Init the low level hardware : GPIO, CLOCK, CORTEX */
  178. HAL_UART_MspInit(huart);
  179. }
  180. huart->gState = HAL_UART_STATE_BUSY;
  181. /* Disable the Peripheral */
  182. __HAL_UART_DISABLE(huart);
  183. /* Set the UART Communication parameters */
  184. if (UART_SetConfig(huart) == HAL_ERROR)
  185. {
  186. return HAL_ERROR;
  187. }
  188. if(huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
  189. {
  190. UART_AdvFeatureConfig(huart);
  191. }
  192. /* Enable the Driver Enable mode by setting the DEM bit in the CR3 register */
  193. SET_BIT(huart->Instance->CR3, USART_CR3_DEM);
  194. /* Set the Driver Enable polarity */
  195. MODIFY_REG(huart->Instance->CR3, USART_CR3_DEP, Polarity);
  196. /* Set the Driver Enable assertion and deassertion times */
  197. temp = (AssertionTime << UART_CR1_DEAT_ADDRESS_LSB_POS);
  198. temp |= (DeassertionTime << UART_CR1_DEDT_ADDRESS_LSB_POS);
  199. MODIFY_REG(huart->Instance->CR1, (USART_CR1_DEDT|USART_CR1_DEAT), temp);
  200. /* Enable the Peripheral */
  201. __HAL_UART_ENABLE(huart);
  202. /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
  203. return (UART_CheckIdleState(huart));
  204. }
  205. /**
  206. * @}
  207. */
  208. /** @defgroup UARTEx_Exported_Functions_Group2 IO operation functions
  209. * @brief Extended functions
  210. *
  211. @verbatim
  212. ===============================================================================
  213. ##### IO operation functions #####
  214. ===============================================================================
  215. This subsection provides a set of Wakeup and FIFO mode related callback functions.
  216. (#) Wakeup from Stop mode Callback:
  217. (+) HAL_UARTEx_WakeupCallback()
  218. (#) TX/RX Fifos Callbacks:
  219. (+) HAL_UARTEx_RxFifoFullCallback()
  220. (+) HAL_UARTEx_TxFifoEmptyCallback()
  221. @endverbatim
  222. * @{
  223. */
  224. /**
  225. * @brief UART wakeup from Stop mode callback.
  226. * @param huart UART handle.
  227. * @retval None
  228. */
  229. __weak void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart)
  230. {
  231. /* Prevent unused argument(s) compilation warning */
  232. UNUSED(huart);
  233. /* NOTE : This function should not be modified, when the callback is needed,
  234. the HAL_UARTEx_WakeupCallback can be implemented in the user file.
  235. */
  236. }
  237. #if defined(USART_CR1_FIFOEN)
  238. /**
  239. * @brief UART RX Fifo full callback.
  240. * @param huart UART handle.
  241. * @retval None
  242. */
  243. __weak void HAL_UARTEx_RxFifoFullCallback (UART_HandleTypeDef *huart)
  244. {
  245. /* Prevent unused argument(s) compilation warning */
  246. UNUSED(huart);
  247. /* NOTE : This function should not be modified, when the callback is needed,
  248. the HAL_UARTEx_RxFifoFullCallback can be implemented in the user file.
  249. */
  250. }
  251. /**
  252. * @brief UART TX Fifo empty callback.
  253. * @param huart UART handle.
  254. * @retval None
  255. */
  256. __weak void HAL_UARTEx_TxFifoEmptyCallback (UART_HandleTypeDef *huart)
  257. {
  258. /* Prevent unused argument(s) compilation warning */
  259. UNUSED(huart);
  260. /* NOTE : This function should not be modified, when the callback is needed,
  261. the HAL_UARTEx_TxFifoEmptyCallback can be implemented in the user file.
  262. */
  263. }
  264. #endif
  265. /**
  266. * @}
  267. */
  268. /** @defgroup UARTEx_Exported_Functions_Group3 Peripheral Control functions
  269. * @brief Extended Peripheral Control functions
  270. *
  271. @verbatim
  272. ===============================================================================
  273. ##### Peripheral Control functions #####
  274. ===============================================================================
  275. [..] This section provides the following functions:
  276. (+) HAL_UARTEx_EnableClockStopMode() API enables the UART clock (HSI or LSE only) during stop mode
  277. (+) HAL_UARTEx_DisableClockStopMode() API disables the above functionality
  278. (+) HAL_MultiProcessorEx_AddressLength_Set() API optionally sets the UART node address
  279. detection length to more than 4 bits for multiprocessor address mark wake up.
  280. (+) HAL_UARTEx_StopModeWakeUpSourceConfig() API defines the wake-up from stop mode
  281. trigger: address match, Start Bit detection or RXNE bit status.
  282. (+) HAL_UARTEx_EnableStopMode() API enables the UART to wake up the MCU from stop mode
  283. (+) HAL_UARTEx_DisableStopMode() API disables the above functionality
  284. (+) HAL_UARTEx_WakeupCallback() called upon UART wakeup interrupt
  285. (+) HAL_UARTEx_EnableSPISlaveMode() API enables the SPI slave mode
  286. (+) HAL_UARTEx_DisableSPISlaveMode() API disables the SPI slave mode
  287. (+) HAL_UARTEx_ConfigNSS API configures the Slave Select input pin (NSS)
  288. (+) HAL_UARTEx_EnableFifoMode() API enables the FIFO mode
  289. (+) HAL_UARTEx_DisableFifoMode() API disables the FIFO mode
  290. (+) HAL_UARTEx_SetTxFifoThreshold() API sets the TX FIFO threshold
  291. (+) HAL_UARTEx_SetRxFifoThreshold() API sets the RX FIFO threshold
  292. @endverbatim
  293. * @{
  294. */
  295. /**
  296. * @brief By default in multiprocessor mode, when the wake up method is set
  297. * to address mark, the UART handles only 4-bit long addresses detection;
  298. * this API allows to enable longer addresses detection (6-, 7- or 8-bit
  299. * long).
  300. * @note Addresses detection lengths are: 6-bit address detection in 7-bit data mode,
  301. * 7-bit address detection in 8-bit data mode, 8-bit address detection in 9-bit data mode.
  302. * @param huart UART handle.
  303. * @param AddressLength This parameter can be one of the following values:
  304. * @arg @ref UART_ADDRESS_DETECT_4B 4-bit long address
  305. * @arg @ref UART_ADDRESS_DETECT_7B 6-, 7- or 8-bit long address
  306. * @retval HAL status
  307. */
  308. HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength)
  309. {
  310. /* Check the UART handle allocation */
  311. if(huart == NULL)
  312. {
  313. return HAL_ERROR;
  314. }
  315. /* Check the address length parameter */
  316. assert_param(IS_UART_ADDRESSLENGTH_DETECT(AddressLength));
  317. huart->gState = HAL_UART_STATE_BUSY;
  318. /* Disable the Peripheral */
  319. __HAL_UART_DISABLE(huart);
  320. /* Set the address length */
  321. MODIFY_REG(huart->Instance->CR2, USART_CR2_ADDM7, AddressLength);
  322. /* Enable the Peripheral */
  323. __HAL_UART_ENABLE(huart);
  324. /* TEACK and/or REACK to check before moving huart->gState to Ready */
  325. return (UART_CheckIdleState(huart));
  326. }
  327. /**
  328. * @brief Set Wakeup from Stop mode interrupt flag selection.
  329. * @note It is the application responsibility to enable the interrupt used as
  330. * usart_wkup interrupt source before entering low-power mode.
  331. * @param huart UART handle.
  332. * @param WakeUpSelection Address match, Start Bit detection or RXNE/RXFNE bit status.
  333. * This parameter can be one of the following values:
  334. * @arg @ref UART_WAKEUP_ON_ADDRESS
  335. * @arg @ref UART_WAKEUP_ON_STARTBIT
  336. * @arg @ref UART_WAKEUP_ON_READDATA_NONEMPTY
  337. * @retval HAL status
  338. */
  339. HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection)
  340. {
  341. HAL_StatusTypeDef status = HAL_OK;
  342. uint32_t tickstart = 0;
  343. /* check the wake-up from stop mode UART instance */
  344. assert_param(IS_UART_WAKEUP_FROMSTOP_INSTANCE(huart->Instance));
  345. /* check the wake-up selection parameter */
  346. assert_param(IS_UART_WAKEUP_SELECTION(WakeUpSelection.WakeUpEvent));
  347. /* Process Locked */
  348. __HAL_LOCK(huart);
  349. huart->gState = HAL_UART_STATE_BUSY;
  350. /* Disable the Peripheral */
  351. __HAL_UART_DISABLE(huart);
  352. /* Set the wake-up selection scheme */
  353. MODIFY_REG(huart->Instance->CR3, USART_CR3_WUS, WakeUpSelection.WakeUpEvent);
  354. if (WakeUpSelection.WakeUpEvent == UART_WAKEUP_ON_ADDRESS)
  355. {
  356. UARTEx_Wakeup_AddressConfig(huart, WakeUpSelection);
  357. }
  358. /* Enable the Peripheral */
  359. __HAL_UART_ENABLE(huart);
  360. /* Init tickstart for timeout managment*/
  361. tickstart = HAL_GetTick();
  362. /* Wait until REACK flag is set */
  363. if(UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
  364. {
  365. status = HAL_TIMEOUT;
  366. }
  367. else
  368. {
  369. /* Initialize the UART State */
  370. huart->gState = HAL_UART_STATE_READY;
  371. }
  372. /* Process Unlocked */
  373. __HAL_UNLOCK(huart);
  374. return status;
  375. }
  376. /**
  377. * @brief Enable UART Stop Mode.
  378. * @note The UART is able to wake up the MCU from Stop 1 mode as long as UART clock is HSI or LSE.
  379. * @param huart UART handle.
  380. * @retval HAL status
  381. */
  382. HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart)
  383. {
  384. /* Process Locked */
  385. __HAL_LOCK(huart);
  386. huart->gState = HAL_UART_STATE_BUSY;
  387. /* Set UESM bit */
  388. SET_BIT(huart->Instance->CR1, USART_CR1_UESM);
  389. huart->gState = HAL_UART_STATE_READY;
  390. /* Process Unlocked */
  391. __HAL_UNLOCK(huart);
  392. return HAL_OK;
  393. }
  394. /**
  395. * @brief Disable UART Stop Mode.
  396. * @param huart UART handle.
  397. * @retval HAL status
  398. */
  399. HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart)
  400. {
  401. /* Process Locked */
  402. __HAL_LOCK(huart);
  403. huart->gState = HAL_UART_STATE_BUSY;
  404. /* Clear UESM bit */
  405. CLEAR_BIT(huart->Instance->CR1, USART_CR1_UESM);
  406. huart->gState = HAL_UART_STATE_READY;
  407. /* Process Unlocked */
  408. __HAL_UNLOCK(huart);
  409. return HAL_OK;
  410. }
  411. #if defined(USART_CR2_SLVEN)
  412. /**
  413. * @brief Enable the SPI slave mode.
  414. * @note When the UART operates in SPI slave mode, it handles data flow using
  415. * the serial interface clock derived from the external SCLK signal
  416. * provided by the external master SPI device.
  417. * @note In SPI slave mode, the UART must be enabled before starting the master
  418. * communications (or between frames while the clock is stable). Otherwise,
  419. * if the UART slave is enabled while the master is in the middle of a
  420. * frame, it will become desynchronized with the master.
  421. * @note The data register of the slave needs to be ready before the first edge
  422. * of the communication clock or before the end of the ongoing communication,
  423. * otherwise the SPI slave will transmit zeros.
  424. * @param huart UART handle.
  425. * @retval HAL status
  426. */
  427. HAL_StatusTypeDef HAL_UARTEx_EnableSlaveMode(UART_HandleTypeDef *huart)
  428. {
  429. uint32_t tmpcr1 = 0;
  430. /* Check parameters */
  431. assert_param(IS_UART_SPI_SLAVE_INSTANCE(huart->Instance));
  432. /* Process Locked */
  433. __HAL_LOCK(huart);
  434. huart->gState = HAL_UART_STATE_BUSY;
  435. /* Save actual UART configuration */
  436. tmpcr1 = READ_REG(huart->Instance->CR1);
  437. /* Disable UART */
  438. __HAL_UART_DISABLE(huart);
  439. /* In SPI slave mode mode, the following bits must be kept cleared:
  440. - LINEN and CLKEN bit in the USART_CR2 register
  441. - HDSEL, SCEN and IREN bits in the USART_CR3 register.*/
  442. CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
  443. CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
  444. /* Enable SPI slave mode */
  445. SET_BIT(huart->Instance->CR2, USART_CR2_SLVEN);
  446. /* Restore UART configuration */
  447. WRITE_REG(huart->Instance->CR1, tmpcr1);
  448. huart->SlaveMode = UART_SLAVEMODE_ENABLE;
  449. huart->gState = HAL_UART_STATE_READY;
  450. /* Enable UART */
  451. __HAL_UART_ENABLE(huart);
  452. /* Process Unlocked */
  453. __HAL_UNLOCK(huart);
  454. return HAL_OK;
  455. }
  456. /**
  457. * @brief Disable the SPI slave mode.
  458. * @param huart UART handle.
  459. * @retval HAL status
  460. */
  461. HAL_StatusTypeDef HAL_UARTEx_DisableSlaveMode(UART_HandleTypeDef *huart)
  462. {
  463. uint32_t tmpcr1 = 0;
  464. /* Check parameters */
  465. assert_param(IS_UART_SPI_SLAVE_INSTANCE(huart->Instance));
  466. /* Process Locked */
  467. __HAL_LOCK(huart);
  468. huart->gState = HAL_UART_STATE_BUSY;
  469. /* Save actual UART configuration */
  470. tmpcr1 = READ_REG(huart->Instance->CR1);
  471. /* Disable UART */
  472. __HAL_UART_DISABLE(huart);
  473. /* Disable SPI slave mode */
  474. CLEAR_BIT(huart->Instance->CR2, USART_CR2_SLVEN);
  475. /* Restore UART configuration */
  476. WRITE_REG(huart->Instance->CR1, tmpcr1);
  477. huart->SlaveMode = UART_SLAVEMODE_ENABLE;
  478. huart->gState = HAL_UART_STATE_READY;
  479. /* Process Unlocked */
  480. __HAL_UNLOCK(huart);
  481. return HAL_OK;
  482. }
  483. /**
  484. * @brief Configure the Slave Select input pin (NSS).
  485. * @note Software NSS management: SPI slave will always be selected and NSS
  486. * input pin will be ignored.
  487. * @note Hardware NSS management: the SPI slave selection depends on NSS
  488. * input pin. The slave is selected when NSS is low and deselected when
  489. * NSS is high.
  490. * @param huart UART handle.
  491. * @param NSSConfig NSS configuration.
  492. * This parameter can be one of the following values:
  493. * @arg @ref UART_NSS_HARD
  494. * @arg @ref UART_NSS_SOFT
  495. * @retval HAL status
  496. */
  497. HAL_StatusTypeDef HAL_UARTEx_ConfigNSS(UART_HandleTypeDef *huart, uint32_t NSSConfig)
  498. {
  499. uint32_t tmpcr1 = 0;
  500. /* Check parameters */
  501. assert_param(IS_UART_SPI_SLAVE_INSTANCE(huart->Instance));
  502. assert_param(IS_UART_NSS(NSSConfig));
  503. /* Process Locked */
  504. __HAL_LOCK(huart);
  505. huart->gState = HAL_UART_STATE_BUSY;
  506. /* Save actual UART configuration */
  507. tmpcr1 = READ_REG(huart->Instance->CR1);
  508. /* Disable UART */
  509. __HAL_UART_DISABLE(huart);
  510. /* Program DIS_NSS bit in the USART_CR2 register */
  511. MODIFY_REG(huart->Instance->CR2, USART_CR2_DIS_NSS, NSSConfig);
  512. /* Restore UART configuration */
  513. WRITE_REG(huart->Instance->CR1, tmpcr1);
  514. huart->gState = HAL_UART_STATE_READY;
  515. /* Process Unlocked */
  516. __HAL_UNLOCK(huart);
  517. return HAL_OK;
  518. }
  519. #endif
  520. #if defined(USART_CR1_FIFOEN)
  521. /**
  522. * @brief Enable the FIFO mode.
  523. * @param huart UART handle.
  524. * @retval HAL status
  525. */
  526. HAL_StatusTypeDef HAL_UARTEx_EnableFifoMode(UART_HandleTypeDef *huart)
  527. {
  528. uint32_t tmpcr1 = 0;
  529. /* Check parameters */
  530. assert_param(IS_UART_FIFO_INSTANCE(huart->Instance));
  531. /* Process Locked */
  532. __HAL_LOCK(huart);
  533. huart->gState = HAL_UART_STATE_BUSY;
  534. /* Save actual UART configuration */
  535. tmpcr1 = READ_REG(huart->Instance->CR1);
  536. /* Disable UART */
  537. __HAL_UART_DISABLE(huart);
  538. /* Enable FIFO mode */
  539. SET_BIT(tmpcr1, USART_CR1_FIFOEN);
  540. huart->FifoMode = UART_FIFOMODE_ENABLE;
  541. /* Restore UART configuration */
  542. WRITE_REG(huart->Instance->CR1, tmpcr1);
  543. /* Determine the number of data to process during RX/TX ISR execution */
  544. UARTEx_SetNbDataToProcess(huart);
  545. huart->gState = HAL_UART_STATE_READY;
  546. /* Process Unlocked */
  547. __HAL_UNLOCK(huart);
  548. return HAL_OK;
  549. }
  550. /**
  551. * @brief Disable the FIFO mode.
  552. * @param huart UART handle.
  553. * @retval HAL status
  554. */
  555. HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart)
  556. {
  557. uint32_t tmpcr1 = 0;
  558. /* Check parameters */
  559. assert_param(IS_UART_FIFO_INSTANCE(huart->Instance));
  560. /* Process Locked */
  561. __HAL_LOCK(huart);
  562. huart->gState = HAL_UART_STATE_BUSY;
  563. /* Save actual UART configuration */
  564. tmpcr1 = READ_REG(huart->Instance->CR1);
  565. /* Disable UART */
  566. __HAL_UART_DISABLE(huart);
  567. /* Enable FIFO mode */
  568. CLEAR_BIT(tmpcr1, USART_CR1_FIFOEN);
  569. huart->FifoMode = UART_FIFOMODE_DISABLE;
  570. /* Restore UART configuration */
  571. WRITE_REG(huart->Instance->CR1, tmpcr1);
  572. huart->gState = HAL_UART_STATE_READY;
  573. /* Process Unlocked */
  574. __HAL_UNLOCK(huart);
  575. return HAL_OK;
  576. }
  577. /**
  578. * @brief Set the TXFIFO threshold.
  579. * @param huart UART handle.
  580. * @param Threshold TX FIFO threshold value
  581. * This parameter can be one of the following values:
  582. * @arg @ref UART_TXFIFO_THRESHOLD_1_8
  583. * @arg @ref UART_TXFIFO_THRESHOLD_1_4
  584. * @arg @ref UART_TXFIFO_THRESHOLD_1_2
  585. * @arg @ref UART_TXFIFO_THRESHOLD_3_4
  586. * @arg @ref UART_TXFIFO_THRESHOLD_7_8
  587. * @arg @ref UART_TXFIFO_THRESHOLD_8_8
  588. * @retval HAL status
  589. */
  590. HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold)
  591. {
  592. uint32_t tmpcr1 = 0;
  593. /* Check parameters */
  594. assert_param(IS_UART_FIFO_INSTANCE(huart->Instance));
  595. assert_param(IS_UART_TXFIFO_THRESHOLD(Threshold));
  596. /* Process Locked */
  597. __HAL_LOCK(huart);
  598. huart->gState = HAL_UART_STATE_BUSY;
  599. /* Save actual UART configuration */
  600. tmpcr1 = READ_REG(huart->Instance->CR1);
  601. /* Disable UART */
  602. __HAL_UART_DISABLE(huart);
  603. /* Update TX threshold configuration */
  604. MODIFY_REG(huart->Instance->CR3, USART_CR3_TXFTCFG, Threshold);
  605. /* Determine the number of data to process during RX/TX ISR execution */
  606. UARTEx_SetNbDataToProcess(huart);
  607. /* Restore UART configuration */
  608. WRITE_REG(huart->Instance->CR1, tmpcr1);
  609. huart->gState = HAL_UART_STATE_READY;
  610. /* Process Unlocked */
  611. __HAL_UNLOCK(huart);
  612. return HAL_OK;
  613. }
  614. /**
  615. * @brief Set the RXFIFO threshold.
  616. * @param huart UART handle.
  617. * @param Threshold RX FIFO threshold value
  618. * This parameter can be one of the following values:
  619. * @arg @ref UART_RXFIFO_THRESHOLD_1_8
  620. * @arg @ref UART_RXFIFO_THRESHOLD_1_4
  621. * @arg @ref UART_RXFIFO_THRESHOLD_1_2
  622. * @arg @ref UART_RXFIFO_THRESHOLD_3_4
  623. * @arg @ref UART_RXFIFO_THRESHOLD_7_8
  624. * @arg @ref UART_RXFIFO_THRESHOLD_8_8
  625. * @retval HAL status
  626. */
  627. HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold)
  628. {
  629. uint32_t tmpcr1 = 0;
  630. /* Check the parameters */
  631. assert_param(IS_UART_FIFO_INSTANCE(huart->Instance));
  632. assert_param(IS_UART_RXFIFO_THRESHOLD(Threshold));
  633. /* Process Locked */
  634. __HAL_LOCK(huart);
  635. huart->gState = HAL_UART_STATE_BUSY;
  636. /* Save actual UART configuration */
  637. tmpcr1 = READ_REG(huart->Instance->CR1);
  638. /* Disable UART */
  639. __HAL_UART_DISABLE(huart);
  640. /* Update RX threshold configuration */
  641. MODIFY_REG(huart->Instance->CR3, USART_CR3_RXFTCFG, Threshold);
  642. /* Determine the number of data to process during RX/TX ISR execution */
  643. UARTEx_SetNbDataToProcess(huart);
  644. /* Restore UART configuration */
  645. WRITE_REG(huart->Instance->CR1, tmpcr1);
  646. huart->gState = HAL_UART_STATE_READY;
  647. /* Process Unlocked */
  648. __HAL_UNLOCK(huart);
  649. return HAL_OK;
  650. }
  651. #endif
  652. /**
  653. * @}
  654. */
  655. /**
  656. * @}
  657. */
  658. /** @addtogroup UARTEx_Private_Functions
  659. * @{
  660. */
  661. /**
  662. * @brief Initialize the UART wake-up from stop mode parameters when triggered by address detection.
  663. * @param huart UART handle.
  664. * @param WakeUpSelection UART wake up from stop mode parameters.
  665. * @retval None
  666. */
  667. static void UARTEx_Wakeup_AddressConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection)
  668. {
  669. assert_param(IS_UART_ADDRESSLENGTH_DETECT(WakeUpSelection.AddressLength));
  670. /* Set the USART address length */
  671. MODIFY_REG(huart->Instance->CR2, USART_CR2_ADDM7, WakeUpSelection.AddressLength);
  672. /* Set the USART address node */
  673. MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, ((uint32_t)WakeUpSelection.Address << UART_CR2_ADDRESS_LSB_POS));
  674. }
  675. #if defined(USART_CR1_FIFOEN)
  676. /**
  677. * @brief Calculate the number of data to process in RX/TX ISR.
  678. * @note The RX FIFO depth and the TX FIFO depth is extracted from
  679. * the UART configuration registers.
  680. * @param huart UART handle.
  681. * @retval None
  682. */
  683. void UARTEx_SetNbDataToProcess(UART_HandleTypeDef *huart)
  684. {
  685. uint8_t rx_fifo_depth;
  686. uint8_t tx_fifo_depth;
  687. uint8_t rx_fifo_threshold;
  688. uint8_t tx_fifo_threshold;
  689. uint8_t numerator[] = {1, 1, 1, 3, 7, 1};
  690. uint8_t denominator[] = {8, 4, 2, 4, 8, 1};
  691. if (huart->FifoMode == UART_FIFOMODE_DISABLE)
  692. {
  693. huart->NbTxDataToProcess = 1;
  694. huart->NbRxDataToProcess = 1;
  695. }
  696. else
  697. {
  698. rx_fifo_depth = 8; /* RX Fifo size */
  699. tx_fifo_depth = 8; /* TX Fifo size */
  700. rx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos);
  701. tx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos);
  702. huart->NbTxDataToProcess = (uint8_t)(tx_fifo_depth * numerator[tx_fifo_threshold])/denominator[tx_fifo_threshold];
  703. huart->NbRxDataToProcess = (uint8_t)(rx_fifo_depth * numerator[rx_fifo_threshold])/denominator[rx_fifo_threshold];
  704. }
  705. }
  706. #endif
  707. /**
  708. * @}
  709. */
  710. #endif /* HAL_UART_MODULE_ENABLED */
  711. /**
  712. * @}
  713. */
  714. /**
  715. * @}
  716. */
  717. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/