stm32l4xx_ll_sdmmc.c 54 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32l4xx_ll_sdmmc.c
  4. * @author MCD Application Team
  5. * @brief SDMMC Low Layer HAL module driver.
  6. *
  7. * This file provides firmware functions to manage the following
  8. * functionalities of the SDMMC peripheral:
  9. * + Initialization/de-initialization functions
  10. * + I/O operation functions
  11. * + Peripheral Control functions
  12. * + Peripheral State functions
  13. *
  14. @verbatim
  15. ==============================================================================
  16. ##### SDMMC peripheral features #####
  17. ==============================================================================
  18. [..] The SD/SDMMC MMC card host interface (SDMMC) provides an interface between the APB2
  19. peripheral bus and MultiMedia cards (MMCs), SD memory cards, SDMMC cards and CE-ATA
  20. devices.
  21. [..] The SDMMC features include the following:
  22. (+) Full compliance with MultiMedia Card System Specification Version 4.2. Card support
  23. for three different data bus modes: 1-bit (default), 4-bit and 8-bit
  24. (+) Full compatibility with previous versions of MultiMedia Cards (forward compatibility)
  25. (+) Full compliance with SD Memory Card Specifications Version 2.0
  26. (+) Full compliance with SD I/O Card Specification Version 2.0: card support for two
  27. different data bus modes: 1-bit (default) and 4-bit
  28. (+) Full support of the CE-ATA features (full compliance with CE-ATA digital protocol
  29. Rev1.1)
  30. (+) Data transfer up to 48 MHz for the 8 bit mode
  31. (+) Data and command output enable signals to control external bidirectional drivers.
  32. ##### How to use this driver #####
  33. ==============================================================================
  34. [..]
  35. This driver is a considered as a driver of service for external devices drivers
  36. that interfaces with the SDMMC peripheral.
  37. According to the device used (SD card/ MMC card / SDMMC card ...), a set of APIs
  38. is used in the device's driver to perform SDMMC operations and functionalities.
  39. This driver is almost transparent for the final user, it is only used to implement other
  40. functionalities of the external device.
  41. [..]
  42. (+) The SDMMC clock (SDMMCCLK = 48 MHz) is coming from a specific output (MSI, PLLUSB1CLK,
  43. PLLUSB2CLK). Before start working with SDMMC peripheral make sure that the
  44. PLL is well configured.
  45. The SDMMC peripheral uses two clock signals:
  46. (++) SDMMC adapter clock (SDMMCCLK = 48 MHz)
  47. (++) APB2 bus clock (PCLK2)
  48. -@@- PCLK2 and SDMMC_CK clock frequencies must respect the following condition:
  49. Frequency(PCLK2) >= (3 / 8 x Frequency(SDMMC_CK)) for STM32L496xG and STM32L4A6xG
  50. Frequency(PCLK2) >= (3 / 4 x Frequency(SDMMC_CK)) otherwise
  51. (+) Enable/Disable peripheral clock using RCC peripheral macros related to SDMMC
  52. peripheral.
  53. (+) Enable the Power ON State using the SDMMC_PowerState_ON(SDMMCx)
  54. function and disable it using the function SDMMC_PowerState_OFF(SDMMCx).
  55. (+) Enable/Disable the clock using the __SDMMC_ENABLE()/__SDMMC_DISABLE() macros.
  56. (+) Enable/Disable the peripheral interrupts using the macros __SDMMC_ENABLE_IT(hSDMMC, IT)
  57. and __SDMMC_DISABLE_IT(hSDMMC, IT) if you need to use interrupt mode.
  58. (+) When using the DMA mode
  59. (++) Configure the DMA in the MSP layer of the external device
  60. (++) Active the needed channel Request
  61. (++) Enable the DMA using __SDMMC_DMA_ENABLE() macro or Disable it using the macro
  62. __SDMMC_DMA_DISABLE().
  63. (+) To control the CPSM (Command Path State Machine) and send
  64. commands to the card use the SDMMC_SendCommand(SDMMCx),
  65. SDMMC_GetCommandResponse() and SDMMC_GetResponse() functions. First, user has
  66. to fill the command structure (pointer to SDMMC_CmdInitTypeDef) according
  67. to the selected command to be sent.
  68. The parameters that should be filled are:
  69. (++) Command Argument
  70. (++) Command Index
  71. (++) Command Response type
  72. (++) Command Wait
  73. (++) CPSM Status (Enable or Disable).
  74. -@@- To check if the command is well received, read the SDMMC_CMDRESP
  75. register using the SDMMC_GetCommandResponse().
  76. The SDMMC responses registers (SDMMC_RESP1 to SDMMC_RESP2), use the
  77. SDMMC_GetResponse() function.
  78. (+) To control the DPSM (Data Path State Machine) and send/receive
  79. data to/from the card use the SDMMC_DataConfig(), SDMMC_GetDataCounter(),
  80. SDMMC_ReadFIFO(), SDMMC_WriteFIFO() and SDMMC_GetFIFOCount() functions.
  81. *** Read Operations ***
  82. =======================
  83. [..]
  84. (#) First, user has to fill the data structure (pointer to
  85. SDMMC_DataInitTypeDef) according to the selected data type to be received.
  86. The parameters that should be filled are:
  87. (++) Data TimeOut
  88. (++) Data Length
  89. (++) Data Block size
  90. (++) Data Transfer direction: should be from card (To SDMMC)
  91. (++) Data Transfer mode
  92. (++) DPSM Status (Enable or Disable)
  93. (#) Configure the SDMMC resources to receive the data from the card
  94. according to selected transfer mode (Refer to Step 8, 9 and 10).
  95. (#) Send the selected Read command (refer to step 11).
  96. (#) Use the SDMMC flags/interrupts to check the transfer status.
  97. *** Write Operations ***
  98. ========================
  99. [..]
  100. (#) First, user has to fill the data structure (pointer to
  101. SDMMC_DataInitTypeDef) according to the selected data type to be received.
  102. The parameters that should be filled are:
  103. (++) Data TimeOut
  104. (++) Data Length
  105. (++) Data Block size
  106. (++) Data Transfer direction: should be to card (To CARD)
  107. (++) Data Transfer mode
  108. (++) DPSM Status (Enable or Disable)
  109. (#) Configure the SDMMC resources to send the data to the card according to
  110. selected transfer mode.
  111. (#) Send the selected Write command.
  112. (#) Use the SDMMC flags/interrupts to check the transfer status.
  113. *** Command management operations ***
  114. =====================================
  115. [..]
  116. (#) The commands used for Read/Write/Erase operations are managed in
  117. separate functions.
  118. Each function allows to send the needed command with the related argument,
  119. then check the response.
  120. By the same approach, you could implement a command and check the response.
  121. @endverbatim
  122. ******************************************************************************
  123. * @attention
  124. *
  125. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  126. *
  127. * Redistribution and use in source and binary forms, with or without modification,
  128. * are permitted provided that the following conditions are met:
  129. * 1. Redistributions of source code must retain the above copyright notice,
  130. * this list of conditions and the following disclaimer.
  131. * 2. Redistributions in binary form must reproduce the above copyright notice,
  132. * this list of conditions and the following disclaimer in the documentation
  133. * and/or other materials provided with the distribution.
  134. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  135. * may be used to endorse or promote products derived from this software
  136. * without specific prior written permission.
  137. *
  138. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  139. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  140. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  141. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  142. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  143. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  144. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  145. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  146. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  147. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  148. *
  149. ******************************************************************************
  150. */
  151. /* Includes ------------------------------------------------------------------*/
  152. #include "stm32l4xx_hal.h"
  153. #if defined(SDMMC1)
  154. /** @addtogroup STM32L4xx_HAL_Driver
  155. * @{
  156. */
  157. /** @defgroup SDMMC_LL SDMMC Low Layer
  158. * @brief Low layer module for SD
  159. * @{
  160. */
  161. #if defined (HAL_SD_MODULE_ENABLED)
  162. /* Private typedef -----------------------------------------------------------*/
  163. /* Private define ------------------------------------------------------------*/
  164. /* Private macro -------------------------------------------------------------*/
  165. /* Private variables ---------------------------------------------------------*/
  166. /* Private function prototypes -----------------------------------------------*/
  167. static uint32_t SDMMC_GetCmdError(SDMMC_TypeDef *SDMMCx);
  168. static uint32_t SDMMC_GetCmdResp1(SDMMC_TypeDef *SDMMCx, uint8_t SD_CMD, uint32_t Timeout);
  169. static uint32_t SDMMC_GetCmdResp2(SDMMC_TypeDef *SDMMCx);
  170. static uint32_t SDMMC_GetCmdResp3(SDMMC_TypeDef *SDMMCx);
  171. static uint32_t SDMMC_GetCmdResp7(SDMMC_TypeDef *SDMMCx);
  172. static uint32_t SDMMC_GetCmdResp6(SDMMC_TypeDef *SDMMCx, uint8_t SD_CMD, uint16_t *pRCA);
  173. /* Exported functions --------------------------------------------------------*/
  174. /** @defgroup SDMMC_LL_Exported_Functions SDMMC Low Layer Exported Functions
  175. * @{
  176. */
  177. /** @defgroup HAL_SDMMC_LL_Group1 Initialization de-initialization functions
  178. * @brief Initialization and Configuration functions
  179. *
  180. @verbatim
  181. ===============================================================================
  182. ##### Initialization/de-initialization functions #####
  183. ===============================================================================
  184. [..] This section provides functions allowing to:
  185. @endverbatim
  186. * @{
  187. */
  188. /**
  189. * @brief Initializes the SDMMC according to the specified
  190. * parameters in the SDMMC_InitTypeDef and create the associated handle.
  191. * @param SDMMCx: Pointer to SDMMC register base
  192. * @param Init: SDMMC initialization structure
  193. * @retval HAL status
  194. */
  195. HAL_StatusTypeDef SDMMC_Init(SDMMC_TypeDef *SDMMCx, SDMMC_InitTypeDef Init)
  196. {
  197. /* Check the parameters */
  198. assert_param(IS_SDMMC_ALL_INSTANCE(SDMMCx));
  199. assert_param(IS_SDMMC_CLOCK_EDGE(Init.ClockEdge));
  200. #if !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx)
  201. assert_param(IS_SDMMC_CLOCK_BYPASS(Init.ClockBypass));
  202. #endif /* !STM32L4R5xx && !STM32L4R7xx && !STM32L4R9xx && !STM32L4S5xx && !STM32L4S7xx && !STM32L4S9xx */
  203. assert_param(IS_SDMMC_CLOCK_POWER_SAVE(Init.ClockPowerSave));
  204. assert_param(IS_SDMMC_BUS_WIDE(Init.BusWide));
  205. assert_param(IS_SDMMC_HARDWARE_FLOW_CONTROL(Init.HardwareFlowControl));
  206. assert_param(IS_SDMMC_CLKDIV(Init.ClockDiv));
  207. /* Set SDMMC configuration parameters */
  208. /* Write to SDMMC CLKCR */
  209. #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  210. MODIFY_REG(SDMMCx->CLKCR, CLKCR_CLEAR_MASK, Init.ClockEdge |\
  211. Init.ClockPowerSave |\
  212. Init.BusWide |\
  213. Init.HardwareFlowControl |\
  214. Init.ClockDiv);
  215. #else
  216. MODIFY_REG(SDMMCx->CLKCR, CLKCR_CLEAR_MASK, Init.ClockEdge |\
  217. Init.ClockBypass |\
  218. Init.ClockPowerSave |\
  219. Init.BusWide |\
  220. Init.HardwareFlowControl |\
  221. Init.ClockDiv);
  222. #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
  223. return HAL_OK;
  224. }
  225. /**
  226. * @}
  227. */
  228. /** @defgroup HAL_SDMMC_LL_Group2 IO operation functions
  229. * @brief Data transfers functions
  230. *
  231. @verbatim
  232. ===============================================================================
  233. ##### I/O operation functions #####
  234. ===============================================================================
  235. [..]
  236. This subsection provides a set of functions allowing to manage the SDMMC data
  237. transfers.
  238. @endverbatim
  239. * @{
  240. */
  241. /**
  242. * @brief Read data (word) from Rx FIFO in blocking mode (polling)
  243. * @param SDMMCx: Pointer to SDMMC register base
  244. * @retval HAL status
  245. */
  246. uint32_t SDMMC_ReadFIFO(SDMMC_TypeDef *SDMMCx)
  247. {
  248. /* Read data from Rx FIFO */
  249. return (SDMMCx->FIFO);
  250. }
  251. /**
  252. * @brief Write data (word) to Tx FIFO in blocking mode (polling)
  253. * @param SDMMCx: Pointer to SDMMC register base
  254. * @param pWriteData: pointer to data to write
  255. * @retval HAL status
  256. */
  257. HAL_StatusTypeDef SDMMC_WriteFIFO(SDMMC_TypeDef *SDMMCx, uint32_t *pWriteData)
  258. {
  259. /* Write data to FIFO */
  260. SDMMCx->FIFO = *pWriteData;
  261. return HAL_OK;
  262. }
  263. /**
  264. * @}
  265. */
  266. /** @defgroup HAL_SDMMC_LL_Group3 Peripheral Control functions
  267. * @brief management functions
  268. *
  269. @verbatim
  270. ===============================================================================
  271. ##### Peripheral Control functions #####
  272. ===============================================================================
  273. [..]
  274. This subsection provides a set of functions allowing to control the SDMMC data
  275. transfers.
  276. @endverbatim
  277. * @{
  278. */
  279. /**
  280. * @brief Set SDMMC Power state to ON.
  281. * @param SDMMCx: Pointer to SDMMC register base
  282. * @retval HAL status
  283. */
  284. HAL_StatusTypeDef SDMMC_PowerState_ON(SDMMC_TypeDef *SDMMCx)
  285. {
  286. /* Set power state to ON */
  287. #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  288. SDMMCx->POWER |= SDMMC_POWER_PWRCTRL;
  289. #else
  290. SDMMCx->POWER = SDMMC_POWER_PWRCTRL;
  291. #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
  292. return HAL_OK;
  293. }
  294. #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  295. /**
  296. * @brief Set SDMMC Power state to Power-Cycle.
  297. * @param SDMMCx: Pointer to SDMMC register base
  298. * @retval HAL status
  299. */
  300. HAL_StatusTypeDef SDMMC_PowerState_Cycle(SDMMC_TypeDef *SDMMCx)
  301. {
  302. /* Set power state to Power Cycle*/
  303. SDMMCx->POWER |= SDMMC_POWER_PWRCTRL_1;
  304. return HAL_OK;
  305. }
  306. #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
  307. /**
  308. * @brief Set SDMMC Power state to OFF.
  309. * @param SDMMCx: Pointer to SDMMC register base
  310. * @retval HAL status
  311. */
  312. HAL_StatusTypeDef SDMMC_PowerState_OFF(SDMMC_TypeDef *SDMMCx)
  313. {
  314. /* Set power state to OFF */
  315. #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  316. SDMMCx->POWER &= ~(SDMMC_POWER_PWRCTRL);
  317. #else
  318. SDMMCx->POWER = (uint32_t)0x00000000;
  319. #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
  320. return HAL_OK;
  321. }
  322. /**
  323. * @brief Get SDMMC Power state.
  324. * @param SDMMCx: Pointer to SDMMC register base
  325. * @retval Power status of the controller. The returned value can be one of the
  326. * following values:
  327. * - 0x00: Power OFF
  328. * - 0x02: Power UP
  329. * - 0x03: Power ON
  330. */
  331. uint32_t SDMMC_GetPowerState(SDMMC_TypeDef *SDMMCx)
  332. {
  333. return (SDMMCx->POWER & SDMMC_POWER_PWRCTRL);
  334. }
  335. /**
  336. * @brief Configure the SDMMC command path according to the specified parameters in
  337. * SDMMC_CmdInitTypeDef structure and send the command
  338. * @param SDMMCx: Pointer to SDMMC register base
  339. * @param Command: pointer to a SDMMC_CmdInitTypeDef structure that contains
  340. * the configuration information for the SDMMC command
  341. * @retval HAL status
  342. */
  343. HAL_StatusTypeDef SDMMC_SendCommand(SDMMC_TypeDef *SDMMCx, SDMMC_CmdInitTypeDef *Command)
  344. {
  345. /* Check the parameters */
  346. assert_param(IS_SDMMC_CMD_INDEX(Command->CmdIndex));
  347. assert_param(IS_SDMMC_RESPONSE(Command->Response));
  348. assert_param(IS_SDMMC_WAIT(Command->WaitForInterrupt));
  349. assert_param(IS_SDMMC_CPSM(Command->CPSM));
  350. /* Set the SDMMC Argument value */
  351. SDMMCx->ARG = Command->Argument;
  352. /* Set SDMMC command parameters */
  353. /* Write to SDMMC CMD register */
  354. MODIFY_REG(SDMMCx->CMD, CMD_CLEAR_MASK, Command->CmdIndex |\
  355. Command->Response |\
  356. Command->WaitForInterrupt |\
  357. Command->CPSM);
  358. return HAL_OK;
  359. }
  360. /**
  361. * @brief Return the command index of last command for which response received
  362. * @param SDMMCx: Pointer to SDMMC register base
  363. * @retval Command index of the last command response received
  364. */
  365. uint8_t SDMMC_GetCommandResponse(SDMMC_TypeDef *SDMMCx)
  366. {
  367. return (uint8_t)(SDMMCx->RESPCMD);
  368. }
  369. /**
  370. * @brief Return the response received from the card for the last command
  371. * @param SDMMCx: Pointer to SDMMC register base
  372. * @param Response: Specifies the SDMMC response register.
  373. * This parameter can be one of the following values:
  374. * @arg SDMMC_RESP1: Response Register 1
  375. * @arg SDMMC_RESP2: Response Register 2
  376. * @arg SDMMC_RESP3: Response Register 3
  377. * @arg SDMMC_RESP4: Response Register 4
  378. * @retval The Corresponding response register value
  379. */
  380. uint32_t SDMMC_GetResponse(SDMMC_TypeDef *SDMMCx, uint32_t Response)
  381. {
  382. __IO uint32_t tmp = 0;
  383. /* Check the parameters */
  384. assert_param(IS_SDMMC_RESP(Response));
  385. /* Get the response */
  386. tmp = (uint32_t)&(SDMMCx->RESP1) + Response;
  387. return (*(__IO uint32_t *) tmp);
  388. }
  389. /**
  390. * @brief Configure the SDMMC data path according to the specified
  391. * parameters in the SDMMC_DataInitTypeDef.
  392. * @param SDMMCx: Pointer to SDMMC register base
  393. * @param Data : pointer to a SDMMC_DataInitTypeDef structure
  394. * that contains the configuration information for the SDMMC data.
  395. * @retval HAL status
  396. */
  397. HAL_StatusTypeDef SDMMC_ConfigData(SDMMC_TypeDef *SDMMCx, SDMMC_DataInitTypeDef* Data)
  398. {
  399. /* Check the parameters */
  400. assert_param(IS_SDMMC_DATA_LENGTH(Data->DataLength));
  401. assert_param(IS_SDMMC_BLOCK_SIZE(Data->DataBlockSize));
  402. assert_param(IS_SDMMC_TRANSFER_DIR(Data->TransferDir));
  403. assert_param(IS_SDMMC_TRANSFER_MODE(Data->TransferMode));
  404. assert_param(IS_SDMMC_DPSM(Data->DPSM));
  405. /* Set the SDMMC Data TimeOut value */
  406. SDMMCx->DTIMER = Data->DataTimeOut;
  407. /* Set the SDMMC DataLength value */
  408. SDMMCx->DLEN = Data->DataLength;
  409. /* Set the SDMMC data configuration parameters */
  410. /* Write to SDMMC DCTRL */
  411. MODIFY_REG(SDMMCx->DCTRL, DCTRL_CLEAR_MASK, Data->DataBlockSize |\
  412. Data->TransferDir |\
  413. Data->TransferMode |\
  414. Data->DPSM);
  415. return HAL_OK;
  416. }
  417. /**
  418. * @brief Returns number of remaining data bytes to be transferred.
  419. * @param SDMMCx: Pointer to SDMMC register base
  420. * @retval Number of remaining data bytes to be transferred
  421. */
  422. uint32_t SDMMC_GetDataCounter(SDMMC_TypeDef *SDMMCx)
  423. {
  424. return (SDMMCx->DCOUNT);
  425. }
  426. /**
  427. * @brief Get the FIFO data
  428. * @param SDMMCx: Pointer to SDMMC register base
  429. * @retval Data received
  430. */
  431. uint32_t SDMMC_GetFIFOCount(SDMMC_TypeDef *SDMMCx)
  432. {
  433. return (SDMMCx->FIFO);
  434. }
  435. /**
  436. * @brief Sets one of the two options of inserting read wait interval.
  437. * @param SDMMCx: Pointer to SDMMC register base
  438. * @param SDMMC_ReadWaitMode: SDMMC Read Wait operation mode.
  439. * This parameter can be:
  440. * @arg SDMMC_READ_WAIT_MODE_CLK: Read Wait control by stopping SDMMCCLK
  441. * @arg SDMMC_READ_WAIT_MODE_DATA2: Read Wait control using SDMMC_DATA2
  442. * @retval None
  443. */
  444. HAL_StatusTypeDef SDMMC_SetSDMMCReadWaitMode(SDMMC_TypeDef *SDMMCx, uint32_t SDMMC_ReadWaitMode)
  445. {
  446. /* Check the parameters */
  447. assert_param(IS_SDMMC_READWAIT_MODE(SDMMC_ReadWaitMode));
  448. /* Set SDMMC read wait mode */
  449. MODIFY_REG(SDMMCx->DCTRL, SDMMC_DCTRL_RWMOD, SDMMC_ReadWaitMode);
  450. return HAL_OK;
  451. }
  452. /**
  453. * @}
  454. */
  455. /** @defgroup HAL_SDMMC_LL_Group4 Command management functions
  456. * @brief Data transfers functions
  457. *
  458. @verbatim
  459. ===============================================================================
  460. ##### Commands management functions #####
  461. ===============================================================================
  462. [..]
  463. This subsection provides a set of functions allowing to manage the needed commands.
  464. @endverbatim
  465. * @{
  466. */
  467. /**
  468. * @brief Send the Data Block Lenght command and check the response
  469. * @param SDMMCx: Pointer to SDMMC register base
  470. * @retval HAL status
  471. */
  472. uint32_t SDMMC_CmdBlockLength(SDMMC_TypeDef *SDMMCx, uint32_t BlockSize)
  473. {
  474. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  475. uint32_t errorstate = SDMMC_ERROR_NONE;
  476. /* Set Block Size for Card */
  477. sdmmc_cmdinit.Argument = (uint32_t)BlockSize;
  478. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_BLOCKLEN;
  479. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  480. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  481. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  482. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  483. /* Check for error conditions */
  484. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_SET_BLOCKLEN, SDMMC_CMDTIMEOUT);
  485. return errorstate;
  486. }
  487. /**
  488. * @brief Send the Read Single Block command and check the response
  489. * @param SDMMCx: Pointer to SDMMC register base
  490. * @retval HAL status
  491. */
  492. uint32_t SDMMC_CmdReadSingleBlock(SDMMC_TypeDef *SDMMCx, uint32_t ReadAdd)
  493. {
  494. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  495. uint32_t errorstate = SDMMC_ERROR_NONE;
  496. /* Set Block Size for Card */
  497. sdmmc_cmdinit.Argument = (uint32_t)ReadAdd;
  498. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_READ_SINGLE_BLOCK;
  499. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  500. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  501. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  502. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  503. /* Check for error conditions */
  504. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_READ_SINGLE_BLOCK, SDMMC_CMDTIMEOUT);
  505. return errorstate;
  506. }
  507. /**
  508. * @brief Send the Read Multi Block command and check the response
  509. * @param SDMMCx: Pointer to SDMMC register base
  510. * @retval HAL status
  511. */
  512. uint32_t SDMMC_CmdReadMultiBlock(SDMMC_TypeDef *SDMMCx, uint32_t ReadAdd)
  513. {
  514. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  515. uint32_t errorstate = SDMMC_ERROR_NONE;
  516. /* Set Block Size for Card */
  517. sdmmc_cmdinit.Argument = (uint32_t)ReadAdd;
  518. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_READ_MULT_BLOCK;
  519. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  520. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  521. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  522. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  523. /* Check for error conditions */
  524. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_READ_MULT_BLOCK, SDMMC_CMDTIMEOUT);
  525. return errorstate;
  526. }
  527. /**
  528. * @brief Send the Write Single Block command and check the response
  529. * @param SDMMCx: Pointer to SDMMC register base
  530. * @retval HAL status
  531. */
  532. uint32_t SDMMC_CmdWriteSingleBlock(SDMMC_TypeDef *SDMMCx, uint32_t WriteAdd)
  533. {
  534. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  535. uint32_t errorstate = SDMMC_ERROR_NONE;
  536. /* Set Block Size for Card */
  537. sdmmc_cmdinit.Argument = (uint32_t)WriteAdd;
  538. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_WRITE_SINGLE_BLOCK;
  539. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  540. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  541. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  542. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  543. /* Check for error conditions */
  544. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_WRITE_SINGLE_BLOCK, SDMMC_CMDTIMEOUT);
  545. return errorstate;
  546. }
  547. /**
  548. * @brief Send the Write Multi Block command and check the response
  549. * @param SDMMCx: Pointer to SDMMC register base
  550. * @retval HAL status
  551. */
  552. uint32_t SDMMC_CmdWriteMultiBlock(SDMMC_TypeDef *SDMMCx, uint32_t WriteAdd)
  553. {
  554. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  555. uint32_t errorstate = SDMMC_ERROR_NONE;
  556. /* Set Block Size for Card */
  557. sdmmc_cmdinit.Argument = (uint32_t)WriteAdd;
  558. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_WRITE_MULT_BLOCK;
  559. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  560. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  561. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  562. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  563. /* Check for error conditions */
  564. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_WRITE_MULT_BLOCK, SDMMC_CMDTIMEOUT);
  565. return errorstate;
  566. }
  567. /**
  568. * @brief Send the Start Address Erase command for SD and check the response
  569. * @param SDMMCx: Pointer to SDMMC register base
  570. * @retval HAL status
  571. */
  572. uint32_t SDMMC_CmdSDEraseStartAdd(SDMMC_TypeDef *SDMMCx, uint32_t StartAdd)
  573. {
  574. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  575. uint32_t errorstate = SDMMC_ERROR_NONE;
  576. /* Set Block Size for Card */
  577. sdmmc_cmdinit.Argument = (uint32_t)StartAdd;
  578. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_ERASE_GRP_START;
  579. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  580. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  581. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  582. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  583. /* Check for error conditions */
  584. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_SD_ERASE_GRP_START, SDMMC_CMDTIMEOUT);
  585. return errorstate;
  586. }
  587. /**
  588. * @brief Send the End Address Erase command for SD and check the response
  589. * @param SDMMCx: Pointer to SDMMC register base
  590. * @retval HAL status
  591. */
  592. uint32_t SDMMC_CmdSDEraseEndAdd(SDMMC_TypeDef *SDMMCx, uint32_t EndAdd)
  593. {
  594. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  595. uint32_t errorstate = SDMMC_ERROR_NONE;
  596. /* Set Block Size for Card */
  597. sdmmc_cmdinit.Argument = (uint32_t)EndAdd;
  598. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_ERASE_GRP_END;
  599. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  600. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  601. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  602. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  603. /* Check for error conditions */
  604. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_SD_ERASE_GRP_END, SDMMC_CMDTIMEOUT);
  605. return errorstate;
  606. }
  607. /**
  608. * @brief Send the Start Address Erase command and check the response
  609. * @param SDMMCx: Pointer to SDMMC register base
  610. * @retval HAL status
  611. */
  612. uint32_t SDMMC_CmdEraseStartAdd(SDMMC_TypeDef *SDMMCx, uint32_t StartAdd)
  613. {
  614. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  615. uint32_t errorstate = SDMMC_ERROR_NONE;
  616. /* Set Block Size for Card */
  617. sdmmc_cmdinit.Argument = (uint32_t)StartAdd;
  618. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE_GRP_START;
  619. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  620. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  621. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  622. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  623. /* Check for error conditions */
  624. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_ERASE_GRP_START, SDMMC_CMDTIMEOUT);
  625. return errorstate;
  626. }
  627. /**
  628. * @brief Send the End Address Erase command and check the response
  629. * @param SDMMCx: Pointer to SDMMC register base
  630. * @retval HAL status
  631. */
  632. uint32_t SDMMC_CmdEraseEndAdd(SDMMC_TypeDef *SDMMCx, uint32_t EndAdd)
  633. {
  634. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  635. uint32_t errorstate = SDMMC_ERROR_NONE;
  636. /* Set Block Size for Card */
  637. sdmmc_cmdinit.Argument = (uint32_t)EndAdd;
  638. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE_GRP_END;
  639. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  640. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  641. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  642. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  643. /* Check for error conditions */
  644. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_ERASE_GRP_END, SDMMC_CMDTIMEOUT);
  645. return errorstate;
  646. }
  647. /**
  648. * @brief Send the Erase command and check the response
  649. * @param SDMMCx: Pointer to SDMMC register base
  650. * @retval HAL status
  651. */
  652. uint32_t SDMMC_CmdErase(SDMMC_TypeDef *SDMMCx)
  653. {
  654. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  655. uint32_t errorstate = SDMMC_ERROR_NONE;
  656. /* Set Block Size for Card */
  657. sdmmc_cmdinit.Argument = 0;
  658. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE;
  659. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  660. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  661. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  662. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  663. /* Check for error conditions */
  664. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_ERASE, SDMMC_MAXERASETIMEOUT);
  665. return errorstate;
  666. }
  667. /**
  668. * @brief Send the Stop Transfer command and check the response.
  669. * @param SDMMCx: Pointer to SDMMC register base
  670. * @retval HAL status
  671. */
  672. uint32_t SDMMC_CmdStopTransfer(SDMMC_TypeDef *SDMMCx)
  673. {
  674. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  675. uint32_t errorstate = SDMMC_ERROR_NONE;
  676. /* Send CMD12 STOP_TRANSMISSION */
  677. sdmmc_cmdinit.Argument = 0;
  678. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_STOP_TRANSMISSION;
  679. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  680. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  681. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  682. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  683. /* Check for error conditions */
  684. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_STOP_TRANSMISSION, SDMMC_STOPTRANSFERTIMEOUT);
  685. return errorstate;
  686. }
  687. /**
  688. * @brief Send the Select Deselect command and check the response.
  689. * @param SDMMCx: Pointer to SDMMC register base
  690. * @param addr: Address of the card to be selected
  691. * @retval HAL status
  692. */
  693. uint32_t SDMMC_CmdSelDesel(SDMMC_TypeDef *SDMMCx, uint64_t Addr)
  694. {
  695. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  696. uint32_t errorstate = SDMMC_ERROR_NONE;
  697. /* Send CMD7 SDMMC_SEL_DESEL_CARD */
  698. sdmmc_cmdinit.Argument = (uint32_t)Addr;
  699. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEL_DESEL_CARD;
  700. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  701. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  702. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  703. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  704. /* Check for error conditions */
  705. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_SEL_DESEL_CARD, SDMMC_CMDTIMEOUT);
  706. return errorstate;
  707. }
  708. /**
  709. * @brief Send the Go Idle State command and check the response.
  710. * @param SDMMCx: Pointer to SDMMC register base
  711. * @retval HAL status
  712. */
  713. uint32_t SDMMC_CmdGoIdleState(SDMMC_TypeDef *SDMMCx)
  714. {
  715. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  716. uint32_t errorstate = SDMMC_ERROR_NONE;
  717. sdmmc_cmdinit.Argument = 0;
  718. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_GO_IDLE_STATE;
  719. sdmmc_cmdinit.Response = SDMMC_RESPONSE_NO;
  720. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  721. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  722. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  723. /* Check for error conditions */
  724. errorstate = SDMMC_GetCmdError(SDMMCx);
  725. return errorstate;
  726. }
  727. /**
  728. * @brief Send the Operating Condition command and check the response.
  729. * @param SDMMCx: Pointer to SDMMC register base
  730. * @retval HAL status
  731. */
  732. uint32_t SDMMC_CmdOperCond(SDMMC_TypeDef *SDMMCx)
  733. {
  734. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  735. uint32_t errorstate = SDMMC_ERROR_NONE;
  736. /* Send CMD8 to verify SD card interface operating condition */
  737. /* Argument: - [31:12]: Reserved (shall be set to '0')
  738. - [11:8]: Supply Voltage (VHS) 0x1 (Range: 2.7-3.6 V)
  739. - [7:0]: Check Pattern (recommended 0xAA) */
  740. /* CMD Response: R7 */
  741. sdmmc_cmdinit.Argument = SDMMC_CHECK_PATTERN;
  742. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_HS_SEND_EXT_CSD;
  743. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  744. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  745. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  746. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  747. /* Check for error conditions */
  748. errorstate = SDMMC_GetCmdResp7(SDMMCx);
  749. return errorstate;
  750. }
  751. /**
  752. * @brief Send the Application command to verify that that the next command
  753. * is an application specific com-mand rather than a standard command
  754. * and check the response.
  755. * @param SDMMCx: Pointer to SDMMC register base
  756. * @param Argument: Command Argument
  757. * @retval HAL status
  758. */
  759. uint32_t SDMMC_CmdAppCommand(SDMMC_TypeDef *SDMMCx, uint32_t Argument)
  760. {
  761. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  762. uint32_t errorstate = SDMMC_ERROR_NONE;
  763. sdmmc_cmdinit.Argument = (uint32_t)Argument;
  764. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_APP_CMD;
  765. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  766. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  767. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  768. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  769. /* Check for error conditions */
  770. /* If there is a HAL_ERROR, it is a MMC card, else
  771. it is a SD card: SD card 2.0 (voltage range mismatch)
  772. or SD card 1.x */
  773. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_APP_CMD, SDMMC_CMDTIMEOUT);
  774. return errorstate;
  775. }
  776. /**
  777. * @brief Send the command asking the accessed card to send its operating
  778. * condition register (OCR)
  779. * @param SDMMCx: Pointer to SDMMC register base
  780. * @param Argument: Command Argument
  781. * @retval HAL status
  782. */
  783. uint32_t SDMMC_CmdAppOperCommand(SDMMC_TypeDef *SDMMCx, uint32_t Argument)
  784. {
  785. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  786. uint32_t errorstate = SDMMC_ERROR_NONE;
  787. #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  788. sdmmc_cmdinit.Argument = Argument;
  789. #else
  790. sdmmc_cmdinit.Argument = SDMMC_VOLTAGE_WINDOW_SD | Argument;
  791. #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
  792. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_OP_COND;
  793. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  794. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  795. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  796. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  797. /* Check for error conditions */
  798. errorstate = SDMMC_GetCmdResp3(SDMMCx);
  799. return errorstate;
  800. }
  801. /**
  802. * @brief Send the Bus Width command and check the response.
  803. * @param SDMMCx: Pointer to SDMMC register base
  804. * @param BusWidth: BusWidth
  805. * @retval HAL status
  806. */
  807. uint32_t SDMMC_CmdBusWidth(SDMMC_TypeDef *SDMMCx, uint32_t BusWidth)
  808. {
  809. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  810. uint32_t errorstate = SDMMC_ERROR_NONE;
  811. sdmmc_cmdinit.Argument = (uint32_t)BusWidth;
  812. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_APP_SD_SET_BUSWIDTH;
  813. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  814. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  815. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  816. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  817. /* Check for error conditions */
  818. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_APP_SD_SET_BUSWIDTH, SDMMC_CMDTIMEOUT);
  819. return errorstate;
  820. }
  821. /**
  822. * @brief Send the Send SCR command and check the response.
  823. * @param SDMMCx: Pointer to SDMMC register base
  824. * @retval HAL status
  825. */
  826. uint32_t SDMMC_CmdSendSCR(SDMMC_TypeDef *SDMMCx)
  827. {
  828. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  829. uint32_t errorstate = SDMMC_ERROR_NONE;
  830. /* Send CMD51 SD_APP_SEND_SCR */
  831. sdmmc_cmdinit.Argument = 0;
  832. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_SEND_SCR;
  833. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  834. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  835. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  836. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  837. /* Check for error conditions */
  838. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_SD_APP_SEND_SCR, SDMMC_CMDTIMEOUT);
  839. return errorstate;
  840. }
  841. /**
  842. * @brief Send the Send CID command and check the response.
  843. * @param SDMMCx: Pointer to SDMMC register base
  844. * @retval HAL status
  845. */
  846. uint32_t SDMMC_CmdSendCID(SDMMC_TypeDef *SDMMCx)
  847. {
  848. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  849. uint32_t errorstate = SDMMC_ERROR_NONE;
  850. /* Send CMD2 ALL_SEND_CID */
  851. sdmmc_cmdinit.Argument = 0;
  852. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ALL_SEND_CID;
  853. sdmmc_cmdinit.Response = SDMMC_RESPONSE_LONG;
  854. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  855. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  856. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  857. /* Check for error conditions */
  858. errorstate = SDMMC_GetCmdResp2(SDMMCx);
  859. return errorstate;
  860. }
  861. /**
  862. * @brief Send the Send CSD command and check the response.
  863. * @param SDMMCx: Pointer to SDMMC register base
  864. * @param Argument: Command Argument
  865. * @retval HAL status
  866. */
  867. uint32_t SDMMC_CmdSendCSD(SDMMC_TypeDef *SDMMCx, uint32_t Argument)
  868. {
  869. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  870. uint32_t errorstate = SDMMC_ERROR_NONE;
  871. /* Send CMD9 SEND_CSD */
  872. sdmmc_cmdinit.Argument = Argument;
  873. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_CSD;
  874. sdmmc_cmdinit.Response = SDMMC_RESPONSE_LONG;
  875. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  876. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  877. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  878. /* Check for error conditions */
  879. errorstate = SDMMC_GetCmdResp2(SDMMCx);
  880. return errorstate;
  881. }
  882. /**
  883. * @brief Send the Send CSD command and check the response.
  884. * @param SDMMCx: Pointer to SDMMC register base
  885. * @param pRCA: Card RCA
  886. * @retval HAL status
  887. */
  888. uint32_t SDMMC_CmdSetRelAdd(SDMMC_TypeDef *SDMMCx, uint16_t *pRCA)
  889. {
  890. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  891. uint32_t errorstate = SDMMC_ERROR_NONE;
  892. /* Send CMD3 SD_CMD_SET_REL_ADDR */
  893. sdmmc_cmdinit.Argument = 0;
  894. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_REL_ADDR;
  895. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  896. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  897. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  898. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  899. /* Check for error conditions */
  900. errorstate = SDMMC_GetCmdResp6(SDMMCx, SDMMC_CMD_SET_REL_ADDR, pRCA);
  901. return errorstate;
  902. }
  903. /**
  904. * @brief Send the Status command and check the response.
  905. * @param SDMMCx: Pointer to SDMMC register base
  906. * @param Argument: Command Argument
  907. * @retval HAL status
  908. */
  909. uint32_t SDMMC_CmdSendStatus(SDMMC_TypeDef *SDMMCx, uint32_t Argument)
  910. {
  911. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  912. uint32_t errorstate = SDMMC_ERROR_NONE;
  913. sdmmc_cmdinit.Argument = Argument;
  914. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_STATUS;
  915. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  916. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  917. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  918. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  919. /* Check for error conditions */
  920. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_SEND_STATUS, SDMMC_CMDTIMEOUT);
  921. return errorstate;
  922. }
  923. /**
  924. * @brief Send the Status register command and check the response.
  925. * @param SDMMCx: Pointer to SDMMC register base
  926. * @retval HAL status
  927. */
  928. uint32_t SDMMC_CmdStatusRegister(SDMMC_TypeDef *SDMMCx)
  929. {
  930. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  931. uint32_t errorstate = SDMMC_ERROR_NONE;
  932. sdmmc_cmdinit.Argument = 0;
  933. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_STATUS;
  934. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  935. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  936. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  937. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  938. /* Check for error conditions */
  939. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_SD_APP_STATUS, SDMMC_CMDTIMEOUT);
  940. return errorstate;
  941. }
  942. /**
  943. * @brief Sends host capacity support information and activates the card's
  944. * initialization process. Send SDMMC_CMD_SEND_OP_COND command
  945. * @param SDIOx: Pointer to SDIO register base
  946. * @parame Argument: Argument used for the command
  947. * @retval HAL status
  948. */
  949. uint32_t SDMMC_CmdOpCondition(SDMMC_TypeDef *SDMMCx, uint32_t Argument)
  950. {
  951. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  952. uint32_t errorstate = SDMMC_ERROR_NONE;
  953. sdmmc_cmdinit.Argument = Argument;
  954. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_OP_COND;
  955. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  956. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  957. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  958. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  959. /* Check for error conditions */
  960. errorstate = SDMMC_GetCmdResp3(SDMMCx);
  961. return errorstate;
  962. }
  963. /**
  964. * @brief Checks switchable function and switch card function. SDMMC_CMD_HS_SWITCH comand
  965. * @param SDIOx: Pointer to SDIO register base
  966. * @parame Argument: Argument used for the command
  967. * @retval HAL status
  968. */
  969. uint32_t SDMMC_CmdSwitch(SDMMC_TypeDef *SDMMCx, uint32_t Argument)
  970. {
  971. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  972. uint32_t errorstate = SDMMC_ERROR_NONE;
  973. sdmmc_cmdinit.Argument = Argument;
  974. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_HS_SWITCH;
  975. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  976. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  977. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  978. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  979. /* Check for error conditions */
  980. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_HS_SWITCH, SDMMC_CMDTIMEOUT);
  981. return errorstate;
  982. }
  983. #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  984. /**
  985. * @brief Send the command asking the accessed card to send its operating
  986. * condition register (OCR)
  987. * @param None
  988. * @retval HAL status
  989. */
  990. uint32_t SDMMC_CmdVoltageSwitch(SDMMC_TypeDef *SDMMCx)
  991. {
  992. SDMMC_CmdInitTypeDef sdmmc_cmdinit;
  993. uint32_t errorstate = SDMMC_ERROR_NONE;
  994. sdmmc_cmdinit.Argument = 0x00000000;
  995. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_VOLTAGE_SWITCH;
  996. sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
  997. sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
  998. sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
  999. SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
  1000. /* Check for error conditions */
  1001. errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_VOLTAGE_SWITCH, SDMMC_CMDTIMEOUT);
  1002. return errorstate;
  1003. }
  1004. #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
  1005. /**
  1006. * @}
  1007. */
  1008. /* Private function ----------------------------------------------------------*/
  1009. /** @addtogroup SD_Private_Functions
  1010. * @{
  1011. */
  1012. /**
  1013. * @brief Checks for error conditions for CMD0.
  1014. * @param hsd: SD handle
  1015. * @retval SD Card error state
  1016. */
  1017. static uint32_t SDMMC_GetCmdError(SDMMC_TypeDef *SDMMCx)
  1018. {
  1019. /* 8 is the number of required instructions cycles for the below loop statement.
  1020. The SDMMC_CMDTIMEOUT is expressed in ms */
  1021. register uint32_t count = SDMMC_CMDTIMEOUT * (SystemCoreClock / 8 /1000);
  1022. do
  1023. {
  1024. if (count-- == 0)
  1025. {
  1026. return SDMMC_ERROR_TIMEOUT;
  1027. }
  1028. }while(!__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CMDSENT));
  1029. /* Clear all the static flags */
  1030. __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_STATIC_CMD_FLAGS);
  1031. return SDMMC_ERROR_NONE;
  1032. }
  1033. /**
  1034. * @brief Checks for error conditions for R1 response.
  1035. * @param hsd: SD handle
  1036. * @param SD_CMD: The sent command index
  1037. * @retval SD Card error state
  1038. */
  1039. static uint32_t SDMMC_GetCmdResp1(SDMMC_TypeDef *SDMMCx, uint8_t SD_CMD, uint32_t Timeout)
  1040. {
  1041. uint32_t response_r1;
  1042. uint32_t flags;
  1043. flags = SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT;
  1044. /* 8 is the number of required instructions cycles for the below loop statement.
  1045. The Timeout is expressed in ms */
  1046. register uint32_t count = Timeout * (SystemCoreClock / 8 /1000);
  1047. do
  1048. {
  1049. if (count-- == 0)
  1050. {
  1051. return SDMMC_ERROR_TIMEOUT;
  1052. }
  1053. }while(!__SDMMC_GET_FLAG(SDMMCx, flags));
  1054. if(__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT))
  1055. {
  1056. __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT);
  1057. return SDMMC_ERROR_CMD_RSP_TIMEOUT;
  1058. }
  1059. else if(__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL))
  1060. {
  1061. __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL);
  1062. return SDMMC_ERROR_CMD_CRC_FAIL;
  1063. }
  1064. /* Check response received is of desired command */
  1065. if(SDMMC_GetCommandResponse(SDMMCx) != SD_CMD)
  1066. {
  1067. return SDMMC_ERROR_CMD_CRC_FAIL;
  1068. }
  1069. /* Clear all the static flags */
  1070. __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_STATIC_CMD_FLAGS);
  1071. /* We have received response, retrieve it for analysis */
  1072. response_r1 = SDMMC_GetResponse(SDMMCx, SDMMC_RESP1);
  1073. if((response_r1 & SDMMC_OCR_ERRORBITS) == SDMMC_ALLZERO)
  1074. {
  1075. return SDMMC_ERROR_NONE;
  1076. }
  1077. else if((response_r1 & SDMMC_OCR_ADDR_OUT_OF_RANGE) == SDMMC_OCR_ADDR_OUT_OF_RANGE)
  1078. {
  1079. return SDMMC_ERROR_ADDR_OUT_OF_RANGE;
  1080. }
  1081. else if((response_r1 & SDMMC_OCR_ADDR_MISALIGNED) == SDMMC_OCR_ADDR_MISALIGNED)
  1082. {
  1083. return SDMMC_ERROR_ADDR_MISALIGNED;
  1084. }
  1085. else if((response_r1 & SDMMC_OCR_BLOCK_LEN_ERR) == SDMMC_OCR_BLOCK_LEN_ERR)
  1086. {
  1087. return SDMMC_ERROR_BLOCK_LEN_ERR;
  1088. }
  1089. else if((response_r1 & SDMMC_OCR_ERASE_SEQ_ERR) == SDMMC_OCR_ERASE_SEQ_ERR)
  1090. {
  1091. return SDMMC_ERROR_ERASE_SEQ_ERR;
  1092. }
  1093. else if((response_r1 & SDMMC_OCR_BAD_ERASE_PARAM) == SDMMC_OCR_BAD_ERASE_PARAM)
  1094. {
  1095. return SDMMC_ERROR_BAD_ERASE_PARAM;
  1096. }
  1097. else if((response_r1 & SDMMC_OCR_WRITE_PROT_VIOLATION) == SDMMC_OCR_WRITE_PROT_VIOLATION)
  1098. {
  1099. return SDMMC_ERROR_WRITE_PROT_VIOLATION;
  1100. }
  1101. else if((response_r1 & SDMMC_OCR_LOCK_UNLOCK_FAILED) == SDMMC_OCR_LOCK_UNLOCK_FAILED)
  1102. {
  1103. return SDMMC_ERROR_LOCK_UNLOCK_FAILED;
  1104. }
  1105. else if((response_r1 & SDMMC_OCR_COM_CRC_FAILED) == SDMMC_OCR_COM_CRC_FAILED)
  1106. {
  1107. return SDMMC_ERROR_COM_CRC_FAILED;
  1108. }
  1109. else if((response_r1 & SDMMC_OCR_ILLEGAL_CMD) == SDMMC_OCR_ILLEGAL_CMD)
  1110. {
  1111. return SDMMC_ERROR_ILLEGAL_CMD;
  1112. }
  1113. else if((response_r1 & SDMMC_OCR_CARD_ECC_FAILED) == SDMMC_OCR_CARD_ECC_FAILED)
  1114. {
  1115. return SDMMC_ERROR_CARD_ECC_FAILED;
  1116. }
  1117. else if((response_r1 & SDMMC_OCR_CC_ERROR) == SDMMC_OCR_CC_ERROR)
  1118. {
  1119. return SDMMC_ERROR_CC_ERR;
  1120. }
  1121. else if((response_r1 & SDMMC_OCR_STREAM_READ_UNDERRUN) == SDMMC_OCR_STREAM_READ_UNDERRUN)
  1122. {
  1123. return SDMMC_ERROR_STREAM_READ_UNDERRUN;
  1124. }
  1125. else if((response_r1 & SDMMC_OCR_STREAM_WRITE_OVERRUN) == SDMMC_OCR_STREAM_WRITE_OVERRUN)
  1126. {
  1127. return SDMMC_ERROR_STREAM_WRITE_OVERRUN;
  1128. }
  1129. else if((response_r1 & SDMMC_OCR_CID_CSD_OVERWRITE) == SDMMC_OCR_CID_CSD_OVERWRITE)
  1130. {
  1131. return SDMMC_ERROR_CID_CSD_OVERWRITE;
  1132. }
  1133. else if((response_r1 & SDMMC_OCR_WP_ERASE_SKIP) == SDMMC_OCR_WP_ERASE_SKIP)
  1134. {
  1135. return SDMMC_ERROR_WP_ERASE_SKIP;
  1136. }
  1137. else if((response_r1 & SDMMC_OCR_CARD_ECC_DISABLED) == SDMMC_OCR_CARD_ECC_DISABLED)
  1138. {
  1139. return SDMMC_ERROR_CARD_ECC_DISABLED;
  1140. }
  1141. else if((response_r1 & SDMMC_OCR_ERASE_RESET) == SDMMC_OCR_ERASE_RESET)
  1142. {
  1143. return SDMMC_ERROR_ERASE_RESET;
  1144. }
  1145. else if((response_r1 & SDMMC_OCR_AKE_SEQ_ERROR) == SDMMC_OCR_AKE_SEQ_ERROR)
  1146. {
  1147. return SDMMC_ERROR_AKE_SEQ_ERR;
  1148. }
  1149. else
  1150. {
  1151. return SDMMC_ERROR_GENERAL_UNKNOWN_ERR;
  1152. }
  1153. }
  1154. /**
  1155. * @brief Checks for error conditions for R2 (CID or CSD) response.
  1156. * @param hsd: SD handle
  1157. * @retval SD Card error state
  1158. */
  1159. static uint32_t SDMMC_GetCmdResp2(SDMMC_TypeDef *SDMMCx)
  1160. {
  1161. /* 8 is the number of required instructions cycles for the below loop statement.
  1162. The SDMMC_CMDTIMEOUT is expressed in ms */
  1163. register uint32_t count = SDMMC_CMDTIMEOUT * (SystemCoreClock / 8 /1000);
  1164. do
  1165. {
  1166. if (count-- == 0)
  1167. {
  1168. return SDMMC_ERROR_TIMEOUT;
  1169. }
  1170. }while(!__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT));
  1171. if (__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT))
  1172. {
  1173. __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT);
  1174. return SDMMC_ERROR_CMD_RSP_TIMEOUT;
  1175. }
  1176. else if (__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL))
  1177. {
  1178. __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL);
  1179. return SDMMC_ERROR_CMD_CRC_FAIL;
  1180. }
  1181. else
  1182. {
  1183. /* No error flag set */
  1184. /* Clear all the static flags */
  1185. __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_STATIC_CMD_FLAGS);
  1186. }
  1187. return SDMMC_ERROR_NONE;
  1188. }
  1189. /**
  1190. * @brief Checks for error conditions for R3 (OCR) response.
  1191. * @param hsd: SD handle
  1192. * @retval SD Card error state
  1193. */
  1194. static uint32_t SDMMC_GetCmdResp3(SDMMC_TypeDef *SDMMCx)
  1195. {
  1196. /* 8 is the number of required instructions cycles for the below loop statement.
  1197. The SDMMC_CMDTIMEOUT is expressed in ms */
  1198. register uint32_t count = SDMMC_CMDTIMEOUT * (SystemCoreClock / 8 /1000);
  1199. do
  1200. {
  1201. if (count-- == 0)
  1202. {
  1203. return SDMMC_ERROR_TIMEOUT;
  1204. }
  1205. }while(!__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT));
  1206. if(__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT))
  1207. {
  1208. __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT);
  1209. return SDMMC_ERROR_CMD_RSP_TIMEOUT;
  1210. }
  1211. else
  1212. {
  1213. /* Clear all the static flags */
  1214. __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_STATIC_CMD_FLAGS);
  1215. }
  1216. return SDMMC_ERROR_NONE;
  1217. }
  1218. /**
  1219. * @brief Checks for error conditions for R6 (RCA) response.
  1220. * @param hsd: SD handle
  1221. * @param SD_CMD: The sent command index
  1222. * @param pRCA: Pointer to the variable that will contain the SD card relative
  1223. * address RCA
  1224. * @retval SD Card error state
  1225. */
  1226. static uint32_t SDMMC_GetCmdResp6(SDMMC_TypeDef *SDMMCx, uint8_t SD_CMD, uint16_t *pRCA)
  1227. {
  1228. uint32_t response_r1;
  1229. /* 8 is the number of required instructions cycles for the below loop statement.
  1230. The SDMMC_CMDTIMEOUT is expressed in ms */
  1231. register uint32_t count = SDMMC_CMDTIMEOUT * (SystemCoreClock / 8 /1000);
  1232. do
  1233. {
  1234. if (count-- == 0)
  1235. {
  1236. return SDMMC_ERROR_TIMEOUT;
  1237. }
  1238. }while(!__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT));
  1239. if(__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT))
  1240. {
  1241. __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT);
  1242. return SDMMC_ERROR_CMD_RSP_TIMEOUT;
  1243. }
  1244. else if(__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL))
  1245. {
  1246. __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL);
  1247. return SDMMC_ERROR_CMD_CRC_FAIL;
  1248. }
  1249. /* Check response received is of desired command */
  1250. if(SDMMC_GetCommandResponse(SDMMCx) != SD_CMD)
  1251. {
  1252. return SDMMC_ERROR_CMD_CRC_FAIL;
  1253. }
  1254. /* Clear all the static flags */
  1255. __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_STATIC_CMD_FLAGS);
  1256. /* We have received response, retrieve it. */
  1257. response_r1 = SDMMC_GetResponse(SDMMCx, SDMMC_RESP1);
  1258. if((response_r1 & (SDMMC_R6_GENERAL_UNKNOWN_ERROR | SDMMC_R6_ILLEGAL_CMD | SDMMC_R6_COM_CRC_FAILED)) == SDMMC_ALLZERO)
  1259. {
  1260. *pRCA = (uint16_t) (response_r1 >> 16);
  1261. return SDMMC_ERROR_NONE;
  1262. }
  1263. else if((response_r1 & SDMMC_R6_ILLEGAL_CMD) == SDMMC_R6_ILLEGAL_CMD)
  1264. {
  1265. return SDMMC_ERROR_ILLEGAL_CMD;
  1266. }
  1267. else if((response_r1 & SDMMC_R6_COM_CRC_FAILED) == SDMMC_R6_COM_CRC_FAILED)
  1268. {
  1269. return SDMMC_ERROR_COM_CRC_FAILED;
  1270. }
  1271. else
  1272. {
  1273. return SDMMC_ERROR_GENERAL_UNKNOWN_ERR;
  1274. }
  1275. }
  1276. /**
  1277. * @brief Checks for error conditions for R7 response.
  1278. * @param hsd: SD handle
  1279. * @retval SD Card error state
  1280. */
  1281. static uint32_t SDMMC_GetCmdResp7(SDMMC_TypeDef *SDMMCx)
  1282. {
  1283. /* 8 is the number of required instructions cycles for the below loop statement.
  1284. The SDMMC_CMDTIMEOUT is expressed in ms */
  1285. register uint32_t count = SDMMC_CMDTIMEOUT * (SystemCoreClock / 8 /1000);
  1286. do
  1287. {
  1288. if (count-- == 0)
  1289. {
  1290. return SDMMC_ERROR_TIMEOUT;
  1291. }
  1292. }while(!__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT));
  1293. if(__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT))
  1294. {
  1295. /* Card is SD V2.0 compliant */
  1296. __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT);
  1297. return SDMMC_ERROR_CMD_RSP_TIMEOUT;
  1298. }
  1299. else if(__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL))
  1300. {
  1301. /* Card is SD V2.0 compliant */
  1302. __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL);
  1303. return SDMMC_ERROR_CMD_CRC_FAIL;
  1304. }
  1305. if(__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CMDREND))
  1306. {
  1307. /* Card is SD V2.0 compliant */
  1308. __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CMDREND);
  1309. }
  1310. return SDMMC_ERROR_NONE;
  1311. }
  1312. /**
  1313. * @}
  1314. */
  1315. /**
  1316. * @}
  1317. */
  1318. #endif /* (HAL_SD_MODULE_ENABLED) */
  1319. /**
  1320. * @}
  1321. */
  1322. /**
  1323. * @}
  1324. */
  1325. #endif /* SDMMC1 */
  1326. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/