stm32l4xx_hal_pcd.h 36 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32l4xx_hal_pcd.h
  4. * @author MCD Application Team
  5. * @brief Header file of PCD HAL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  10. *
  11. * Redistribution and use in source and binary forms, with or without modification,
  12. * are permitted provided that the following conditions are met:
  13. * 1. Redistributions of source code must retain the above copyright notice,
  14. * this list of conditions and the following disclaimer.
  15. * 2. Redistributions in binary form must reproduce the above copyright notice,
  16. * this list of conditions and the following disclaimer in the documentation
  17. * and/or other materials provided with the distribution.
  18. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  19. * may be used to endorse or promote products derived from this software
  20. * without specific prior written permission.
  21. *
  22. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  23. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  25. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  26. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  28. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  29. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. ******************************************************************************
  34. */
  35. /* Define to prevent recursive inclusion -------------------------------------*/
  36. #ifndef __STM32L4xx_HAL_PCD_H
  37. #define __STM32L4xx_HAL_PCD_H
  38. #ifdef __cplusplus
  39. extern "C" {
  40. #endif
  41. #if defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx) || \
  42. defined(STM32L452xx) || defined(STM32L462xx) || \
  43. defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \
  44. defined(STM32L496xx) || defined(STM32L4A6xx) || \
  45. defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  46. /* Includes ------------------------------------------------------------------*/
  47. #include "stm32l4xx_ll_usb.h"
  48. /** @addtogroup STM32L4xx_HAL_Driver
  49. * @{
  50. */
  51. /** @addtogroup PCD
  52. * @{
  53. */
  54. /* Exported types ------------------------------------------------------------*/
  55. /** @defgroup PCD_Exported_Types PCD Exported Types
  56. * @{
  57. */
  58. /**
  59. * @brief PCD State structure definition
  60. */
  61. typedef enum
  62. {
  63. HAL_PCD_STATE_RESET = 0x00,
  64. HAL_PCD_STATE_READY = 0x01,
  65. HAL_PCD_STATE_ERROR = 0x02,
  66. HAL_PCD_STATE_BUSY = 0x03,
  67. HAL_PCD_STATE_TIMEOUT = 0x04
  68. } PCD_StateTypeDef;
  69. /* Device LPM suspend state */
  70. typedef enum
  71. {
  72. LPM_L0 = 0x00, /* on */
  73. LPM_L1 = 0x01, /* LPM L1 sleep */
  74. LPM_L2 = 0x02, /* suspend */
  75. LPM_L3 = 0x03, /* off */
  76. }PCD_LPM_StateTypeDef;
  77. #if defined (USB)
  78. /**
  79. * @brief PCD double buffered endpoint direction
  80. */
  81. typedef enum
  82. {
  83. PCD_EP_DBUF_OUT,
  84. PCD_EP_DBUF_IN,
  85. PCD_EP_DBUF_ERR,
  86. }PCD_EP_DBUF_DIR;
  87. /**
  88. * @brief PCD endpoint buffer number
  89. */
  90. typedef enum
  91. {
  92. PCD_EP_NOBUF,
  93. PCD_EP_BUF0,
  94. PCD_EP_BUF1
  95. }PCD_EP_BUF_NUM;
  96. #endif /* USB */
  97. #if defined (USB_OTG_FS)
  98. typedef USB_OTG_GlobalTypeDef PCD_TypeDef;
  99. typedef USB_OTG_CfgTypeDef PCD_InitTypeDef;
  100. typedef USB_OTG_EPTypeDef PCD_EPTypeDef;
  101. #endif /* USB_OTG_FS */
  102. #if defined (USB)
  103. typedef USB_TypeDef PCD_TypeDef;
  104. typedef USB_CfgTypeDef PCD_InitTypeDef;
  105. typedef USB_EPTypeDef PCD_EPTypeDef;
  106. #endif /* USB */
  107. // Added for MBED PR #3062
  108. typedef struct
  109. {
  110. HAL_LockTypeDef Lock;
  111. } PCD_EPLockDef;
  112. /**
  113. * @brief PCD Handle Structure definition
  114. */
  115. typedef struct
  116. {
  117. PCD_TypeDef *Instance; /*!< Register base address */
  118. PCD_InitTypeDef Init; /*!< PCD required parameters */
  119. __IO uint8_t USB_Address; /*!< USB Address: not used by USB OTG FS */
  120. PCD_EPTypeDef IN_ep[15]; /*!< IN endpoint parameters */
  121. PCD_EPTypeDef OUT_ep[15]; /*!< OUT endpoint parameters */
  122. HAL_LockTypeDef Lock; /*!< PCD peripheral status */
  123. // Added for MBED PR #3062
  124. PCD_EPLockDef EPLock[15];
  125. __IO PCD_StateTypeDef State; /*!< PCD communication state */
  126. uint32_t Setup[12]; /*!< Setup packet buffer */
  127. PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */
  128. uint32_t BESL;
  129. uint32_t lpm_active; /*!< Enable or disable the Link Power Management .
  130. This parameter can be set to ENABLE or DISABLE */
  131. uint32_t battery_charging_active; /*!< Enable or disable Battery charging.
  132. This parameter can be set to ENABLE or DISABLE */
  133. void *pData; /*!< Pointer to upper stack Handler */
  134. } PCD_HandleTypeDef;
  135. /**
  136. * @}
  137. */
  138. /* Include PCD HAL Extended module */
  139. #include "stm32l4xx_hal_pcd_ex.h"
  140. /* Exported constants --------------------------------------------------------*/
  141. /** @defgroup PCD_Exported_Constants PCD Exported Constants
  142. * @{
  143. */
  144. /** @defgroup PCD_Speed PCD Speed
  145. * @{
  146. */
  147. #define PCD_SPEED_FULL 1
  148. /**
  149. * @}
  150. */
  151. /** @defgroup PCD_PHY_Module PCD PHY Module
  152. * @{
  153. */
  154. #define PCD_PHY_EMBEDDED 1
  155. /**
  156. * @}
  157. */
  158. /** @defgroup PCD_Turnaround_Timeout Turnaround Timeout Value
  159. * @{
  160. */
  161. #ifndef USBD_FS_TRDT_VALUE
  162. #define USBD_FS_TRDT_VALUE 5
  163. #endif /* USBD_FS_TRDT_VALUE */
  164. /**
  165. * @}
  166. */
  167. /**
  168. * @}
  169. */
  170. /* Exported macros -----------------------------------------------------------*/
  171. /** @defgroup PCD_Exported_Macros PCD Exported Macros
  172. * @brief macros to handle interrupts and specific clock configurations
  173. * @{
  174. */
  175. #if defined (USB_OTG_FS)
  176. #define __HAL_PCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance)
  177. #define __HAL_PCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance)
  178. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
  179. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) &= (__INTERRUPT__))
  180. #define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0)
  181. #define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= \
  182. ~(USB_OTG_PCGCCTL_STOPCLK)
  183. #define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK
  184. #define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE))&0x10)
  185. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE
  186. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE)
  187. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG() EXTI->PR1 & (USB_OTG_FS_WAKEUP_EXTI_LINE)
  188. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR1 = USB_OTG_FS_WAKEUP_EXTI_LINE
  189. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() do {\
  190. EXTI->FTSR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
  191. EXTI->RTSR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE;\
  192. } while(0)
  193. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE() do {\
  194. EXTI->FTSR1 |= (USB_OTG_FS_WAKEUP_EXTI_LINE);\
  195. EXTI->RTSR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
  196. } while(0)
  197. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() do {\
  198. EXTI->RTSR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
  199. EXTI->FTSR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
  200. EXTI->RTSR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE;\
  201. EXTI->FTSR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE;\
  202. } while(0)
  203. #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT() (EXTI->SWIER1 |= USB_OTG_FS_WAKEUP_EXTI_LINE)
  204. #endif /* USB_OTG_FS */
  205. #if defined (USB)
  206. #define __HAL_PCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance)
  207. #define __HAL_PCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance)
  208. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
  209. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__))
  210. #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR1 |= USB_WAKEUP_EXTI_LINE
  211. #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR1 &= ~(USB_WAKEUP_EXTI_LINE)
  212. #define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR1 & (USB_WAKEUP_EXTI_LINE)
  213. #define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR1 = USB_WAKEUP_EXTI_LINE
  214. #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() do {\
  215. EXTI->FTSR1 &= ~(USB_WAKEUP_EXTI_LINE);\
  216. EXTI->RTSR1 |= USB_WAKEUP_EXTI_LINE;\
  217. } while(0)
  218. #define __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE() do {\
  219. EXTI->FTSR1 |= (USB_WAKEUP_EXTI_LINE);\
  220. EXTI->RTSR1 &= ~(USB_WAKEUP_EXTI_LINE);\
  221. } while(0)
  222. #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() do {\
  223. EXTI->RTSR1 &= ~(USB_WAKEUP_EXTI_LINE);\
  224. EXTI->FTSR1 &= ~(USB_WAKEUP_EXTI_LINE);\
  225. EXTI->RTSR1 |= USB_WAKEUP_EXTI_LINE;\
  226. EXTI->FTSR1 |= USB_WAKEUP_EXTI_LINE;\
  227. } while(0)
  228. #define __HAL_USB_WAKEUP_EXTI_GENERATE_SWIT() (EXTI->SWIER1 |= USB_WAKEUP_EXTI_LINE)
  229. #endif /* USB */
  230. /**
  231. * @}
  232. */
  233. /** @addtogroup PCD_Exported_Functions PCD Exported Functions
  234. * @{
  235. */
  236. /* Initialization/de-initialization functions ********************************/
  237. /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
  238. * @{
  239. */
  240. HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
  241. HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd);
  242. void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
  243. void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
  244. /**
  245. * @}
  246. */
  247. /* I/O operation functions ***************************************************/
  248. /* Non-Blocking mode: Interrupt */
  249. /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
  250. * @{
  251. */
  252. /* Non-Blocking mode: Interrupt */
  253. HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
  254. HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
  255. void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
  256. void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  257. void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  258. void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
  259. void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
  260. void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
  261. void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
  262. void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
  263. void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  264. void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  265. void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
  266. void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
  267. /**
  268. * @}
  269. */
  270. /* Peripheral Control functions **********************************************/
  271. /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
  272. * @{
  273. */
  274. HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
  275. HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
  276. HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
  277. HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
  278. HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  279. HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  280. HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  281. uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  282. HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  283. HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  284. HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  285. HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  286. HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  287. /**
  288. * @}
  289. */
  290. /* Peripheral State functions ************************************************/
  291. /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
  292. * @{
  293. */
  294. PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
  295. /**
  296. * @}
  297. */
  298. /**
  299. * @}
  300. */
  301. /* Private constants ---------------------------------------------------------*/
  302. /** @defgroup PCD_Private_Constants PCD Private Constants
  303. * @{
  304. */
  305. /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
  306. * @{
  307. */
  308. #if defined (USB_OTG_FS)
  309. #define USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE ((uint32_t)0x08)
  310. #define USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE ((uint32_t)0x0C)
  311. #define USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE ((uint32_t)0x10)
  312. #define USB_OTG_FS_WAKEUP_EXTI_LINE ((uint32_t)0x00020000) /*!< External interrupt line 17 Connected to the USB EXTI Line */
  313. #endif /* USB_OTG_FS */
  314. #if defined (USB)
  315. #define USB_WAKEUP_EXTI_LINE ((uint32_t)0x00020000) /*!< External interrupt line 17Connected to the USB EXTI Line */
  316. #endif /* USB */
  317. /**
  318. * @}
  319. */
  320. #if defined (USB)
  321. /** @defgroup PCD_EP0_MPS PCD EP0 MPS
  322. * @{
  323. */
  324. #define PCD_EP0MPS_64 DEP0CTL_MPS_64
  325. #define PCD_EP0MPS_32 DEP0CTL_MPS_32
  326. #define PCD_EP0MPS_16 DEP0CTL_MPS_16
  327. #define PCD_EP0MPS_08 DEP0CTL_MPS_8
  328. /**
  329. * @}
  330. */
  331. /** @defgroup PCD_ENDP PCD ENDP
  332. * @{
  333. */
  334. #define PCD_ENDP0 ((uint8_t)0)
  335. #define PCD_ENDP1 ((uint8_t)1)
  336. #define PCD_ENDP2 ((uint8_t)2)
  337. #define PCD_ENDP3 ((uint8_t)3)
  338. #define PCD_ENDP4 ((uint8_t)4)
  339. #define PCD_ENDP5 ((uint8_t)5)
  340. #define PCD_ENDP6 ((uint8_t)6)
  341. #define PCD_ENDP7 ((uint8_t)7)
  342. /**
  343. * @}
  344. */
  345. /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
  346. * @{
  347. */
  348. #define PCD_SNG_BUF 0
  349. #define PCD_DBL_BUF 1
  350. /**
  351. * @}
  352. */
  353. #endif /* USB */
  354. /**
  355. * @}
  356. */
  357. /* Private macros ------------------------------------------------------------*/
  358. /** @addtogroup PCD_Private_Macros PCD Private Macros
  359. * @{
  360. */
  361. #if defined (USB)
  362. /* SetENDPOINT */
  363. #define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) (*(&(USBx)->EP0R + (bEpNum) * 2)= (uint16_t)(wRegValue))
  364. /* GetENDPOINT */
  365. #define PCD_GET_ENDPOINT(USBx, bEpNum) (*(&(USBx)->EP0R + (bEpNum) * 2))
  366. /* ENDPOINT transfer */
  367. #define USB_EP0StartXfer USB_EPStartXfer
  368. /**
  369. * @brief sets the type in the endpoint register(bits EP_TYPE[1:0])
  370. * @param USBx: USB peripheral instance register address.
  371. * @param bEpNum: Endpoint Number.
  372. * @param wType: Endpoint Type.
  373. * @retval None
  374. */
  375. #define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
  376. ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) )))
  377. /**
  378. * @brief gets the type in the endpoint register(bits EP_TYPE[1:0])
  379. * @param USBx: USB peripheral instance register address.
  380. * @param bEpNum: Endpoint Number.
  381. * @retval Endpoint Type
  382. */
  383. #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
  384. /**
  385. * @brief free buffer used from the application realizing it to the line
  386. toggles bit SW_BUF in the double buffered endpoint register
  387. * @param USBx: USB peripheral instance register address.
  388. * @param bEpNum: Endpoint Number.
  389. * @param bDir: Direction
  390. * @retval None
  391. */
  392. #define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\
  393. {\
  394. if ((bDir) == PCD_EP_DBUF_OUT)\
  395. { /* OUT double buffered endpoint */\
  396. PCD_TX_DTOG((USBx), (bEpNum));\
  397. }\
  398. else if ((bDir) == PCD_EP_DBUF_IN)\
  399. { /* IN double buffered endpoint */\
  400. PCD_RX_DTOG((USBx), (bEpNum));\
  401. }\
  402. }
  403. /**
  404. * @brief gets direction of the double buffered endpoint
  405. * @param USBx: USB peripheral instance register address.
  406. * @param bEpNum: Endpoint Number.
  407. * @retval EP_DBUF_OUT, EP_DBUF_IN,
  408. * EP_DBUF_ERR if the endpoint counter not yet programmed.
  409. */
  410. #define PCD_GET_DB_DIR(USBx, bEpNum)\
  411. {\
  412. if ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum)) & 0xFC00) != 0)\
  413. return(PCD_EP_DBUF_OUT);\
  414. else if (((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x03FF) != 0)\
  415. return(PCD_EP_DBUF_IN);\
  416. else\
  417. return(PCD_EP_DBUF_ERR);\
  418. }
  419. /**
  420. * @brief sets the status for tx transfer (bits STAT_TX[1:0]).
  421. * @param USBx: USB peripheral instance register address.
  422. * @param bEpNum: Endpoint Number.
  423. * @param wState: new state
  424. * @retval None
  425. */
  426. #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) { register uint16_t _wRegVal;\
  427. \
  428. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK;\
  429. /* toggle first bit ? */ \
  430. if((USB_EPTX_DTOG1 & (wState))!= 0)\
  431. { \
  432. _wRegVal ^= USB_EPTX_DTOG1; \
  433. } \
  434. /* toggle second bit ? */ \
  435. if((USB_EPTX_DTOG2 & (wState))!= 0) \
  436. { \
  437. _wRegVal ^= USB_EPTX_DTOG2; \
  438. } \
  439. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX));\
  440. } /* PCD_SET_EP_TX_STATUS */
  441. /**
  442. * @brief sets the status for rx transfer (bits STAT_TX[1:0])
  443. * @param USBx: USB peripheral instance register address.
  444. * @param bEpNum: Endpoint Number.
  445. * @param wState: new state
  446. * @retval None
  447. */
  448. #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\
  449. register uint16_t _wRegVal; \
  450. \
  451. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK;\
  452. /* toggle first bit ? */ \
  453. if((USB_EPRX_DTOG1 & (wState))!= 0) \
  454. { \
  455. _wRegVal ^= USB_EPRX_DTOG1; \
  456. } \
  457. /* toggle second bit ? */ \
  458. if((USB_EPRX_DTOG2 & (wState))!= 0) \
  459. { \
  460. _wRegVal ^= USB_EPRX_DTOG2; \
  461. } \
  462. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX)); \
  463. } /* PCD_SET_EP_RX_STATUS */
  464. /**
  465. * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
  466. * @param USBx: USB peripheral instance register address.
  467. * @param bEpNum: Endpoint Number.
  468. * @param wStaterx: new state.
  469. * @param wStatetx: new state.
  470. * @retval None
  471. */
  472. #define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) {\
  473. register uint32_t _wRegVal; \
  474. \
  475. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK |USB_EPTX_STAT) ;\
  476. /* toggle first bit ? */ \
  477. if((USB_EPRX_DTOG1 & ((wStaterx)))!= 0) \
  478. { \
  479. _wRegVal ^= USB_EPRX_DTOG1; \
  480. } \
  481. /* toggle second bit ? */ \
  482. if((USB_EPRX_DTOG2 & (wStaterx))!= 0) \
  483. { \
  484. _wRegVal ^= USB_EPRX_DTOG2; \
  485. } \
  486. /* toggle first bit ? */ \
  487. if((USB_EPTX_DTOG1 & (wStatetx))!= 0) \
  488. { \
  489. _wRegVal ^= USB_EPTX_DTOG1; \
  490. } \
  491. /* toggle second bit ? */ \
  492. if((USB_EPTX_DTOG2 & (wStatetx))!= 0) \
  493. { \
  494. _wRegVal ^= USB_EPTX_DTOG2; \
  495. } \
  496. PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX); \
  497. } /* PCD_SET_EP_TXRX_STATUS */
  498. /**
  499. * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0]
  500. * /STAT_RX[1:0])
  501. * @param USBx: USB peripheral instance register address.
  502. * @param bEpNum: Endpoint Number.
  503. * @retval status
  504. */
  505. #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
  506. #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
  507. /**
  508. * @brief sets directly the VALID tx/rx-status into the endpoint register
  509. * @param USBx: USB peripheral instance register address.
  510. * @param bEpNum: Endpoint Number.
  511. * @retval None
  512. */
  513. #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
  514. #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
  515. /**
  516. * @brief checks stall condition in an endpoint.
  517. * @param USBx: USB peripheral instance register address.
  518. * @param bEpNum: Endpoint Number.
  519. * @retval TRUE = endpoint in stall condition.
  520. */
  521. #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \
  522. == USB_EP_TX_STALL)
  523. #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \
  524. == USB_EP_RX_STALL)
  525. /**
  526. * @brief set & clear EP_KIND bit.
  527. * @param USBx: USB peripheral instance register address.
  528. * @param bEpNum: Endpoint Number.
  529. * @retval None
  530. */
  531. #define PCD_SET_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  532. (USB_EP_CTR_RX|USB_EP_CTR_TX|((PCD_GET_ENDPOINT((USBx), (bEpNum)) | USB_EP_KIND) & USB_EPREG_MASK))))
  533. #define PCD_CLEAR_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  534. (USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK))))
  535. /**
  536. * @brief Sets/clears directly STATUS_OUT bit in the endpoint register.
  537. * @param USBx: USB peripheral instance register address.
  538. * @param bEpNum: Endpoint Number.
  539. * @retval None
  540. */
  541. #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  542. #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  543. /**
  544. * @brief Sets/clears directly EP_KIND bit in the endpoint register.
  545. * @param USBx: USB peripheral instance register address.
  546. * @param bEpNum: Endpoint Number.
  547. * @retval None
  548. */
  549. #define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  550. #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  551. /**
  552. * @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
  553. * @param USBx: USB peripheral instance register address.
  554. * @param bEpNum: Endpoint Number.
  555. * @retval None
  556. */
  557. #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
  558. PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0x7FFF & USB_EPREG_MASK))
  559. #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
  560. PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0xFF7F & USB_EPREG_MASK))
  561. /**
  562. * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
  563. * @param USBx: USB peripheral instance register address.
  564. * @param bEpNum: Endpoint Number.
  565. * @retval None
  566. */
  567. #define PCD_RX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  568. USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX | (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK)))
  569. #define PCD_TX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  570. USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX | (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK)))
  571. /**
  572. * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
  573. * @param USBx: USB peripheral instance register address.
  574. * @param bEpNum: Endpoint Number.
  575. * @retval None
  576. */
  577. #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_RX) != 0)\
  578. { \
  579. PCD_RX_DTOG((USBx), (bEpNum)); \
  580. }
  581. #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_TX) != 0)\
  582. { \
  583. PCD_TX_DTOG((USBx), (bEpNum)); \
  584. }
  585. /**
  586. * @brief Sets address in an endpoint register.
  587. * @param USBx: USB peripheral instance register address.
  588. * @param bEpNum: Endpoint Number.
  589. * @param bAddr: Address.
  590. * @retval None
  591. */
  592. #define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT((USBx), (bEpNum),\
  593. USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr))
  594. #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
  595. #define PCD_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t *)(((USBx)->BTABLE+(bEpNum)*8)+ ((uint32_t)(USBx) + 0x400)))
  596. #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)(((USBx)->BTABLE+(bEpNum)*8+2)+ ((uint32_t)(USBx) + 0x400)))
  597. #define PCD_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t *)(((USBx)->BTABLE+(bEpNum)*8+4)+ ((uint32_t)(USBx) + 0x400)))
  598. #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)(((USBx)->BTABLE+(bEpNum)*8+6)+ ((uint32_t)(USBx) + 0x400)))
  599. #define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) {\
  600. uint16_t *pdwReg = PCD_EP_RX_CNT((USBx), (bEpNum)); \
  601. PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\
  602. }
  603. /**
  604. * @brief sets address of the tx/rx buffer.
  605. * @param USBx: USB peripheral instance register address.
  606. * @param bEpNum: Endpoint Number.
  607. * @param wAddr: address to be set (must be word aligned).
  608. * @retval None
  609. */
  610. #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1) << 1))
  611. #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1) << 1))
  612. /**
  613. * @brief Gets address of the tx/rx buffer.
  614. * @param USBx: USB peripheral instance register address.
  615. * @param bEpNum: Endpoint Number.
  616. * @retval address of the buffer.
  617. */
  618. #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
  619. #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
  620. /**
  621. * @brief Sets counter of rx buffer with no. of blocks.
  622. * @param dwReg: Register
  623. * @param wCount: Counter.
  624. * @param wNBlocks: no. of Blocks.
  625. * @retval None
  626. */
  627. #define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\
  628. (wNBlocks) = (wCount) >> 5;\
  629. if(((wCount) & 0x1f) == 0)\
  630. { \
  631. (wNBlocks)--;\
  632. } \
  633. *pdwReg = (uint16_t)((uint16_t)((wNBlocks) << 10) | 0x8000); \
  634. }/* PCD_CALC_BLK32 */
  635. #define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\
  636. (wNBlocks) = (wCount) >> 1;\
  637. if(((wCount) & 0x1) != 0)\
  638. { \
  639. (wNBlocks)++;\
  640. } \
  641. *pdwReg = (uint16_t)((wNBlocks) << 10);\
  642. }/* PCD_CALC_BLK2 */
  643. #define PCD_SET_EP_CNT_RX_REG(dwReg,wCount) {\
  644. uint16_t wNBlocks;\
  645. if((wCount) > 62) \
  646. { \
  647. PCD_CALC_BLK32((dwReg),(wCount),wNBlocks); \
  648. } \
  649. else \
  650. { \
  651. PCD_CALC_BLK2((dwReg),(wCount),wNBlocks); \
  652. } \
  653. }/* PCD_SET_EP_CNT_RX_REG */
  654. #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) {\
  655. uint16_t *pdwReg = PCD_EP_TX_CNT((USBx), (bEpNum)); \
  656. PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\
  657. }
  658. /**
  659. * @brief sets counter for the tx/rx buffer.
  660. * @param USBx: USB peripheral instance register address.
  661. * @param bEpNum: Endpoint Number.
  662. * @param wCount: Counter value.
  663. * @retval None
  664. */
  665. #define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT((USBx), (bEpNum)) = (wCount))
  666. /**
  667. * @brief gets counter of the tx buffer.
  668. * @param USBx: USB peripheral instance register address.
  669. * @param bEpNum: Endpoint Number.
  670. * @retval Counter value
  671. */
  672. #define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ff)
  673. #define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ff)
  674. /**
  675. * @brief Sets buffer 0/1 address in a double buffer endpoint.
  676. * @param USBx: USB peripheral instance register address.
  677. * @param bEpNum: Endpoint Number.
  678. * @param wBuf0Addr: buffer 0 address.
  679. * @retval Counter value
  680. */
  681. #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) {PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr));}
  682. #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) {PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr));}
  683. /**
  684. * @brief Sets addresses in a double buffer endpoint.
  685. * @param USBx: USB peripheral instance register address.
  686. * @param bEpNum: Endpoint Number.
  687. * @param wBuf0Addr: buffer 0 address.
  688. * @param wBuf1Addr = buffer 1 address.
  689. * @retval None
  690. */
  691. #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \
  692. PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr));\
  693. PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr));\
  694. } /* PCD_SET_EP_DBUF_ADDR */
  695. /**
  696. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  697. * @param USBx: USB peripheral instance register address.
  698. * @param bEpNum: Endpoint Number.
  699. * @retval None
  700. */
  701. #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
  702. #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
  703. /**
  704. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  705. * @param USBx: USB peripheral instance register address.
  706. * @param bEpNum: Endpoint Number.
  707. * @param bDir: endpoint dir EP_DBUF_OUT = OUT
  708. * EP_DBUF_IN = IN
  709. * @param wCount: Counter value
  710. * @retval None
  711. */
  712. #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) { \
  713. if((bDir) == PCD_EP_DBUF_OUT)\
  714. /* OUT endpoint */ \
  715. {PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum),(wCount));} \
  716. else if((bDir) == PCD_EP_DBUF_IN)\
  717. /* IN endpoint */ \
  718. *PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
  719. } /* SetEPDblBuf0Count*/
  720. #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) { \
  721. if((bDir) == PCD_EP_DBUF_OUT)\
  722. {/* OUT endpoint */ \
  723. PCD_SET_EP_RX_CNT((USBx), (bEpNum),(wCount)); \
  724. } \
  725. else if((bDir) == PCD_EP_DBUF_IN)\
  726. {/* IN endpoint */ \
  727. *PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
  728. } \
  729. } /* SetEPDblBuf1Count */
  730. #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) {\
  731. PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  732. PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  733. } /* PCD_SET_EP_DBUF_CNT */
  734. /**
  735. * @brief Gets buffer 0/1 rx/tx counter for double buffering.
  736. * @param USBx: USB peripheral instance register address.
  737. * @param bEpNum: Endpoint Number.
  738. * @retval None
  739. */
  740. #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
  741. #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
  742. #endif /* USB */
  743. #if defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx) || \
  744. defined(STM32L452xx) || defined(STM32L462xx)
  745. /** @defgroup PCD_Instance_definition PCD Instance definition
  746. * @{
  747. */
  748. #define IS_PCD_ALL_INSTANCE IS_USB_ALL_INSTANCE
  749. /**
  750. * @}
  751. */
  752. #endif /* STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx || */
  753. /* STM32L452xx || STM32L462xx */
  754. /**
  755. * @}
  756. */
  757. /**
  758. * @}
  759. */
  760. /**
  761. * @}
  762. */
  763. #endif /* STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx || */
  764. /* STM32L452xx || STM32L462xx || */
  765. /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */
  766. /* STM32L496xx || STM32L4A6xx || */
  767. /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
  768. #ifdef __cplusplus
  769. }
  770. #endif
  771. #endif /* __STM32L4xx_HAL_PCD_H */
  772. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/