stm32l4xx_hal_uart_ex.h 40 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32l4xx_hal_uart_ex.h
  4. * @author MCD Application Team
  5. * @brief Header file of UART HAL Extended module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  10. *
  11. * Redistribution and use in source and binary forms, with or without modification,
  12. * are permitted provided that the following conditions are met:
  13. * 1. Redistributions of source code must retain the above copyright notice,
  14. * this list of conditions and the following disclaimer.
  15. * 2. Redistributions in binary form must reproduce the above copyright notice,
  16. * this list of conditions and the following disclaimer in the documentation
  17. * and/or other materials provided with the distribution.
  18. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  19. * may be used to endorse or promote products derived from this software
  20. * without specific prior written permission.
  21. *
  22. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  23. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  25. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  26. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  28. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  29. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. ******************************************************************************
  34. */
  35. /* Define to prevent recursive inclusion -------------------------------------*/
  36. #ifndef __STM32L4xx_HAL_UART_EX_H
  37. #define __STM32L4xx_HAL_UART_EX_H
  38. #ifdef __cplusplus
  39. extern "C" {
  40. #endif
  41. /* Includes ------------------------------------------------------------------*/
  42. #include "stm32l4xx_hal_def.h"
  43. /** @addtogroup STM32L4xx_HAL_Driver
  44. * @{
  45. */
  46. /** @addtogroup UARTEx
  47. * @{
  48. */
  49. /* Exported types ------------------------------------------------------------*/
  50. /** @defgroup UARTEx_Exported_Types UARTEx Exported Types
  51. * @{
  52. */
  53. /**
  54. * @brief UART wake up from stop mode parameters
  55. */
  56. typedef struct
  57. {
  58. uint32_t WakeUpEvent; /*!< Specifies which event will activat the Wakeup from Stop mode flag (WUF).
  59. This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection.
  60. If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must
  61. be filled up. */
  62. uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long.
  63. This parameter can be a value of @ref UARTEx_WakeUp_Address_Length. */
  64. uint8_t Address; /*!< UART/USART node address (7-bit long max). */
  65. } UART_WakeUpTypeDef;
  66. /**
  67. * @}
  68. */
  69. /* Exported constants --------------------------------------------------------*/
  70. /** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants
  71. * @{
  72. */
  73. /** @defgroup UARTEx_Word_Length UARTEx Word Length
  74. * @{
  75. */
  76. #define UART_WORDLENGTH_7B USART_CR1_M1 /*!< 7-bit long UART frame */
  77. #define UART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long UART frame */
  78. #define UART_WORDLENGTH_9B USART_CR1_M0 /*!< 9-bit long UART frame */
  79. /**
  80. * @}
  81. */
  82. /** @defgroup UARTEx_WakeUp_Address_Length UARTEx WakeUp Address Length
  83. * @{
  84. */
  85. #define UART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit long wake-up address */
  86. #define UART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit long wake-up address */
  87. /**
  88. * @}
  89. */
  90. #if defined(USART_CR2_SLVEN)
  91. /** @defgroup UARTEx_Slave_Select_management UARTEx Slave Select Management
  92. * @{
  93. */
  94. #define UART_NSS_HARD 0x00000000U /*!< SPI slave selection depends on NSS input pin */
  95. #define UART_NSS_SOFT USART_CR2_DIS_NSS /*!< SPI slave is always selected and NSS input pin is ignored */
  96. /**
  97. * @}
  98. */
  99. #endif
  100. #if defined(USART_CR1_FIFOEN)
  101. /** @defgroup UARTEx_TXFIFO_threshold_level UARTEx TXFIFO threshold level
  102. * @brief UART TXFIFO level
  103. * @{
  104. */
  105. #define UART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TXFIFO reaches 1/8 of its depth */
  106. #define UART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TXFIFO reaches 1/4 of its depth */
  107. #define UART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TXFIFO reaches 1/2 of its depth */
  108. #define UART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TXFIFO reaches 3/4 of its depth */
  109. #define UART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TXFIFO reaches 7/8 of its depth */
  110. #define UART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TXFIFO becomes empty */
  111. /**
  112. * @}
  113. */
  114. /** @defgroup UARTEx_RXFIFO_threshold_level UARTEx RXFIFO threshold level
  115. * @brief UART RXFIFO level
  116. * @{
  117. */
  118. #define UART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RXFIFO FIFO reaches 1/8 of its depth */
  119. #define UART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RXFIFO FIFO reaches 1/4 of its depth */
  120. #define UART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RXFIFO FIFO reaches 1/2 of its depth */
  121. #define UART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RXFIFO FIFO reaches 3/4 of its depth */
  122. #define UART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RXFIFO FIFO reaches 7/8 of its depth */
  123. #define UART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RXFIFO FIFO becomes full */
  124. /**
  125. * @}
  126. */
  127. #endif
  128. /**
  129. * @}
  130. */
  131. /* Exported macros -----------------------------------------------------------*/
  132. /* Exported functions --------------------------------------------------------*/
  133. /** @addtogroup UARTEx_Exported_Functions
  134. * @{
  135. */
  136. /** @addtogroup UARTEx_Exported_Functions_Group1
  137. * @{
  138. */
  139. /* Initialization and de-initialization functions ****************************/
  140. HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, uint32_t DeassertionTime);
  141. /**
  142. * @}
  143. */
  144. /** @addtogroup UARTEx_Exported_Functions_Group2
  145. * @{
  146. */
  147. /* IO operation functions *****************************************************/
  148. void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart);
  149. #if defined(USART_CR1_FIFOEN)
  150. void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart);
  151. void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart);
  152. #endif
  153. /**
  154. * @}
  155. */
  156. /** @addtogroup UARTEx_Exported_Functions_Group3
  157. * @{
  158. */
  159. /* Peripheral Control functions **********************************************/
  160. HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection);
  161. HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart);
  162. /* MBED */
  163. HAL_StatusTypeDef HAL_UARTEx_EnableClockStopMode(UART_HandleTypeDef *huart);
  164. /* MBED */
  165. HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart);
  166. /* MBED */
  167. HAL_StatusTypeDef HAL_UARTEx_DisableClockStopMode(UART_HandleTypeDef *huart);
  168. /* MBED */
  169. HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength);
  170. #if defined(USART_CR2_SLVEN)
  171. HAL_StatusTypeDef HAL_UARTEx_EnableSlaveMode(UART_HandleTypeDef *huart);
  172. HAL_StatusTypeDef HAL_UARTEx_DisableSlaveMode(UART_HandleTypeDef *huart);
  173. HAL_StatusTypeDef HAL_UARTEx_ConfigNSS(UART_HandleTypeDef *huart, uint32_t NSSConfig);
  174. #endif
  175. #if defined(USART_CR1_FIFOEN)
  176. HAL_StatusTypeDef HAL_UARTEx_EnableFifoMode(UART_HandleTypeDef *huart);
  177. HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart);
  178. HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold);
  179. HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold);
  180. #endif
  181. /**
  182. * @}
  183. */
  184. /**
  185. * @}
  186. */
  187. /* Private constants ---------------------------------------------------------*/
  188. /** @defgroup UARTEx_Private_Constants UARTEx Private Constants
  189. * @{
  190. */
  191. #if defined(USART_CR2_SLVEN)
  192. /** @defgroup UARTEx_Slave_Mode UARTEx Synchronous Slave mode
  193. * @{
  194. */
  195. #define UART_SLAVEMODE_DISABLE 0x00000000U /*!< USART SPI Slave Mode Enable */
  196. #define UART_SLAVEMODE_ENABLE USART_CR2_SLVEN /*!< USART SPI Slave Mode Disable */
  197. /**
  198. * @}
  199. */
  200. #endif
  201. #if defined(USART_CR1_FIFOEN)
  202. /** @defgroup UARTEx_FIFO_mode UARTEx FIFO mode
  203. * @{
  204. */
  205. #define UART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */
  206. #define UART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */
  207. /**
  208. * @}
  209. */
  210. #endif
  211. /**
  212. * @}
  213. */
  214. /* Private macros ------------------------------------------------------------*/
  215. /** @defgroup UARTEx_Private_Macros UARTEx Private Macros
  216. * @{
  217. */
  218. /** @brief Report the UART clock source.
  219. * @param __HANDLE__ specifies the UART Handle.
  220. * @param __CLOCKSOURCE__ output variable.
  221. * @retval UART clocking source, written in __CLOCKSOURCE__.
  222. */
  223. #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \
  224. defined (STM32L496xx) || defined (STM32L4A6xx) || \
  225. defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)
  226. #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
  227. do { \
  228. if((__HANDLE__)->Instance == USART1) \
  229. { \
  230. switch(__HAL_RCC_GET_USART1_SOURCE()) \
  231. { \
  232. case RCC_USART1CLKSOURCE_PCLK2: \
  233. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \
  234. break; \
  235. case RCC_USART1CLKSOURCE_HSI: \
  236. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  237. break; \
  238. case RCC_USART1CLKSOURCE_SYSCLK: \
  239. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  240. break; \
  241. case RCC_USART1CLKSOURCE_LSE: \
  242. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  243. break; \
  244. default: \
  245. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  246. break; \
  247. } \
  248. } \
  249. else if((__HANDLE__)->Instance == USART2) \
  250. { \
  251. switch(__HAL_RCC_GET_USART2_SOURCE()) \
  252. { \
  253. case RCC_USART2CLKSOURCE_PCLK1: \
  254. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  255. break; \
  256. case RCC_USART2CLKSOURCE_HSI: \
  257. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  258. break; \
  259. case RCC_USART2CLKSOURCE_SYSCLK: \
  260. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  261. break; \
  262. case RCC_USART2CLKSOURCE_LSE: \
  263. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  264. break; \
  265. default: \
  266. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  267. break; \
  268. } \
  269. } \
  270. else if((__HANDLE__)->Instance == USART3) \
  271. { \
  272. switch(__HAL_RCC_GET_USART3_SOURCE()) \
  273. { \
  274. case RCC_USART3CLKSOURCE_PCLK1: \
  275. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  276. break; \
  277. case RCC_USART3CLKSOURCE_HSI: \
  278. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  279. break; \
  280. case RCC_USART3CLKSOURCE_SYSCLK: \
  281. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  282. break; \
  283. case RCC_USART3CLKSOURCE_LSE: \
  284. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  285. break; \
  286. default: \
  287. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  288. break; \
  289. } \
  290. } \
  291. else if((__HANDLE__)->Instance == UART4) \
  292. { \
  293. switch(__HAL_RCC_GET_UART4_SOURCE()) \
  294. { \
  295. case RCC_UART4CLKSOURCE_PCLK1: \
  296. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  297. break; \
  298. case RCC_UART4CLKSOURCE_HSI: \
  299. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  300. break; \
  301. case RCC_UART4CLKSOURCE_SYSCLK: \
  302. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  303. break; \
  304. case RCC_UART4CLKSOURCE_LSE: \
  305. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  306. break; \
  307. default: \
  308. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  309. break; \
  310. } \
  311. } \
  312. else if((__HANDLE__)->Instance == UART5) \
  313. { \
  314. switch(__HAL_RCC_GET_UART5_SOURCE()) \
  315. { \
  316. case RCC_UART5CLKSOURCE_PCLK1: \
  317. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  318. break; \
  319. case RCC_UART5CLKSOURCE_HSI: \
  320. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  321. break; \
  322. case RCC_UART5CLKSOURCE_SYSCLK: \
  323. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  324. break; \
  325. case RCC_UART5CLKSOURCE_LSE: \
  326. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  327. break; \
  328. default: \
  329. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  330. break; \
  331. } \
  332. } \
  333. else if((__HANDLE__)->Instance == LPUART1) \
  334. { \
  335. switch(__HAL_RCC_GET_LPUART1_SOURCE()) \
  336. { \
  337. case RCC_LPUART1CLKSOURCE_PCLK1: \
  338. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  339. break; \
  340. case RCC_LPUART1CLKSOURCE_HSI: \
  341. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  342. break; \
  343. case RCC_LPUART1CLKSOURCE_SYSCLK: \
  344. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  345. break; \
  346. case RCC_LPUART1CLKSOURCE_LSE: \
  347. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  348. break; \
  349. default: \
  350. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  351. break; \
  352. } \
  353. } \
  354. } while(0)
  355. #elif defined (STM32L431xx) || defined (STM32L433xx) || defined (STM32L443xx)
  356. #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
  357. do { \
  358. if((__HANDLE__)->Instance == USART1) \
  359. { \
  360. switch(__HAL_RCC_GET_USART1_SOURCE()) \
  361. { \
  362. case RCC_USART1CLKSOURCE_PCLK2: \
  363. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \
  364. break; \
  365. case RCC_USART1CLKSOURCE_HSI: \
  366. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  367. break; \
  368. case RCC_USART1CLKSOURCE_SYSCLK: \
  369. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  370. break; \
  371. case RCC_USART1CLKSOURCE_LSE: \
  372. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  373. break; \
  374. default: \
  375. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  376. break; \
  377. } \
  378. } \
  379. else if((__HANDLE__)->Instance == USART2) \
  380. { \
  381. switch(__HAL_RCC_GET_USART2_SOURCE()) \
  382. { \
  383. case RCC_USART2CLKSOURCE_PCLK1: \
  384. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  385. break; \
  386. case RCC_USART2CLKSOURCE_HSI: \
  387. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  388. break; \
  389. case RCC_USART2CLKSOURCE_SYSCLK: \
  390. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  391. break; \
  392. case RCC_USART2CLKSOURCE_LSE: \
  393. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  394. break; \
  395. default: \
  396. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  397. break; \
  398. } \
  399. } \
  400. else if((__HANDLE__)->Instance == USART3) \
  401. { \
  402. switch(__HAL_RCC_GET_USART3_SOURCE()) \
  403. { \
  404. case RCC_USART3CLKSOURCE_PCLK1: \
  405. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  406. break; \
  407. case RCC_USART3CLKSOURCE_HSI: \
  408. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  409. break; \
  410. case RCC_USART3CLKSOURCE_SYSCLK: \
  411. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  412. break; \
  413. case RCC_USART3CLKSOURCE_LSE: \
  414. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  415. break; \
  416. default: \
  417. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  418. break; \
  419. } \
  420. } \
  421. else if((__HANDLE__)->Instance == LPUART1) \
  422. { \
  423. switch(__HAL_RCC_GET_LPUART1_SOURCE()) \
  424. { \
  425. case RCC_LPUART1CLKSOURCE_PCLK1: \
  426. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  427. break; \
  428. case RCC_LPUART1CLKSOURCE_HSI: \
  429. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  430. break; \
  431. case RCC_LPUART1CLKSOURCE_SYSCLK: \
  432. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  433. break; \
  434. case RCC_LPUART1CLKSOURCE_LSE: \
  435. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  436. break; \
  437. default: \
  438. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  439. break; \
  440. } \
  441. } \
  442. } while(0)
  443. #elif defined (STM32L432xx) || defined (STM32L442xx)
  444. #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
  445. do { \
  446. if((__HANDLE__)->Instance == USART1) \
  447. { \
  448. switch(__HAL_RCC_GET_USART1_SOURCE()) \
  449. { \
  450. case RCC_USART1CLKSOURCE_PCLK2: \
  451. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \
  452. break; \
  453. case RCC_USART1CLKSOURCE_HSI: \
  454. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  455. break; \
  456. case RCC_USART1CLKSOURCE_SYSCLK: \
  457. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  458. break; \
  459. case RCC_USART1CLKSOURCE_LSE: \
  460. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  461. break; \
  462. default: \
  463. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  464. break; \
  465. } \
  466. } \
  467. else if((__HANDLE__)->Instance == USART2) \
  468. { \
  469. switch(__HAL_RCC_GET_USART2_SOURCE()) \
  470. { \
  471. case RCC_USART2CLKSOURCE_PCLK1: \
  472. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  473. break; \
  474. case RCC_USART2CLKSOURCE_HSI: \
  475. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  476. break; \
  477. case RCC_USART2CLKSOURCE_SYSCLK: \
  478. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  479. break; \
  480. case RCC_USART2CLKSOURCE_LSE: \
  481. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  482. break; \
  483. default: \
  484. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  485. break; \
  486. } \
  487. } \
  488. else if((__HANDLE__)->Instance == LPUART1) \
  489. { \
  490. switch(__HAL_RCC_GET_LPUART1_SOURCE()) \
  491. { \
  492. case RCC_LPUART1CLKSOURCE_PCLK1: \
  493. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  494. break; \
  495. case RCC_LPUART1CLKSOURCE_HSI: \
  496. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  497. break; \
  498. case RCC_LPUART1CLKSOURCE_SYSCLK: \
  499. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  500. break; \
  501. case RCC_LPUART1CLKSOURCE_LSE: \
  502. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  503. break; \
  504. default: \
  505. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  506. break; \
  507. } \
  508. } \
  509. } while(0)
  510. #elif defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx)
  511. #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
  512. do { \
  513. if((__HANDLE__)->Instance == USART1) \
  514. { \
  515. switch(__HAL_RCC_GET_USART1_SOURCE()) \
  516. { \
  517. case RCC_USART1CLKSOURCE_PCLK2: \
  518. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \
  519. break; \
  520. case RCC_USART1CLKSOURCE_HSI: \
  521. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  522. break; \
  523. case RCC_USART1CLKSOURCE_SYSCLK: \
  524. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  525. break; \
  526. case RCC_USART1CLKSOURCE_LSE: \
  527. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  528. break; \
  529. default: \
  530. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  531. break; \
  532. } \
  533. } \
  534. else if((__HANDLE__)->Instance == USART2) \
  535. { \
  536. switch(__HAL_RCC_GET_USART2_SOURCE()) \
  537. { \
  538. case RCC_USART2CLKSOURCE_PCLK1: \
  539. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  540. break; \
  541. case RCC_USART2CLKSOURCE_HSI: \
  542. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  543. break; \
  544. case RCC_USART2CLKSOURCE_SYSCLK: \
  545. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  546. break; \
  547. case RCC_USART2CLKSOURCE_LSE: \
  548. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  549. break; \
  550. default: \
  551. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  552. break; \
  553. } \
  554. } \
  555. else if((__HANDLE__)->Instance == USART3) \
  556. { \
  557. switch(__HAL_RCC_GET_USART3_SOURCE()) \
  558. { \
  559. case RCC_USART3CLKSOURCE_PCLK1: \
  560. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  561. break; \
  562. case RCC_USART3CLKSOURCE_HSI: \
  563. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  564. break; \
  565. case RCC_USART3CLKSOURCE_SYSCLK: \
  566. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  567. break; \
  568. case RCC_USART3CLKSOURCE_LSE: \
  569. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  570. break; \
  571. default: \
  572. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  573. break; \
  574. } \
  575. } \
  576. else if((__HANDLE__)->Instance == UART4) \
  577. { \
  578. switch(__HAL_RCC_GET_UART4_SOURCE()) \
  579. { \
  580. case RCC_UART4CLKSOURCE_PCLK1: \
  581. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  582. break; \
  583. case RCC_UART4CLKSOURCE_HSI: \
  584. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  585. break; \
  586. case RCC_UART4CLKSOURCE_SYSCLK: \
  587. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  588. break; \
  589. case RCC_UART4CLKSOURCE_LSE: \
  590. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  591. break; \
  592. default: \
  593. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  594. break; \
  595. } \
  596. } \
  597. else if((__HANDLE__)->Instance == LPUART1) \
  598. { \
  599. switch(__HAL_RCC_GET_LPUART1_SOURCE()) \
  600. { \
  601. case RCC_LPUART1CLKSOURCE_PCLK1: \
  602. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
  603. break; \
  604. case RCC_LPUART1CLKSOURCE_HSI: \
  605. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
  606. break; \
  607. case RCC_LPUART1CLKSOURCE_SYSCLK: \
  608. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
  609. break; \
  610. case RCC_LPUART1CLKSOURCE_LSE: \
  611. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
  612. break; \
  613. default: \
  614. (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
  615. break; \
  616. } \
  617. } \
  618. } while(0)
  619. #endif
  620. /** @brief Report the UART mask to apply to retrieve the received data
  621. * according to the word length and to the parity bits activation.
  622. * @note If PCE = 1, the parity bit is not included in the data extracted
  623. * by the reception API().
  624. * This masking operation is not carried out in the case of
  625. * DMA transfers.
  626. * @param __HANDLE__: specifies the UART Handle.
  627. * @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field.
  628. */
  629. #define UART_MASK_COMPUTATION(__HANDLE__) \
  630. do { \
  631. if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \
  632. { \
  633. if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
  634. { \
  635. (__HANDLE__)->Mask = 0x01FF ; \
  636. } \
  637. else \
  638. { \
  639. (__HANDLE__)->Mask = 0x00FF ; \
  640. } \
  641. } \
  642. else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \
  643. { \
  644. if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
  645. { \
  646. (__HANDLE__)->Mask = 0x00FF ; \
  647. } \
  648. else \
  649. { \
  650. (__HANDLE__)->Mask = 0x007F ; \
  651. } \
  652. } \
  653. else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \
  654. { \
  655. if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
  656. { \
  657. (__HANDLE__)->Mask = 0x007F ; \
  658. } \
  659. else \
  660. { \
  661. (__HANDLE__)->Mask = 0x003F ; \
  662. } \
  663. } \
  664. } while(0)
  665. /**
  666. * @brief Ensure that UART frame length is valid.
  667. * @param __LENGTH__ UART frame length.
  668. * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
  669. */
  670. #define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \
  671. ((__LENGTH__) == UART_WORDLENGTH_8B) || \
  672. ((__LENGTH__) == UART_WORDLENGTH_9B))
  673. /**
  674. * @brief Ensure that UART wake-up address length is valid.
  675. * @param __ADDRESS__ UART wake-up address length.
  676. * @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid)
  677. */
  678. #define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \
  679. ((__ADDRESS__) == UART_ADDRESS_DETECT_7B))
  680. #if defined(USART_CR2_SLVEN)
  681. /**
  682. * @brief Ensure that UART Negative Slave Select (NSS) pin management is valid.
  683. * @param __NSS__ UART Negative Slave Select pin management.
  684. * @retval SET (__NSS__ is valid) or RESET (__NSS__ is invalid)
  685. */
  686. #define IS_UART_NSS(__NSS__) (((__NSS__) == UART_NSS_HARD) || \
  687. ((__NSS__) == UART_NSS_SOFT))
  688. #endif
  689. #if defined(USART_CR1_FIFOEN)
  690. /**
  691. * @brief Ensure that UART TXFIFO threshold level is valid.
  692. * @param __THRESHOLD__ UART TXFIFO threshold level.
  693. * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid)
  694. */
  695. #define IS_UART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_8) || \
  696. ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_4) || \
  697. ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_2) || \
  698. ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_3_4) || \
  699. ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_7_8) || \
  700. ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_8_8))
  701. /**
  702. * @brief Ensure that USART RXFIFO threshold level is valid.
  703. * @param __THRESHOLD__ USART RXFIFO threshold level.
  704. * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid)
  705. */
  706. #define IS_UART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_8) || \
  707. ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_4) || \
  708. ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_2) || \
  709. ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_3_4) || \
  710. ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_7_8) || \
  711. ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_8_8))
  712. #endif
  713. /**
  714. * @}
  715. */
  716. /* Private functions ---------------------------------------------------------*/
  717. /**
  718. * @}
  719. */
  720. /**
  721. * @}
  722. */
  723. #ifdef __cplusplus
  724. }
  725. #endif
  726. #endif /* __STM32L4xx_HAL_UART_EX_H */
  727. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/