stm32l4xx_hal_tsc.h 26 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32l4xx_hal_tsc.h
  4. * @author MCD Application Team
  5. * @brief Header file of TSC HAL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  10. *
  11. * Redistribution and use in source and binary forms, with or without modification,
  12. * are permitted provided that the following conditions are met:
  13. * 1. Redistributions of source code must retain the above copyright notice,
  14. * this list of conditions and the following disclaimer.
  15. * 2. Redistributions in binary form must reproduce the above copyright notice,
  16. * this list of conditions and the following disclaimer in the documentation
  17. * and/or other materials provided with the distribution.
  18. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  19. * may be used to endorse or promote products derived from this software
  20. * without specific prior written permission.
  21. *
  22. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  23. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  25. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  26. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  28. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  29. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. ******************************************************************************
  34. */
  35. /* Define to prevent recursive inclusion -------------------------------------*/
  36. #ifndef __STM32L4xx_HAL_TSC_H
  37. #define __STM32L4xx_HAL_TSC_H
  38. #ifdef __cplusplus
  39. extern "C" {
  40. #endif
  41. /* Includes ------------------------------------------------------------------*/
  42. #include "stm32l4xx_hal_def.h"
  43. /** @addtogroup STM32L4xx_HAL_Driver
  44. * @{
  45. */
  46. /** @addtogroup TSC
  47. * @{
  48. */
  49. /* Exported types ------------------------------------------------------------*/
  50. /** @defgroup TSC_Exported_Types TSC Exported Types
  51. * @{
  52. */
  53. /**
  54. * @brief TSC state structure definition
  55. */
  56. typedef enum
  57. {
  58. HAL_TSC_STATE_RESET = 0x00, /*!< TSC registers have their reset value */
  59. HAL_TSC_STATE_READY = 0x01, /*!< TSC registers are initialized or acquisition is completed with success */
  60. HAL_TSC_STATE_BUSY = 0x02, /*!< TSC initialization or acquisition is on-going */
  61. HAL_TSC_STATE_ERROR = 0x03 /*!< Acquisition is completed with max count error */
  62. } HAL_TSC_StateTypeDef;
  63. /**
  64. * @brief TSC group status structure definition
  65. */
  66. typedef enum
  67. {
  68. TSC_GROUP_ONGOING = 0x00, /*!< Acquisition on group is on-going or not started */
  69. TSC_GROUP_COMPLETED = 0x01 /*!< Acquisition on group is completed with success (no max count error) */
  70. } TSC_GroupStatusTypeDef;
  71. /**
  72. * @brief TSC init structure definition
  73. */
  74. typedef struct
  75. {
  76. uint32_t CTPulseHighLength; /*!< Charge-transfer high pulse length
  77. This parameter can be a value of @ref TSC_CTPulseHL_Config */
  78. uint32_t CTPulseLowLength; /*!< Charge-transfer low pulse length
  79. This parameter can be a value of @ref TSC_CTPulseLL_Config */
  80. uint32_t SpreadSpectrum; /*!< Spread spectrum activation
  81. This parameter can be a value of @ref TSC_CTPulseLL_Config */
  82. uint32_t SpreadSpectrumDeviation; /*!< Spread spectrum deviation
  83. This parameter must be a number between Min_Data = 0 and Max_Data = 127 */
  84. uint32_t SpreadSpectrumPrescaler; /*!< Spread spectrum prescaler
  85. This parameter can be a value of @ref TSC_SpreadSpec_Prescaler */
  86. uint32_t PulseGeneratorPrescaler; /*!< Pulse generator prescaler
  87. This parameter can be a value of @ref TSC_PulseGenerator_Prescaler */
  88. uint32_t MaxCountValue; /*!< Max count value
  89. This parameter can be a value of @ref TSC_MaxCount_Value */
  90. uint32_t IODefaultMode; /*!< IO default mode
  91. This parameter can be a value of @ref TSC_IO_Default_Mode */
  92. uint32_t SynchroPinPolarity; /*!< Synchro pin polarity
  93. This parameter can be a value of @ref TSC_Synchro_Pin_Polarity */
  94. uint32_t AcquisitionMode; /*!< Acquisition mode
  95. This parameter can be a value of @ref TSC_Acquisition_Mode */
  96. uint32_t MaxCountInterrupt; /*!< Max count interrupt activation
  97. This parameter can be set to ENABLE or DISABLE. */
  98. uint32_t ChannelIOs; /*!< Channel IOs mask */
  99. uint32_t ShieldIOs; /*!< Shield IOs mask */
  100. uint32_t SamplingIOs; /*!< Sampling IOs mask */
  101. } TSC_InitTypeDef;
  102. /**
  103. * @brief TSC IOs configuration structure definition
  104. */
  105. typedef struct
  106. {
  107. uint32_t ChannelIOs; /*!< Channel IOs mask */
  108. uint32_t ShieldIOs; /*!< Shield IOs mask */
  109. uint32_t SamplingIOs; /*!< Sampling IOs mask */
  110. } TSC_IOConfigTypeDef;
  111. /**
  112. * @brief TSC handle Structure definition
  113. */
  114. typedef struct
  115. {
  116. TSC_TypeDef *Instance; /*!< Register base address */
  117. TSC_InitTypeDef Init; /*!< Initialization parameters */
  118. __IO HAL_TSC_StateTypeDef State; /*!< Peripheral state */
  119. HAL_LockTypeDef Lock; /*!< Lock feature */
  120. } TSC_HandleTypeDef;
  121. /**
  122. * @}
  123. */
  124. /* Exported constants --------------------------------------------------------*/
  125. /** @defgroup TSC_Exported_Constants TSC Exported Constants
  126. * @{
  127. */
  128. /** @defgroup TSC_CTPulseHL_Config CTPulse High Length
  129. * @{
  130. */
  131. #define TSC_CTPH_1CYCLE ((uint32_t)((uint32_t) 0 << 28))
  132. #define TSC_CTPH_2CYCLES ((uint32_t)((uint32_t) 1 << 28))
  133. #define TSC_CTPH_3CYCLES ((uint32_t)((uint32_t) 2 << 28))
  134. #define TSC_CTPH_4CYCLES ((uint32_t)((uint32_t) 3 << 28))
  135. #define TSC_CTPH_5CYCLES ((uint32_t)((uint32_t) 4 << 28))
  136. #define TSC_CTPH_6CYCLES ((uint32_t)((uint32_t) 5 << 28))
  137. #define TSC_CTPH_7CYCLES ((uint32_t)((uint32_t) 6 << 28))
  138. #define TSC_CTPH_8CYCLES ((uint32_t)((uint32_t) 7 << 28))
  139. #define TSC_CTPH_9CYCLES ((uint32_t)((uint32_t) 8 << 28))
  140. #define TSC_CTPH_10CYCLES ((uint32_t)((uint32_t) 9 << 28))
  141. #define TSC_CTPH_11CYCLES ((uint32_t)((uint32_t)10 << 28))
  142. #define TSC_CTPH_12CYCLES ((uint32_t)((uint32_t)11 << 28))
  143. #define TSC_CTPH_13CYCLES ((uint32_t)((uint32_t)12 << 28))
  144. #define TSC_CTPH_14CYCLES ((uint32_t)((uint32_t)13 << 28))
  145. #define TSC_CTPH_15CYCLES ((uint32_t)((uint32_t)14 << 28))
  146. #define TSC_CTPH_16CYCLES ((uint32_t)((uint32_t)15 << 28))
  147. /**
  148. * @}
  149. */
  150. /** @defgroup TSC_CTPulseLL_Config CTPulse Low Length
  151. * @{
  152. */
  153. #define TSC_CTPL_1CYCLE ((uint32_t)((uint32_t) 0 << 24))
  154. #define TSC_CTPL_2CYCLES ((uint32_t)((uint32_t) 1 << 24))
  155. #define TSC_CTPL_3CYCLES ((uint32_t)((uint32_t) 2 << 24))
  156. #define TSC_CTPL_4CYCLES ((uint32_t)((uint32_t) 3 << 24))
  157. #define TSC_CTPL_5CYCLES ((uint32_t)((uint32_t) 4 << 24))
  158. #define TSC_CTPL_6CYCLES ((uint32_t)((uint32_t) 5 << 24))
  159. #define TSC_CTPL_7CYCLES ((uint32_t)((uint32_t) 6 << 24))
  160. #define TSC_CTPL_8CYCLES ((uint32_t)((uint32_t) 7 << 24))
  161. #define TSC_CTPL_9CYCLES ((uint32_t)((uint32_t) 8 << 24))
  162. #define TSC_CTPL_10CYCLES ((uint32_t)((uint32_t) 9 << 24))
  163. #define TSC_CTPL_11CYCLES ((uint32_t)((uint32_t)10 << 24))
  164. #define TSC_CTPL_12CYCLES ((uint32_t)((uint32_t)11 << 24))
  165. #define TSC_CTPL_13CYCLES ((uint32_t)((uint32_t)12 << 24))
  166. #define TSC_CTPL_14CYCLES ((uint32_t)((uint32_t)13 << 24))
  167. #define TSC_CTPL_15CYCLES ((uint32_t)((uint32_t)14 << 24))
  168. #define TSC_CTPL_16CYCLES ((uint32_t)((uint32_t)15 << 24))
  169. /**
  170. * @}
  171. */
  172. /** @defgroup TSC_SpreadSpec_Prescaler Spread Spectrum Prescaler
  173. * @{
  174. */
  175. #define TSC_SS_PRESC_DIV1 ((uint32_t)0)
  176. #define TSC_SS_PRESC_DIV2 (TSC_CR_SSPSC)
  177. /**
  178. * @}
  179. */
  180. /** @defgroup TSC_PulseGenerator_Prescaler Pulse Generator Prescaler
  181. * @{
  182. */
  183. #define TSC_PG_PRESC_DIV1 ((uint32_t)(0 << 12))
  184. #define TSC_PG_PRESC_DIV2 ((uint32_t)(1 << 12))
  185. #define TSC_PG_PRESC_DIV4 ((uint32_t)(2 << 12))
  186. #define TSC_PG_PRESC_DIV8 ((uint32_t)(3 << 12))
  187. #define TSC_PG_PRESC_DIV16 ((uint32_t)(4 << 12))
  188. #define TSC_PG_PRESC_DIV32 ((uint32_t)(5 << 12))
  189. #define TSC_PG_PRESC_DIV64 ((uint32_t)(6 << 12))
  190. #define TSC_PG_PRESC_DIV128 ((uint32_t)(7 << 12))
  191. /**
  192. * @}
  193. */
  194. /** @defgroup TSC_MaxCount_Value Max Count Value
  195. * @{
  196. */
  197. #define TSC_MCV_255 ((uint32_t)(0 << 5))
  198. #define TSC_MCV_511 ((uint32_t)(1 << 5))
  199. #define TSC_MCV_1023 ((uint32_t)(2 << 5))
  200. #define TSC_MCV_2047 ((uint32_t)(3 << 5))
  201. #define TSC_MCV_4095 ((uint32_t)(4 << 5))
  202. #define TSC_MCV_8191 ((uint32_t)(5 << 5))
  203. #define TSC_MCV_16383 ((uint32_t)(6 << 5))
  204. /**
  205. * @}
  206. */
  207. /** @defgroup TSC_IO_Default_Mode IO Default Mode
  208. * @{
  209. */
  210. #define TSC_IODEF_OUT_PP_LOW ((uint32_t)0)
  211. #define TSC_IODEF_IN_FLOAT (TSC_CR_IODEF)
  212. /**
  213. * @}
  214. */
  215. /** @defgroup TSC_Synchro_Pin_Polarity Synchro Pin Polarity
  216. * @{
  217. */
  218. #define TSC_SYNC_POLARITY_FALLING ((uint32_t)0)
  219. #define TSC_SYNC_POLARITY_RISING (TSC_CR_SYNCPOL)
  220. /**
  221. * @}
  222. */
  223. /** @defgroup TSC_Acquisition_Mode Acquisition Mode
  224. * @{
  225. */
  226. #define TSC_ACQ_MODE_NORMAL ((uint32_t)0)
  227. #define TSC_ACQ_MODE_SYNCHRO (TSC_CR_AM)
  228. /**
  229. * @}
  230. */
  231. /** @defgroup TSC_IO_Mode IO Mode
  232. * @{
  233. */
  234. #define TSC_IOMODE_UNUSED ((uint32_t)0)
  235. #define TSC_IOMODE_CHANNEL ((uint32_t)1)
  236. #define TSC_IOMODE_SHIELD ((uint32_t)2)
  237. #define TSC_IOMODE_SAMPLING ((uint32_t)3)
  238. /**
  239. * @}
  240. */
  241. /** @defgroup TSC_interrupts_definition Interrupts definition
  242. * @{
  243. */
  244. #define TSC_IT_EOA ((uint32_t)TSC_IER_EOAIE)
  245. #define TSC_IT_MCE ((uint32_t)TSC_IER_MCEIE)
  246. /**
  247. * @}
  248. */
  249. /** @defgroup TSC_flags_definition Flags definition
  250. * @{
  251. */
  252. #define TSC_FLAG_EOA ((uint32_t)TSC_ISR_EOAF)
  253. #define TSC_FLAG_MCE ((uint32_t)TSC_ISR_MCEF)
  254. /**
  255. * @}
  256. */
  257. /** @defgroup TSC_Group_definition Group definition
  258. * @{
  259. */
  260. #define TSC_NB_OF_GROUPS (8)
  261. #define TSC_GROUP1 ((uint32_t)0x00000001)
  262. #define TSC_GROUP2 ((uint32_t)0x00000002)
  263. #define TSC_GROUP3 ((uint32_t)0x00000004)
  264. #define TSC_GROUP4 ((uint32_t)0x00000008)
  265. #define TSC_GROUP5 ((uint32_t)0x00000010)
  266. #define TSC_GROUP6 ((uint32_t)0x00000020)
  267. #define TSC_GROUP7 ((uint32_t)0x00000040)
  268. #define TSC_GROUP8 ((uint32_t)0x00000080)
  269. #define TSC_ALL_GROUPS ((uint32_t)0x000000FF)
  270. #define TSC_GROUP1_IDX ((uint32_t)0)
  271. #define TSC_GROUP2_IDX ((uint32_t)1)
  272. #define TSC_GROUP3_IDX ((uint32_t)2)
  273. #define TSC_GROUP4_IDX ((uint32_t)3)
  274. #define TSC_GROUP5_IDX ((uint32_t)4)
  275. #define TSC_GROUP6_IDX ((uint32_t)5)
  276. #define TSC_GROUP7_IDX ((uint32_t)6)
  277. #define TSC_GROUP8_IDX ((uint32_t)7)
  278. #define TSC_GROUP1_IO1 ((uint32_t)0x00000001)
  279. #define TSC_GROUP1_IO2 ((uint32_t)0x00000002)
  280. #define TSC_GROUP1_IO3 ((uint32_t)0x00000004)
  281. #define TSC_GROUP1_IO4 ((uint32_t)0x00000008)
  282. #define TSC_GROUP1_ALL_IOS ((uint32_t)0x0000000F)
  283. #define TSC_GROUP2_IO1 ((uint32_t)0x00000010)
  284. #define TSC_GROUP2_IO2 ((uint32_t)0x00000020)
  285. #define TSC_GROUP2_IO3 ((uint32_t)0x00000040)
  286. #define TSC_GROUP2_IO4 ((uint32_t)0x00000080)
  287. #define TSC_GROUP2_ALL_IOS ((uint32_t)0x000000F0)
  288. #define TSC_GROUP3_IO1 ((uint32_t)0x00000100)
  289. #define TSC_GROUP3_IO2 ((uint32_t)0x00000200)
  290. #define TSC_GROUP3_IO3 ((uint32_t)0x00000400)
  291. #define TSC_GROUP3_IO4 ((uint32_t)0x00000800)
  292. #define TSC_GROUP3_ALL_IOS ((uint32_t)0x00000F00)
  293. #define TSC_GROUP4_IO1 ((uint32_t)0x00001000)
  294. #define TSC_GROUP4_IO2 ((uint32_t)0x00002000)
  295. #define TSC_GROUP4_IO3 ((uint32_t)0x00004000)
  296. #define TSC_GROUP4_IO4 ((uint32_t)0x00008000)
  297. #define TSC_GROUP4_ALL_IOS ((uint32_t)0x0000F000)
  298. #define TSC_GROUP5_IO1 ((uint32_t)0x00010000)
  299. #define TSC_GROUP5_IO2 ((uint32_t)0x00020000)
  300. #define TSC_GROUP5_IO3 ((uint32_t)0x00040000)
  301. #define TSC_GROUP5_IO4 ((uint32_t)0x00080000)
  302. #define TSC_GROUP5_ALL_IOS ((uint32_t)0x000F0000)
  303. #define TSC_GROUP6_IO1 ((uint32_t)0x00100000)
  304. #define TSC_GROUP6_IO2 ((uint32_t)0x00200000)
  305. #define TSC_GROUP6_IO3 ((uint32_t)0x00400000)
  306. #define TSC_GROUP6_IO4 ((uint32_t)0x00800000)
  307. #define TSC_GROUP6_ALL_IOS ((uint32_t)0x00F00000)
  308. #define TSC_GROUP7_IO1 ((uint32_t)0x01000000)
  309. #define TSC_GROUP7_IO2 ((uint32_t)0x02000000)
  310. #define TSC_GROUP7_IO3 ((uint32_t)0x04000000)
  311. #define TSC_GROUP7_IO4 ((uint32_t)0x08000000)
  312. #define TSC_GROUP7_ALL_IOS ((uint32_t)0x0F000000)
  313. #define TSC_GROUP8_IO1 ((uint32_t)0x10000000)
  314. #define TSC_GROUP8_IO2 ((uint32_t)0x20000000)
  315. #define TSC_GROUP8_IO3 ((uint32_t)0x40000000)
  316. #define TSC_GROUP8_IO4 ((uint32_t)0x80000000)
  317. #define TSC_GROUP8_ALL_IOS ((uint32_t)0xF0000000)
  318. #define TSC_ALL_GROUPS_ALL_IOS ((uint32_t)0xFFFFFFFF)
  319. /**
  320. * @}
  321. */
  322. /**
  323. * @}
  324. */
  325. /* Exported macros -----------------------------------------------------------*/
  326. /** @defgroup TSC_Exported_Macros TSC Exported Macros
  327. * @{
  328. */
  329. /** @brief Reset TSC handle state.
  330. * @param __HANDLE__: TSC handle
  331. * @retval None
  332. */
  333. #define __HAL_TSC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_TSC_STATE_RESET)
  334. /**
  335. * @brief Enable the TSC peripheral.
  336. * @param __HANDLE__: TSC handle
  337. * @retval None
  338. */
  339. #define __HAL_TSC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_TSCE)
  340. /**
  341. * @brief Disable the TSC peripheral.
  342. * @param __HANDLE__: TSC handle
  343. * @retval None
  344. */
  345. #define __HAL_TSC_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_TSCE))
  346. /**
  347. * @brief Start acquisition.
  348. * @param __HANDLE__: TSC handle
  349. * @retval None
  350. */
  351. #define __HAL_TSC_START_ACQ(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_START)
  352. /**
  353. * @brief Stop acquisition.
  354. * @param __HANDLE__: TSC handle
  355. * @retval None
  356. */
  357. #define __HAL_TSC_STOP_ACQ(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_START))
  358. /**
  359. * @brief Set IO default mode to output push-pull low.
  360. * @param __HANDLE__: TSC handle
  361. * @retval None
  362. */
  363. #define __HAL_TSC_SET_IODEF_OUTPPLOW(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_IODEF))
  364. /**
  365. * @brief Set IO default mode to input floating.
  366. * @param __HANDLE__: TSC handle
  367. * @retval None
  368. */
  369. #define __HAL_TSC_SET_IODEF_INFLOAT(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_IODEF)
  370. /**
  371. * @brief Set synchronization polarity to falling edge.
  372. * @param __HANDLE__: TSC handle
  373. * @retval None
  374. */
  375. #define __HAL_TSC_SET_SYNC_POL_FALL(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_SYNCPOL))
  376. /**
  377. * @brief Set synchronization polarity to rising edge and high level.
  378. * @param __HANDLE__: TSC handle
  379. * @retval None
  380. */
  381. #define __HAL_TSC_SET_SYNC_POL_RISE_HIGH(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_SYNCPOL)
  382. /**
  383. * @brief Enable TSC interrupt.
  384. * @param __HANDLE__: TSC handle
  385. * @param __INTERRUPT__: TSC interrupt
  386. * @retval None
  387. */
  388. #define __HAL_TSC_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
  389. /**
  390. * @brief Disable TSC interrupt.
  391. * @param __HANDLE__: TSC handle
  392. * @param __INTERRUPT__: TSC interrupt
  393. * @retval None
  394. */
  395. #define __HAL_TSC_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (uint32_t)(~(__INTERRUPT__)))
  396. /** @brief Check whether the specified TSC interrupt source is enabled or not.
  397. * @param __HANDLE__: TSC Handle
  398. * @param __INTERRUPT__: TSC interrupt
  399. * @retval SET or RESET
  400. */
  401. #define __HAL_TSC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
  402. /**
  403. * @brief Check whether the specified TSC flag is set or not.
  404. * @param __HANDLE__: TSC handle
  405. * @param __FLAG__: TSC flag
  406. * @retval SET or RESET
  407. */
  408. #define __HAL_TSC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) ? SET : RESET)
  409. /**
  410. * @brief Clear the TSC's pending flag.
  411. * @param __HANDLE__: TSC handle
  412. * @param __FLAG__: TSC flag
  413. * @retval None
  414. */
  415. #define __HAL_TSC_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
  416. /**
  417. * @brief Enable schmitt trigger hysteresis on a group of IOs.
  418. * @param __HANDLE__: TSC handle
  419. * @param __GX_IOY_MASK__: IOs mask
  420. * @retval None
  421. */
  422. #define __HAL_TSC_ENABLE_HYSTERESIS(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOHCR |= (__GX_IOY_MASK__))
  423. /**
  424. * @brief Disable schmitt trigger hysteresis on a group of IOs.
  425. * @param __HANDLE__: TSC handle
  426. * @param __GX_IOY_MASK__: IOs mask
  427. * @retval None
  428. */
  429. #define __HAL_TSC_DISABLE_HYSTERESIS(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOHCR &= (uint32_t)(~(__GX_IOY_MASK__)))
  430. /**
  431. * @brief Open analog switch on a group of IOs.
  432. * @param __HANDLE__: TSC handle
  433. * @param __GX_IOY_MASK__: IOs mask
  434. * @retval None
  435. */
  436. #define __HAL_TSC_OPEN_ANALOG_SWITCH(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOASCR &= (uint32_t)(~(__GX_IOY_MASK__)))
  437. /**
  438. * @brief Close analog switch on a group of IOs.
  439. * @param __HANDLE__: TSC handle
  440. * @param __GX_IOY_MASK__: IOs mask
  441. * @retval None
  442. */
  443. #define __HAL_TSC_CLOSE_ANALOG_SWITCH(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOASCR |= (__GX_IOY_MASK__))
  444. /**
  445. * @brief Enable a group of IOs in channel mode.
  446. * @param __HANDLE__: TSC handle
  447. * @param __GX_IOY_MASK__: IOs mask
  448. * @retval None
  449. */
  450. #define __HAL_TSC_ENABLE_CHANNEL(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOCCR |= (__GX_IOY_MASK__))
  451. /**
  452. * @brief Disable a group of channel IOs.
  453. * @param __HANDLE__: TSC handle
  454. * @param __GX_IOY_MASK__: IOs mask
  455. * @retval None
  456. */
  457. #define __HAL_TSC_DISABLE_CHANNEL(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOCCR &= (uint32_t)(~(__GX_IOY_MASK__)))
  458. /**
  459. * @brief Enable a group of IOs in sampling mode.
  460. * @param __HANDLE__: TSC handle
  461. * @param __GX_IOY_MASK__: IOs mask
  462. * @retval None
  463. */
  464. #define __HAL_TSC_ENABLE_SAMPLING(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOSCR |= (__GX_IOY_MASK__))
  465. /**
  466. * @brief Disable a group of sampling IOs.
  467. * @param __HANDLE__: TSC handle
  468. * @param __GX_IOY_MASK__: IOs mask
  469. * @retval None
  470. */
  471. #define __HAL_TSC_DISABLE_SAMPLING(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOSCR &= (uint32_t)(~(__GX_IOY_MASK__)))
  472. /**
  473. * @brief Enable acquisition groups.
  474. * @param __HANDLE__: TSC handle
  475. * @param __GX_MASK__: Groups mask
  476. * @retval None
  477. */
  478. #define __HAL_TSC_ENABLE_GROUP(__HANDLE__, __GX_MASK__) ((__HANDLE__)->Instance->IOGCSR |= (__GX_MASK__))
  479. /**
  480. * @brief Disable acquisition groups.
  481. * @param __HANDLE__: TSC handle
  482. * @param __GX_MASK__: Groups mask
  483. * @retval None
  484. */
  485. #define __HAL_TSC_DISABLE_GROUP(__HANDLE__, __GX_MASK__) ((__HANDLE__)->Instance->IOGCSR &= (uint32_t)(~(__GX_MASK__)))
  486. /** @brief Gets acquisition group status.
  487. * @param __HANDLE__: TSC Handle
  488. * @param __GX_INDEX__: Group index
  489. * @retval SET or RESET
  490. */
  491. #define __HAL_TSC_GET_GROUP_STATUS(__HANDLE__, __GX_INDEX__) \
  492. ((((__HANDLE__)->Instance->IOGCSR & (uint32_t)((uint32_t)1 << ((__GX_INDEX__) + (uint32_t)16))) == (uint32_t)((uint32_t)1 << ((__GX_INDEX__) + (uint32_t)16))) ? TSC_GROUP_COMPLETED : TSC_GROUP_ONGOING)
  493. /**
  494. * @}
  495. */
  496. /* Private macros ------------------------------------------------------------*/
  497. /** @defgroup TSC_Private_Macros TSC Private Macros
  498. * @{
  499. */
  500. #define IS_TSC_CTPH(VAL) (((VAL) == TSC_CTPH_1CYCLE) || \
  501. ((VAL) == TSC_CTPH_2CYCLES) || \
  502. ((VAL) == TSC_CTPH_3CYCLES) || \
  503. ((VAL) == TSC_CTPH_4CYCLES) || \
  504. ((VAL) == TSC_CTPH_5CYCLES) || \
  505. ((VAL) == TSC_CTPH_6CYCLES) || \
  506. ((VAL) == TSC_CTPH_7CYCLES) || \
  507. ((VAL) == TSC_CTPH_8CYCLES) || \
  508. ((VAL) == TSC_CTPH_9CYCLES) || \
  509. ((VAL) == TSC_CTPH_10CYCLES) || \
  510. ((VAL) == TSC_CTPH_11CYCLES) || \
  511. ((VAL) == TSC_CTPH_12CYCLES) || \
  512. ((VAL) == TSC_CTPH_13CYCLES) || \
  513. ((VAL) == TSC_CTPH_14CYCLES) || \
  514. ((VAL) == TSC_CTPH_15CYCLES) || \
  515. ((VAL) == TSC_CTPH_16CYCLES))
  516. #define IS_TSC_CTPL(VAL) (((VAL) == TSC_CTPL_1CYCLE) || \
  517. ((VAL) == TSC_CTPL_2CYCLES) || \
  518. ((VAL) == TSC_CTPL_3CYCLES) || \
  519. ((VAL) == TSC_CTPL_4CYCLES) || \
  520. ((VAL) == TSC_CTPL_5CYCLES) || \
  521. ((VAL) == TSC_CTPL_6CYCLES) || \
  522. ((VAL) == TSC_CTPL_7CYCLES) || \
  523. ((VAL) == TSC_CTPL_8CYCLES) || \
  524. ((VAL) == TSC_CTPL_9CYCLES) || \
  525. ((VAL) == TSC_CTPL_10CYCLES) || \
  526. ((VAL) == TSC_CTPL_11CYCLES) || \
  527. ((VAL) == TSC_CTPL_12CYCLES) || \
  528. ((VAL) == TSC_CTPL_13CYCLES) || \
  529. ((VAL) == TSC_CTPL_14CYCLES) || \
  530. ((VAL) == TSC_CTPL_15CYCLES) || \
  531. ((VAL) == TSC_CTPL_16CYCLES))
  532. #define IS_TSC_SS(VAL) (((VAL) == DISABLE) || ((VAL) == ENABLE))
  533. #define IS_TSC_SSD(VAL) (((VAL) == 0) || (((VAL) > 0) && ((VAL) < 128)))
  534. #define IS_TSC_SS_PRESC(VAL) (((VAL) == TSC_SS_PRESC_DIV1) || ((VAL) == TSC_SS_PRESC_DIV2))
  535. #define IS_TSC_PG_PRESC(VAL) (((VAL) == TSC_PG_PRESC_DIV1) || \
  536. ((VAL) == TSC_PG_PRESC_DIV2) || \
  537. ((VAL) == TSC_PG_PRESC_DIV4) || \
  538. ((VAL) == TSC_PG_PRESC_DIV8) || \
  539. ((VAL) == TSC_PG_PRESC_DIV16) || \
  540. ((VAL) == TSC_PG_PRESC_DIV32) || \
  541. ((VAL) == TSC_PG_PRESC_DIV64) || \
  542. ((VAL) == TSC_PG_PRESC_DIV128))
  543. #define IS_TSC_MCV(VAL) (((VAL) == TSC_MCV_255) || \
  544. ((VAL) == TSC_MCV_511) || \
  545. ((VAL) == TSC_MCV_1023) || \
  546. ((VAL) == TSC_MCV_2047) || \
  547. ((VAL) == TSC_MCV_4095) || \
  548. ((VAL) == TSC_MCV_8191) || \
  549. ((VAL) == TSC_MCV_16383))
  550. #define IS_TSC_IODEF(VAL) (((VAL) == TSC_IODEF_OUT_PP_LOW) || ((VAL) == TSC_IODEF_IN_FLOAT))
  551. #define IS_TSC_SYNC_POL(VAL) (((VAL) == TSC_SYNC_POLARITY_FALLING) || ((VAL) == TSC_SYNC_POLARITY_RISING))
  552. #define IS_TSC_ACQ_MODE(VAL) (((VAL) == TSC_ACQ_MODE_NORMAL) || ((VAL) == TSC_ACQ_MODE_SYNCHRO))
  553. #define IS_TSC_IOMODE(VAL) (((VAL) == TSC_IOMODE_UNUSED) || \
  554. ((VAL) == TSC_IOMODE_CHANNEL) || \
  555. ((VAL) == TSC_IOMODE_SHIELD) || \
  556. ((VAL) == TSC_IOMODE_SAMPLING))
  557. #define IS_TSC_MCE_IT(VAL) (((VAL) == DISABLE) || ((VAL) == ENABLE))
  558. #define IS_TSC_GROUP_INDEX(VAL) (((VAL) == 0) || (((VAL) > 0) && ((VAL) < TSC_NB_OF_GROUPS)))
  559. /**
  560. * @}
  561. */
  562. /* Exported functions --------------------------------------------------------*/
  563. /** @addtogroup TSC_Exported_Functions
  564. * @{
  565. */
  566. /** @addtogroup TSC_Exported_Functions_Group1 Initialization and de-initialization functions
  567. * @{
  568. */
  569. /* Initialization and de-initialization functions *****************************/
  570. HAL_StatusTypeDef HAL_TSC_Init(TSC_HandleTypeDef* htsc);
  571. HAL_StatusTypeDef HAL_TSC_DeInit(TSC_HandleTypeDef *htsc);
  572. void HAL_TSC_MspInit(TSC_HandleTypeDef* htsc);
  573. void HAL_TSC_MspDeInit(TSC_HandleTypeDef* htsc);
  574. /**
  575. * @}
  576. */
  577. /** @addtogroup TSC_Exported_Functions_Group2 Input and Output operation functions
  578. * @{
  579. */
  580. /* IO operation functions *****************************************************/
  581. HAL_StatusTypeDef HAL_TSC_Start(TSC_HandleTypeDef* htsc);
  582. HAL_StatusTypeDef HAL_TSC_Start_IT(TSC_HandleTypeDef* htsc);
  583. HAL_StatusTypeDef HAL_TSC_Stop(TSC_HandleTypeDef* htsc);
  584. HAL_StatusTypeDef HAL_TSC_Stop_IT(TSC_HandleTypeDef* htsc);
  585. HAL_StatusTypeDef HAL_TSC_PollForAcquisition(TSC_HandleTypeDef* htsc);
  586. TSC_GroupStatusTypeDef HAL_TSC_GroupGetStatus(TSC_HandleTypeDef* htsc, uint32_t gx_index);
  587. uint32_t HAL_TSC_GroupGetValue(TSC_HandleTypeDef* htsc, uint32_t gx_index);
  588. /**
  589. * @}
  590. */
  591. /** @addtogroup TSC_Exported_Functions_Group3 Peripheral Control functions
  592. * @{
  593. */
  594. /* Peripheral Control functions ***********************************************/
  595. HAL_StatusTypeDef HAL_TSC_IOConfig(TSC_HandleTypeDef* htsc, TSC_IOConfigTypeDef* config);
  596. HAL_StatusTypeDef HAL_TSC_IODischarge(TSC_HandleTypeDef* htsc, uint32_t choice);
  597. /**
  598. * @}
  599. */
  600. /** @addtogroup TSC_Exported_Functions_Group4 Peripheral State and Errors functions
  601. * @{
  602. */
  603. /* Peripheral State and Error functions ***************************************/
  604. HAL_TSC_StateTypeDef HAL_TSC_GetState(TSC_HandleTypeDef* htsc);
  605. /**
  606. * @}
  607. */
  608. /** @addtogroup TSC_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
  609. * @{
  610. */
  611. /******* TSC IRQHandler and Callbacks used in Interrupt mode */
  612. void HAL_TSC_IRQHandler(TSC_HandleTypeDef* htsc);
  613. void HAL_TSC_ConvCpltCallback(TSC_HandleTypeDef* htsc);
  614. void HAL_TSC_ErrorCallback(TSC_HandleTypeDef* htsc);
  615. /**
  616. * @}
  617. */
  618. /**
  619. * @}
  620. */
  621. /**
  622. * @}
  623. */
  624. /**
  625. * @}
  626. */
  627. #ifdef __cplusplus
  628. }
  629. #endif
  630. #endif /* __STM32L4xx_HAL_TSC_H */
  631. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/