startup_stm32l432xx.s 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460
  1. /**
  2. ******************************************************************************
  3. * @file startup_stm32l432xx.s
  4. * @author MCD Application Team
  5. * @brief STM32L432xx devices vector table for GCC toolchain.
  6. * This module performs:
  7. * - Set the initial SP
  8. * - Set the initial PC == Reset_Handler,
  9. * - Set the vector table entries with the exceptions ISR address,
  10. * - Configure the clock system
  11. * - Branches to main in the C library (which eventually
  12. * calls main()).
  13. * After Reset the Cortex-M4 processor is in Thread mode,
  14. * priority is Privileged, and the Stack is set to Main.
  15. ******************************************************************************
  16. * @attention
  17. *
  18. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  19. *
  20. * Redistribution and use in source and binary forms, with or without modification,
  21. * are permitted provided that the following conditions are met:
  22. * 1. Redistributions of source code must retain the above copyright notice,
  23. * this list of conditions and the following disclaimer.
  24. * 2. Redistributions in binary form must reproduce the above copyright notice,
  25. * this list of conditions and the following disclaimer in the documentation
  26. * and/or other materials provided with the distribution.
  27. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  28. * may be used to endorse or promote products derived from this software
  29. * without specific prior written permission.
  30. *
  31. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  32. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  33. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  34. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  35. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  36. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  37. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  38. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  39. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  40. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  41. *
  42. ******************************************************************************
  43. */
  44. .syntax unified
  45. .cpu cortex-m4
  46. .fpu softvfp
  47. .thumb
  48. .global g_pfnVectors
  49. .global Default_Handler
  50. /* start address for the initialization values of the .data section.
  51. defined in linker script */
  52. .word _sidata
  53. /* start address for the .data section. defined in linker script */
  54. .word _sdata
  55. /* end address for the .data section. defined in linker script */
  56. .word _edata
  57. /* start address for the .bss section. defined in linker script */
  58. .word _sbss
  59. /* end address for the .bss section. defined in linker script */
  60. .word _ebss
  61. .equ BootRAM, 0xF1E0F85F
  62. /**
  63. * @brief This is the code that gets called when the processor first
  64. * starts execution following a reset event. Only the absolutely
  65. * necessary set is performed, after which the application
  66. * supplied main() routine is called.
  67. * @param None
  68. * @retval : None
  69. */
  70. .section .text.Reset_Handler
  71. .weak Reset_Handler
  72. .type Reset_Handler, %function
  73. Reset_Handler:
  74. ldr sp, =_estack /* Atollic update: set stack pointer */
  75. /* Copy the data segment initializers from flash to SRAM */
  76. movs r1, #0
  77. b LoopCopyDataInit
  78. CopyDataInit:
  79. ldr r3, =_sidata
  80. ldr r3, [r3, r1]
  81. str r3, [r0, r1]
  82. adds r1, r1, #4
  83. LoopCopyDataInit:
  84. ldr r0, =_sdata
  85. ldr r3, =_edata
  86. adds r2, r0, r1
  87. cmp r2, r3
  88. bcc CopyDataInit
  89. ldr r2, =_sbss
  90. b LoopFillZerobss
  91. /* Zero fill the bss segment. */
  92. FillZerobss:
  93. movs r3, #0
  94. str r3, [r2], #4
  95. LoopFillZerobss:
  96. ldr r3, = _ebss
  97. cmp r2, r3
  98. bcc FillZerobss
  99. /* Call the clock system intitialization function.*/
  100. bl SystemInit
  101. /* Call the application's entry point.*/
  102. bl main
  103. LoopForever:
  104. b LoopForever
  105. .size Reset_Handler, .-Reset_Handler
  106. /**
  107. * @brief This is the code that gets called when the processor receives an
  108. * unexpected interrupt. This simply enters an infinite loop, preserving
  109. * the system state for examination by a debugger.
  110. *
  111. * @param None
  112. * @retval : None
  113. */
  114. .section .text.Default_Handler,"ax",%progbits
  115. Default_Handler:
  116. Infinite_Loop:
  117. b Infinite_Loop
  118. .size Default_Handler, .-Default_Handler
  119. /******************************************************************************
  120. *
  121. * The minimal vector table for a Cortex-M4. Note that the proper constructs
  122. * must be placed on this to ensure that it ends up at physical address
  123. * 0x0000.0000.
  124. *
  125. ******************************************************************************/
  126. .section .isr_vector,"a",%progbits
  127. .type g_pfnVectors, %object
  128. .size g_pfnVectors, .-g_pfnVectors
  129. g_pfnVectors:
  130. .word _estack
  131. .word Reset_Handler
  132. .word NMI_Handler
  133. .word HardFault_Handler
  134. .word MemManage_Handler
  135. .word BusFault_Handler
  136. .word UsageFault_Handler
  137. .word 0
  138. .word 0
  139. .word 0
  140. .word 0
  141. .word SVC_Handler
  142. .word DebugMon_Handler
  143. .word 0
  144. .word PendSV_Handler
  145. .word SysTick_Handler
  146. .word WWDG_IRQHandler
  147. .word PVD_PVM_IRQHandler
  148. .word TAMP_STAMP_IRQHandler
  149. .word RTC_WKUP_IRQHandler
  150. .word FLASH_IRQHandler
  151. .word RCC_IRQHandler
  152. .word EXTI0_IRQHandler
  153. .word EXTI1_IRQHandler
  154. .word EXTI2_IRQHandler
  155. .word EXTI3_IRQHandler
  156. .word EXTI4_IRQHandler
  157. .word DMA1_Channel1_IRQHandler
  158. .word DMA1_Channel2_IRQHandler
  159. .word DMA1_Channel3_IRQHandler
  160. .word DMA1_Channel4_IRQHandler
  161. .word DMA1_Channel5_IRQHandler
  162. .word DMA1_Channel6_IRQHandler
  163. .word DMA1_Channel7_IRQHandler
  164. .word ADC1_IRQHandler
  165. .word CAN1_TX_IRQHandler
  166. .word CAN1_RX0_IRQHandler
  167. .word CAN1_RX1_IRQHandler
  168. .word CAN1_SCE_IRQHandler
  169. .word EXTI9_5_IRQHandler
  170. .word TIM1_BRK_TIM15_IRQHandler
  171. .word TIM1_UP_TIM16_IRQHandler
  172. .word TIM1_TRG_COM_IRQHandler
  173. .word TIM1_CC_IRQHandler
  174. .word TIM2_IRQHandler
  175. .word 0
  176. .word 0
  177. .word I2C1_EV_IRQHandler
  178. .word I2C1_ER_IRQHandler
  179. .word 0
  180. .word 0
  181. .word SPI1_IRQHandler
  182. .word 0
  183. .word USART1_IRQHandler
  184. .word USART2_IRQHandler
  185. .word 0
  186. .word EXTI15_10_IRQHandler
  187. .word RTC_Alarm_IRQHandler
  188. .word 0
  189. .word 0
  190. .word 0
  191. .word 0
  192. .word 0
  193. .word 0
  194. .word 0
  195. .word 0
  196. .word 0
  197. .word SPI3_IRQHandler
  198. .word 0
  199. .word 0
  200. .word TIM6_DAC_IRQHandler
  201. .word TIM7_IRQHandler
  202. .word DMA2_Channel1_IRQHandler
  203. .word DMA2_Channel2_IRQHandler
  204. .word DMA2_Channel3_IRQHandler
  205. .word DMA2_Channel4_IRQHandler
  206. .word DMA2_Channel5_IRQHandler
  207. .word 0
  208. .word 0
  209. .word 0
  210. .word COMP_IRQHandler
  211. .word LPTIM1_IRQHandler
  212. .word LPTIM2_IRQHandler
  213. .word USB_IRQHandler
  214. .word DMA2_Channel6_IRQHandler
  215. .word DMA2_Channel7_IRQHandler
  216. .word LPUART1_IRQHandler
  217. .word QUADSPI_IRQHandler
  218. .word I2C3_EV_IRQHandler
  219. .word I2C3_ER_IRQHandler
  220. .word SAI1_IRQHandler
  221. .word 0
  222. .word SWPMI1_IRQHandler
  223. .word TSC_IRQHandler
  224. .word 0
  225. .word 0
  226. .word RNG_IRQHandler
  227. .word FPU_IRQHandler
  228. .word CRS_IRQHandler
  229. /*******************************************************************************
  230. *
  231. * Provide weak aliases for each Exception handler to the Default_Handler.
  232. * As they are weak aliases, any function with the same name will override
  233. * this definition.
  234. *
  235. *******************************************************************************/
  236. .weak NMI_Handler
  237. .thumb_set NMI_Handler,Default_Handler
  238. .weak HardFault_Handler
  239. .thumb_set HardFault_Handler,Default_Handler
  240. .weak MemManage_Handler
  241. .thumb_set MemManage_Handler,Default_Handler
  242. .weak BusFault_Handler
  243. .thumb_set BusFault_Handler,Default_Handler
  244. .weak UsageFault_Handler
  245. .thumb_set UsageFault_Handler,Default_Handler
  246. .weak SVC_Handler
  247. .thumb_set SVC_Handler,Default_Handler
  248. .weak DebugMon_Handler
  249. .thumb_set DebugMon_Handler,Default_Handler
  250. .weak PendSV_Handler
  251. .thumb_set PendSV_Handler,Default_Handler
  252. .weak SysTick_Handler
  253. .thumb_set SysTick_Handler,Default_Handler
  254. .weak WWDG_IRQHandler
  255. .thumb_set WWDG_IRQHandler,Default_Handler
  256. .weak PVD_PVM_IRQHandler
  257. .thumb_set PVD_PVM_IRQHandler,Default_Handler
  258. .weak TAMP_STAMP_IRQHandler
  259. .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
  260. .weak RTC_WKUP_IRQHandler
  261. .thumb_set RTC_WKUP_IRQHandler,Default_Handler
  262. .weak FLASH_IRQHandler
  263. .thumb_set FLASH_IRQHandler,Default_Handler
  264. .weak RCC_IRQHandler
  265. .thumb_set RCC_IRQHandler,Default_Handler
  266. .weak EXTI0_IRQHandler
  267. .thumb_set EXTI0_IRQHandler,Default_Handler
  268. .weak EXTI1_IRQHandler
  269. .thumb_set EXTI1_IRQHandler,Default_Handler
  270. .weak EXTI2_IRQHandler
  271. .thumb_set EXTI2_IRQHandler,Default_Handler
  272. .weak EXTI3_IRQHandler
  273. .thumb_set EXTI3_IRQHandler,Default_Handler
  274. .weak EXTI4_IRQHandler
  275. .thumb_set EXTI4_IRQHandler,Default_Handler
  276. .weak DMA1_Channel1_IRQHandler
  277. .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
  278. .weak DMA1_Channel2_IRQHandler
  279. .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
  280. .weak DMA1_Channel3_IRQHandler
  281. .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
  282. .weak DMA1_Channel4_IRQHandler
  283. .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
  284. .weak DMA1_Channel5_IRQHandler
  285. .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
  286. .weak DMA1_Channel6_IRQHandler
  287. .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
  288. .weak DMA1_Channel7_IRQHandler
  289. .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
  290. .weak ADC1_IRQHandler
  291. .thumb_set ADC1_IRQHandler,Default_Handler
  292. .weak CAN1_TX_IRQHandler
  293. .thumb_set CAN1_TX_IRQHandler,Default_Handler
  294. .weak CAN1_RX0_IRQHandler
  295. .thumb_set CAN1_RX0_IRQHandler,Default_Handler
  296. .weak CAN1_RX1_IRQHandler
  297. .thumb_set CAN1_RX1_IRQHandler,Default_Handler
  298. .weak CAN1_SCE_IRQHandler
  299. .thumb_set CAN1_SCE_IRQHandler,Default_Handler
  300. .weak EXTI9_5_IRQHandler
  301. .thumb_set EXTI9_5_IRQHandler,Default_Handler
  302. .weak TIM1_BRK_TIM15_IRQHandler
  303. .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
  304. .weak TIM1_UP_TIM16_IRQHandler
  305. .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
  306. .weak TIM1_TRG_COM_IRQHandler
  307. .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
  308. .weak TIM1_CC_IRQHandler
  309. .thumb_set TIM1_CC_IRQHandler,Default_Handler
  310. .weak TIM2_IRQHandler
  311. .thumb_set TIM2_IRQHandler,Default_Handler
  312. .weak I2C1_EV_IRQHandler
  313. .thumb_set I2C1_EV_IRQHandler,Default_Handler
  314. .weak I2C1_ER_IRQHandler
  315. .thumb_set I2C1_ER_IRQHandler,Default_Handler
  316. .weak SPI1_IRQHandler
  317. .thumb_set SPI1_IRQHandler,Default_Handler
  318. .weak USART1_IRQHandler
  319. .thumb_set USART1_IRQHandler,Default_Handler
  320. .weak USART2_IRQHandler
  321. .thumb_set USART2_IRQHandler,Default_Handler
  322. .weak EXTI15_10_IRQHandler
  323. .thumb_set EXTI15_10_IRQHandler,Default_Handler
  324. .weak RTC_Alarm_IRQHandler
  325. .thumb_set RTC_Alarm_IRQHandler,Default_Handler
  326. .weak SPI3_IRQHandler
  327. .thumb_set SPI3_IRQHandler,Default_Handler
  328. .weak TIM6_DAC_IRQHandler
  329. .thumb_set TIM6_DAC_IRQHandler,Default_Handler
  330. .weak TIM7_IRQHandler
  331. .thumb_set TIM7_IRQHandler,Default_Handler
  332. .weak DMA2_Channel1_IRQHandler
  333. .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
  334. .weak DMA2_Channel2_IRQHandler
  335. .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
  336. .weak DMA2_Channel3_IRQHandler
  337. .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
  338. .weak DMA2_Channel4_IRQHandler
  339. .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
  340. .weak DMA2_Channel5_IRQHandler
  341. .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
  342. .weak COMP_IRQHandler
  343. .thumb_set COMP_IRQHandler,Default_Handler
  344. .weak LPTIM1_IRQHandler
  345. .thumb_set LPTIM1_IRQHandler,Default_Handler
  346. .weak LPTIM2_IRQHandler
  347. .thumb_set LPTIM2_IRQHandler,Default_Handler
  348. .weak USB_IRQHandler
  349. .thumb_set USB_IRQHandler,Default_Handler
  350. .weak DMA2_Channel6_IRQHandler
  351. .thumb_set DMA2_Channel6_IRQHandler,Default_Handler
  352. .weak DMA2_Channel7_IRQHandler
  353. .thumb_set DMA2_Channel7_IRQHandler,Default_Handler
  354. .weak LPUART1_IRQHandler
  355. .thumb_set LPUART1_IRQHandler,Default_Handler
  356. .weak QUADSPI_IRQHandler
  357. .thumb_set QUADSPI_IRQHandler,Default_Handler
  358. .weak I2C3_EV_IRQHandler
  359. .thumb_set I2C3_EV_IRQHandler,Default_Handler
  360. .weak I2C3_ER_IRQHandler
  361. .thumb_set I2C3_ER_IRQHandler,Default_Handler
  362. .weak SAI1_IRQHandler
  363. .thumb_set SAI1_IRQHandler,Default_Handler
  364. .weak SWPMI1_IRQHandler
  365. .thumb_set SWPMI1_IRQHandler,Default_Handler
  366. .weak TSC_IRQHandler
  367. .thumb_set TSC_IRQHandler,Default_Handler
  368. .weak RNG_IRQHandler
  369. .thumb_set RNG_IRQHandler,Default_Handler
  370. .weak FPU_IRQHandler
  371. .thumb_set FPU_IRQHandler,Default_Handler
  372. .weak CRS_IRQHandler
  373. .thumb_set CRS_IRQHandler,Default_Handler
  374. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/