targets.json 191 KB

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  1. {
  2. "Target": {
  3. "core": null,
  4. "default_toolchain": "ARM",
  5. "supported_toolchains": null,
  6. "extra_labels": [],
  7. "is_disk_virtual": false,
  8. "macros": [],
  9. "device_has": [],
  10. "features": [],
  11. "detect_code": [],
  12. "public": false,
  13. "default_lib": "std",
  14. "bootloader_supported": false,
  15. "config": {
  16. "console-uart-flow-control": {
  17. "help": "Console hardware flow control. Options: null, RTS, CTS, RTSCTS.",
  18. "value": null
  19. },
  20. "network-default-interface-type": {
  21. "help": "Default network interface type. Typical options: null, ETHERNET, WIFI, CELLULAR, MESH",
  22. "value": null
  23. }
  24. }
  25. },
  26. "CM4_UARM": {
  27. "inherits": ["Target"],
  28. "core": "Cortex-M4",
  29. "default_toolchain": "uARM",
  30. "public": false,
  31. "supported_toolchains": ["uARM"],
  32. "default_lib": "small"
  33. },
  34. "CM4_ARM": {
  35. "inherits": ["Target"],
  36. "core": "Cortex-M4",
  37. "public": false,
  38. "supported_toolchains": ["ARM"]
  39. },
  40. "CM4F_UARM": {
  41. "inherits": ["Target"],
  42. "core": "Cortex-M4F",
  43. "default_toolchain": "uARM",
  44. "public": false,
  45. "supported_toolchains": ["uARM"],
  46. "default_lib": "small"
  47. },
  48. "CM4F_ARM": {
  49. "inherits": ["Target"],
  50. "core": "Cortex-M4F",
  51. "public": false,
  52. "supported_toolchains": ["ARM"]
  53. },
  54. "LPCTarget": {
  55. "inherits": ["Target"],
  56. "post_binary_hook": {"function": "LPCTargetCode.lpc_patch"},
  57. "public": false
  58. },
  59. "LPC11C24": {
  60. "inherits": ["LPCTarget"],
  61. "core": "Cortex-M0",
  62. "extra_labels": ["NXP", "LPC11XX_11CXX", "LPC11CXX"],
  63. "OUTPUT_EXT": "hex",
  64. "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
  65. "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
  66. "device_has": ["ANALOGIN", "CAN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
  67. "device_name": "LPC11C24FBD48/301"
  68. },
  69. "LPC1114": {
  70. "inherits": ["LPCTarget"],
  71. "core": "Cortex-M0",
  72. "default_toolchain": "uARM",
  73. "extra_labels": ["NXP", "LPC11XX_11CXX", "LPC11XX"],
  74. "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
  75. "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
  76. "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
  77. "default_lib": "small",
  78. "release_versions": ["2"],
  79. "device_name": "LPC1114FN28/102"
  80. },
  81. "LPC11U24": {
  82. "inherits": ["LPCTarget"],
  83. "core": "Cortex-M0",
  84. "default_toolchain": "uARM",
  85. "extra_labels": ["NXP", "LPC11UXX", "LPC11U24_401"],
  86. "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
  87. "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
  88. "detect_code": ["1040"],
  89. "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
  90. "default_lib": "small",
  91. "release_versions": ["2"],
  92. "device_name": "LPC11U24FBD48/401"
  93. },
  94. "OC_MBUINO": {
  95. "inherits": ["LPC11U24"],
  96. "macros": ["TARGET_LPC11U24", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
  97. "extra_labels": ["NXP", "LPC11UXX"],
  98. "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
  99. "release_versions": ["2"]
  100. },
  101. "LPC11U24_301": {
  102. "inherits": ["LPCTarget"],
  103. "core": "Cortex-M0",
  104. "extra_labels": ["NXP", "LPC11UXX"],
  105. "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
  106. "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
  107. "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
  108. "device_name": "LPC11U24FHI33/301"
  109. },
  110. "LPC11U34_421": {
  111. "inherits": ["LPCTarget"],
  112. "core": "Cortex-M0",
  113. "default_toolchain": "uARM",
  114. "extra_labels": ["NXP", "LPC11UXX"],
  115. "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
  116. "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
  117. "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
  118. "default_lib": "small",
  119. "device_name": "LPC11U34FBD48/311"
  120. },
  121. "MICRONFCBOARD": {
  122. "inherits": ["LPC11U34_421"],
  123. "macros_add": ["LPC11U34_421", "APPNEARME_MICRONFCBOARD"],
  124. "extra_labels_add": ["APPNEARME_MICRONFCBOARD"],
  125. "release_versions": ["2"],
  126. "device_name": "LPC11U34FBD48/311"
  127. },
  128. "LPC11U35_401": {
  129. "inherits": ["LPCTarget"],
  130. "core": "Cortex-M0",
  131. "default_toolchain": "uARM",
  132. "extra_labels": ["NXP", "LPC11UXX"],
  133. "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
  134. "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
  135. "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
  136. "default_lib": "small",
  137. "release_versions": ["2"],
  138. "device_name": "LPC11U35FBD48/401"
  139. },
  140. "LPC11U35_501": {
  141. "inherits": ["LPCTarget"],
  142. "core": "Cortex-M0",
  143. "default_toolchain": "uARM",
  144. "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
  145. "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
  146. "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
  147. "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
  148. "default_lib": "small",
  149. "release_versions": ["2"],
  150. "device_name": "LPC11U35FHI33/501"
  151. },
  152. "LPC11U35_501_IBDAP": {
  153. "inherits": ["LPCTarget"],
  154. "core": "Cortex-M0",
  155. "default_toolchain": "uARM",
  156. "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
  157. "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
  158. "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
  159. "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
  160. "default_lib": "small",
  161. "device_name": "LPC11U35FHI33/501"
  162. },
  163. "XADOW_M0": {
  164. "inherits": ["LPC11U35_501"]
  165. },
  166. "LPC11U35_Y5_MBUG": {
  167. "inherits": ["LPCTarget"],
  168. "core": "Cortex-M0",
  169. "default_toolchain": "uARM",
  170. "extra_labels": ["NXP", "LPC11UXX", "MCU_LPC11U35_501"],
  171. "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
  172. "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
  173. "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
  174. "default_lib": "small",
  175. "device_name": "LPC11U35FHI33/501"
  176. },
  177. "LPC11U37_501": {
  178. "inherits": ["LPCTarget"],
  179. "core": "Cortex-M0",
  180. "default_toolchain": "uARM",
  181. "extra_labels": ["NXP", "LPC11UXX"],
  182. "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
  183. "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
  184. "default_lib": "small",
  185. "device_name": "LPC11U37FBD64/501"
  186. },
  187. "LPCCAPPUCCINO": {
  188. "inherits": ["LPC11U37_501"],
  189. "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
  190. "device_name": "LPC11U37FBD64/501"
  191. },
  192. "ARCH_GPRS": {
  193. "supported_form_factors": ["ARDUINO"],
  194. "core": "Cortex-M0",
  195. "default_toolchain": "uARM",
  196. "extra_labels": ["NXP", "LPC11UXX", "LPC11U37_501"],
  197. "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
  198. "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
  199. "inherits": ["LPCTarget"],
  200. "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
  201. "default_lib": "small",
  202. "release_versions": ["2"],
  203. "device_name": "LPC11U37FBD64/501"
  204. },
  205. "LPC11U68": {
  206. "supported_form_factors": ["ARDUINO"],
  207. "core": "Cortex-M0+",
  208. "default_toolchain": "uARM",
  209. "extra_labels": ["NXP", "LPC11U6X"],
  210. "supported_toolchains": ["ARM", "uARM", "GCC_CR", "GCC_ARM", "IAR"],
  211. "inherits": ["LPCTarget"],
  212. "detect_code": ["1168"],
  213. "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SLEEP", "SPI"],
  214. "default_lib": "small",
  215. "release_versions": ["2"],
  216. "device_name": "LPC11U68JBD100"
  217. },
  218. "LPC1347": {
  219. "inherits": ["LPCTarget"],
  220. "core": "Cortex-M3",
  221. "extra_labels": ["NXP", "LPC13XX"],
  222. "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
  223. "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
  224. "release_versions": ["2"],
  225. "device_name": "LPC1347FBD48"
  226. },
  227. "LPC1549": {
  228. "supported_form_factors": ["ARDUINO"],
  229. "core": "Cortex-M3",
  230. "default_toolchain": "uARM",
  231. "extra_labels": ["NXP", "LPC15XX"],
  232. "supported_toolchains": ["uARM", "GCC_CR", "GCC_ARM", "IAR"],
  233. "inherits": ["LPCTarget"],
  234. "detect_code": ["1549"],
  235. "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "INTERRUPTIN", "PWMOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE"],
  236. "default_lib": "small",
  237. "release_versions": ["2"],
  238. "device_name": "LPC1549JBD64"
  239. },
  240. "LPC1768": {
  241. "inherits": ["LPCTarget"],
  242. "core": "Cortex-M3",
  243. "extra_labels": ["NXP", "LPC176X", "MBED_LPC1768", "NXP_EMAC"],
  244. "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
  245. "detect_code": ["1010"],
  246. "device_has": ["USTICKER", "ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "EMAC", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
  247. "release_versions": ["2", "5"],
  248. "features": ["LWIP"],
  249. "device_name": "LPC1768",
  250. "bootloader_supported": true,
  251. "overrides": {
  252. "network-default-interface-type": "ETHERNET"
  253. }
  254. },
  255. "LPC1769": {
  256. "inherits": ["LPC1768"],
  257. "device_name": "LPC1769"
  258. },
  259. "ARCH_PRO": {
  260. "supported_form_factors": ["ARDUINO"],
  261. "core": "Cortex-M3",
  262. "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
  263. "extra_labels": ["NXP", "LPC176X", "NXP_EMAC"],
  264. "macros": ["TARGET_LPC1768"],
  265. "inherits": ["LPCTarget"],
  266. "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "EMAC", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
  267. "release_versions": ["2", "5"],
  268. "features": ["LWIP"],
  269. "device_name": "LPC1768",
  270. "bootloader_supported": true,
  271. "overrides": {
  272. "network-default-interface-type": "ETHERNET"
  273. }
  274. },
  275. "UBLOX_C027": {
  276. "supported_form_factors": ["ARDUINO"],
  277. "core": "Cortex-M3",
  278. "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
  279. "extra_labels": ["NXP", "LPC176X", "NXP_EMAC"],
  280. "config": {
  281. "modem_is_on_board": {
  282. "help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.",
  283. "value": 1,
  284. "macro_name": "MODEM_ON_BOARD"
  285. },
  286. "modem_data_connection_type": {
  287. "help": "Value: Defines how the modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.",
  288. "value": 1,
  289. "macro_name": "MODEM_ON_BOARD_UART"
  290. }
  291. },
  292. "macros": ["TARGET_LPC1768"],
  293. "inherits": ["LPCTarget"],
  294. "device_has": ["USTICKER", "ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "EMAC", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
  295. "release_versions": ["2", "5"],
  296. "features": ["LWIP"],
  297. "device_name": "LPC1768",
  298. "bootloader_supported": true,
  299. "overrides": {
  300. "network-default-interface-type": "CELLULAR"
  301. }
  302. },
  303. "XBED_LPC1768": {
  304. "inherits": ["LPCTarget"],
  305. "core": "Cortex-M3",
  306. "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR", "IAR"],
  307. "extra_labels": ["NXP", "LPC176X", "XBED_LPC1768"],
  308. "macros": ["TARGET_LPC1768"],
  309. "detect_code": ["1010"],
  310. "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOCALFILESYSTEM", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
  311. "device_name": "LPC1768"
  312. },
  313. "LPC810": {
  314. "inherits": ["LPCTarget"],
  315. "core": "Cortex-M0+",
  316. "default_toolchain": "uARM",
  317. "extra_labels": ["NXP", "LPC81X"],
  318. "is_disk_virtual": true,
  319. "supported_toolchains": ["uARM", "IAR", "GCC_ARM"],
  320. "device_has": ["I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE"],
  321. "default_lib": "small",
  322. "device_name": "LPC810M021FN8"
  323. },
  324. "LPC812": {
  325. "supported_form_factors": ["ARDUINO"],
  326. "core": "Cortex-M0+",
  327. "default_toolchain": "uARM",
  328. "extra_labels": ["NXP", "LPC81X"],
  329. "is_disk_virtual": true,
  330. "supported_toolchains": ["uARM", "IAR", "GCC_ARM"],
  331. "inherits": ["LPCTarget"],
  332. "detect_code": ["1050"],
  333. "device_has": ["I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE"],
  334. "default_lib": "small",
  335. "release_versions": ["2"],
  336. "device_name": "LPC812M101JDH20"
  337. },
  338. "LPC824": {
  339. "supported_form_factors": ["ARDUINO"],
  340. "core": "Cortex-M0+",
  341. "default_toolchain": "uARM",
  342. "extra_labels": ["NXP", "LPC82X"],
  343. "is_disk_virtual": true,
  344. "supported_toolchains": ["uARM", "GCC_ARM", "GCC_CR", "IAR"],
  345. "inherits": ["LPCTarget"],
  346. "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
  347. "default_lib": "small",
  348. "release_versions": ["2"],
  349. "device_name": "LPC824M201JDH20"
  350. },
  351. "SSCI824": {
  352. "inherits": ["LPCTarget"],
  353. "core": "Cortex-M0+",
  354. "default_toolchain": "uARM",
  355. "extra_labels": ["NXP", "LPC82X"],
  356. "is_disk_virtual": true,
  357. "supported_toolchains": ["uARM", "GCC_ARM"],
  358. "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
  359. "default_lib": "small",
  360. "release_versions": ["2"]
  361. },
  362. "MCU_LPC4088": {
  363. "inherits": ["LPCTarget"],
  364. "core": "Cortex-M4F",
  365. "extra_labels": ["NXP", "LPC408X", "NXP_EMAC"],
  366. "is_disk_virtual": true,
  367. "supported_toolchains": ["ARM", "GCC_CR", "GCC_ARM", "IAR"],
  368. "post_binary_hook": {
  369. "function": "LPC4088Code.binary_hook"
  370. },
  371. "device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "DEBUG_AWARENESS", "EMAC", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
  372. "features": ["LWIP"],
  373. "device_name": "LPC4088FBD144",
  374. "overrides": {
  375. "network-default-interface-type": "ETHERNET"
  376. }
  377. },
  378. "LPC4088": {
  379. "inherits": ["MCU_LPC4088"],
  380. "release_versions": ["2", "5"]
  381. },
  382. "LPC4088_DM": {
  383. "inherits": ["MCU_LPC4088"],
  384. "release_versions": ["2", "5"]
  385. },
  386. "LPC4330_M4": {
  387. "inherits": ["LPCTarget"],
  388. "core": "Cortex-M4F",
  389. "extra_labels": ["NXP", "LPC43XX", "LPC4330"],
  390. "supported_toolchains": ["ARM", "GCC_CR", "IAR", "GCC_ARM"],
  391. "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
  392. "device_name": "LPC4330"
  393. },
  394. "LPC4330_M0": {
  395. "inherits": ["LPCTarget"],
  396. "core": "Cortex-M0",
  397. "extra_labels": ["NXP", "LPC43XX", "LPC4330"],
  398. "supported_toolchains": ["ARM", "GCC_CR", "IAR"],
  399. "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"]
  400. },
  401. "LPC4337": {
  402. "inherits": ["LPCTarget"],
  403. "core": "Cortex-M4F",
  404. "extra_labels": ["NXP", "LPC43XX", "LPC4337"],
  405. "supported_toolchains": ["ARM"],
  406. "device_has": ["ANALOGIN", "ANALOGOUT", "DEBUG_AWARENESS", "ETHERNET", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
  407. "release_versions": ["2"],
  408. "device_name": "LPC4337"
  409. },
  410. "LPC1800": {
  411. "inherits": ["LPCTarget"],
  412. "core": "Cortex-M3",
  413. "extra_labels": ["NXP", "LPC43XX"],
  414. "public": false,
  415. "supported_toolchains": ["ARM", "GCC_CR", "IAR"]
  416. },
  417. "LPC11U37H_401": {
  418. "supported_form_factors": ["ARDUINO"],
  419. "core": "Cortex-M0",
  420. "default_toolchain": "uARM",
  421. "extra_labels": ["NXP", "LPC11UXX"],
  422. "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
  423. "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "GCC_CR"],
  424. "inherits": ["LPCTarget"],
  425. "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
  426. "default_lib": "small",
  427. "release_versions": ["2"],
  428. "device_name": "LPC11U37HFBD64/401"
  429. },
  430. "ELEKTOR_COCORICO": {
  431. "core": "Cortex-M0+",
  432. "default_toolchain": "uARM",
  433. "extra_labels": ["NXP", "LPC81X"],
  434. "supported_toolchains": ["uARM", "GCC_ARM", "IAR"],
  435. "inherits": ["LPCTarget"],
  436. "is_disk_virtual": true,
  437. "detect_code": ["C000"],
  438. "default_lib": "small",
  439. "device_name": "LPC812M101JDH16"
  440. },
  441. "KL05Z": {
  442. "supported_form_factors": ["ARDUINO"],
  443. "core": "Cortex-M0+",
  444. "default_toolchain": "uARM",
  445. "extra_labels": ["Freescale", "KLXX"],
  446. "is_disk_virtual": true,
  447. "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
  448. "inherits": ["Target"],
  449. "device_has": ["USTICKER", "ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
  450. "default_lib": "small",
  451. "release_versions": ["2"],
  452. "device_name": "MKL05Z32xxx4"
  453. },
  454. "KL25Z": {
  455. "supported_form_factors": ["ARDUINO"],
  456. "core": "Cortex-M0+",
  457. "extra_labels": ["Freescale", "KLXX"],
  458. "is_disk_virtual": true,
  459. "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
  460. "inherits": ["Target"],
  461. "detect_code": ["0200"],
  462. "device_has": ["USTICKER", "ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
  463. "release_versions": ["2", "5"],
  464. "device_name": "MKL25Z128xxx4"
  465. },
  466. "KL26Z": {
  467. "supported_form_factors": ["ARDUINO"],
  468. "core": "Cortex-M0+",
  469. "extra_labels": ["Freescale", "KLXX"],
  470. "is_disk_virtual": true,
  471. "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
  472. "inherits": ["Target"],
  473. "device_has": ["USTICKER", "ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
  474. "device_name": "MKL26Z128xxx4"
  475. },
  476. "KL46Z": {
  477. "supported_form_factors": ["ARDUINO"],
  478. "core": "Cortex-M0+",
  479. "extra_labels": ["Freescale", "KLXX", "FLASH_CMSIS_ALGO"],
  480. "is_disk_virtual": true,
  481. "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
  482. "inherits": ["Target"],
  483. "detect_code": ["0220"],
  484. "device_has": ["USTICKER", "ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
  485. "release_versions": ["2", "5"],
  486. "device_name": "MKL46Z256xxx4",
  487. "bootloader_supported": true
  488. },
  489. "K20D50M": {
  490. "inherits": ["Target"],
  491. "core": "Cortex-M4",
  492. "extra_labels": ["Freescale", "K20XX"],
  493. "is_disk_virtual": true,
  494. "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
  495. "detect_code": ["0230"],
  496. "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
  497. "release_versions": ["2"],
  498. "device_name": "MK20DX128xxx5"
  499. },
  500. "TEENSY3_1": {
  501. "inherits": ["Target"],
  502. "core": "Cortex-M4",
  503. "extra_labels": ["Freescale", "K20XX", "K20DX256"],
  504. "OUTPUT_EXT": "hex",
  505. "is_disk_virtual": true,
  506. "supported_toolchains": ["GCC_ARM", "ARM"],
  507. "post_binary_hook": {
  508. "function": "TEENSY3_1Code.binary_hook",
  509. "toolchains": ["ARM_STD", "ARM_MICRO", "GCC_ARM"]
  510. },
  511. "detect_code": ["0230"],
  512. "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
  513. "release_versions": ["2"],
  514. "device_name": "MK20DX256xxx7"
  515. },
  516. "MCU_K22F512": {
  517. "core": "Cortex-M4F",
  518. "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
  519. "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "MCU_K22F", "MCU_K22F512", "FRDM", "KPSDK_MCUS", "KPSDK_CODE"],
  520. "is_disk_virtual": true,
  521. "public": false,
  522. "macros": ["CPU_MK22FN512VLH12", "FSL_RTOS_MBED"],
  523. "inherits": ["Target"],
  524. "detect_code": ["0231"],
  525. "device_has": ["USTICKER", "LPTICKER", "RTC", "ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
  526. "device_name": "MK22DN512xxx5"
  527. },
  528. "K22F": {
  529. "supported_form_factors": ["ARDUINO"],
  530. "inherits": ["MCU_K22F512"],
  531. "release_versions": ["2", "5"],
  532. "extra_labels_add": ["FRDM"]
  533. },
  534. "KL27Z": {
  535. "inherits": ["Target"],
  536. "core": "Cortex-M0+",
  537. "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"],
  538. "macros": ["CPU_MKL27Z64VLH4", "FSL_RTOS_MBED"],
  539. "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
  540. "supported_form_factors": ["ARDUINO"],
  541. "is_disk_virtual": true,
  542. "default_toolchain": "ARM",
  543. "detect_code": ["0261"],
  544. "device_has": ["USTICKER", "LPTICKER", "RTC", "ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
  545. "default_lib": "std",
  546. "release_versions": ["2"],
  547. "device_name": "MKL27Z64xxx4"
  548. },
  549. "KL43Z": {
  550. "supported_form_factors": ["ARDUINO"],
  551. "core": "Cortex-M0+",
  552. "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
  553. "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"],
  554. "macros": ["CPU_MKL43Z256VLH4", "FSL_RTOS_MBED"],
  555. "is_disk_virtual": true,
  556. "inherits": ["Target"],
  557. "detect_code": ["0262"],
  558. "device_has": ["USTICKER", "LPTICKER", "RTC", "ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
  559. "release_versions": ["2", "5"],
  560. "device_name": "MKL43Z256xxx4"
  561. },
  562. "KL82Z": {
  563. "supported_form_factors": ["ARDUINO"],
  564. "core": "Cortex-M0+",
  565. "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
  566. "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"],
  567. "macros": ["CPU_MKL82Z128VLK7", "FSL_RTOS_MBED"],
  568. "is_disk_virtual": true,
  569. "inherits": ["Target"],
  570. "detect_code": ["0218"],
  571. "device_has": ["USTICKER", "LPTICKER", "RTC", "ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SEMIHOST", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
  572. "release_versions": ["2", "5"],
  573. "device_name": "MKL82Z128xxx7"
  574. },
  575. "USENSE": {
  576. "inherits": ["KL82Z"],
  577. "extra_labels_remove": ["FRDM"],
  578. "supported_form_factors": []
  579. },
  580. "KW24D": {
  581. "supported_form_factors": ["ARDUINO"],
  582. "core": "Cortex-M4",
  583. "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
  584. "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"],
  585. "is_disk_virtual": true,
  586. "macros": ["CPU_MKW24D512VHA5", "FSL_RTOS_MBED"],
  587. "inherits": ["Target"],
  588. "detect_code": ["0250"],
  589. "device_has": ["USTICKER", "LPTICKER", "RTC", "ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG", "FLASH"],
  590. "release_versions": ["2", "5"],
  591. "device_name": "MKW24D512xxx5",
  592. "bootloader_supported": true
  593. },
  594. "KW41Z": {
  595. "supported_form_factors": ["ARDUINO"],
  596. "core": "Cortex-M0+",
  597. "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
  598. "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"],
  599. "is_disk_virtual": true,
  600. "macros": ["CPU_MKW41Z512VHT4", "FSL_RTOS_MBED"],
  601. "inherits": ["Target"],
  602. "detect_code": ["0201"],
  603. "device_has": ["USTICKER", "LPTICKER", "RTC", "ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "TRNG", "STDIO_MESSAGES"],
  604. "release_versions": ["2", "5"],
  605. "device_name": "MKW41Z512xxx4"
  606. },
  607. "MCU_K24F1M": {
  608. "core": "Cortex-M4F",
  609. "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
  610. "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "MCU_K24F", "KPSDK_MCUS", "KPSDK_CODE"],
  611. "is_disk_virtual": true,
  612. "public": false,
  613. "macros": ["CPU_MK24FN1M0VDC12", "FSL_RTOS_MBED"],
  614. "inherits": ["Target"],
  615. "device_has": ["USTICKER", "LPTICKER", "RTC", "ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "TRNG", "FLASH"],
  616. "device_name": "MK24FN1M0xxx12"
  617. },
  618. "RO359B": {
  619. "supported_form_factors": ["ARDUINO"],
  620. "inherits": ["MCU_K24F1M"],
  621. "detect_code": ["1022"],
  622. "release_versions": ["2", "5"]
  623. },
  624. "K64F": {
  625. "supported_form_factors": ["ARDUINO"],
  626. "core": "Cortex-M4F",
  627. "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
  628. "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM", "KPSDK_MCUS", "KPSDK_CODE", "MCU_K64F", "Freescale_EMAC"],
  629. "is_disk_virtual": true,
  630. "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED"],
  631. "inherits": ["Target"],
  632. "detect_code": ["0240"],
  633. "device_has": ["USTICKER", "LPTICKER", "RTC", "CRC", "ANALOGIN", "ANALOGOUT", "EMAC", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "STORAGE", "TRNG", "FLASH"],
  634. "features": ["LWIP", "STORAGE"],
  635. "release_versions": ["2", "5"],
  636. "device_name": "MK64FN1M0xxx12",
  637. "bootloader_supported": true,
  638. "overrides": {
  639. "network-default-interface-type": "ETHERNET"
  640. }
  641. },
  642. "EV_COG_AD4050LZ": {
  643. "inherits": ["Target"],
  644. "core": "Cortex-M4F",
  645. "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
  646. "macros": ["__ADUCM4050__", "EV_COG_AD4050LZ"],
  647. "extra_labels": ["Analog_Devices", "ADUCM4X50", "ADUCM4050", "EV_COG_AD4050LZ", "FLASH_CMSIS_ALGO"],
  648. "device_has": ["FLASH", "USTICKER", "RTC", "SERIAL", "STDIO_MESSAGES", "TRNG", "SLEEP", "INTERRUPTIN", "SPI", "I2C", "ANALOGIN"],
  649. "device_name": "ADuCM4050",
  650. "detect_code": ["0603"],
  651. "release_versions": ["5"],
  652. "bootloader_supported": true
  653. },
  654. "EV_COG_AD3029LZ": {
  655. "inherits": ["Target"],
  656. "core": "Cortex-M3",
  657. "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
  658. "macros": ["__ADUCM3029__", "EV_COG_AD3029LZ"],
  659. "extra_labels": ["Analog_Devices", "ADUCM302X", "ADUCM3029", "EV_COG_AD3029LZ", "FLASH_CMSIS_ALGO"],
  660. "device_has": ["FLASH", "USTICKER", "RTC", "SERIAL", "STDIO_MESSAGES", "TRNG", "SLEEP", "INTERRUPTIN", "SPI", "I2C", "ANALOGIN"],
  661. "device_name": "ADuCM3029",
  662. "detect_code": ["0602"],
  663. "release_versions": ["5"],
  664. "bootloader_supported": true
  665. },
  666. "MTS_GAMBIT": {
  667. "inherits": ["Target"],
  668. "core": "Cortex-M4F",
  669. "supported_toolchains": ["ARM", "GCC_ARM"],
  670. "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "KPSDK_MCUS", "KPSDK_CODE", "MCU_K64F"],
  671. "is_disk_virtual": true,
  672. "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "TARGET_K64F"],
  673. "device_has": ["USTICKER", "LPTICKER", "RTC", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
  674. "device_name": "MK64FN1M0xxx12"
  675. },
  676. "HEXIWEAR": {
  677. "inherits": ["Target"],
  678. "core": "Cortex-M4F",
  679. "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "MCU_K64F"],
  680. "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
  681. "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "TARGET_K64F"],
  682. "is_disk_virtual": true,
  683. "default_toolchain": "ARM",
  684. "detect_code": ["0214"],
  685. "device_has": ["USTICKER", "LPTICKER", "RTC", "ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "TRNG", "FLASH"],
  686. "default_lib": "std",
  687. "release_versions": ["2", "5"],
  688. "device_name": "MK64FN1M0xxx12",
  689. "bootloader_supported": true
  690. },
  691. "K66F": {
  692. "supported_form_factors": ["ARDUINO"],
  693. "core": "Cortex-M4F",
  694. "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
  695. "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM", "Freescale_EMAC"],
  696. "is_disk_virtual": true,
  697. "macros": ["CPU_MK66FN2M0VMD18", "FSL_RTOS_MBED"],
  698. "inherits": ["Target"],
  699. "detect_code": ["0311"],
  700. "device_has": ["USTICKER", "LPTICKER", "RTC", "ANALOGIN", "ANALOGOUT", "EMAC", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG", "FLASH"],
  701. "features": ["LWIP"],
  702. "release_versions": ["2", "5"],
  703. "device_name": "MK66FN2M0xxx18",
  704. "bootloader_supported": true,
  705. "overrides": {
  706. "network-default-interface-type": "ETHERNET"
  707. }
  708. },
  709. "K82F": {
  710. "supported_form_factors": ["ARDUINO"],
  711. "core": "Cortex-M4F",
  712. "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
  713. "extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "FRDM"],
  714. "is_disk_virtual": true,
  715. "macros": ["CPU_MK82FN256VDC15", "FSL_RTOS_MBED"],
  716. "inherits": ["Target"],
  717. "detect_code": ["0217"],
  718. "device_has": ["USTICKER", "LPTICKER", "RTC", "ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "TRNG", "FLASH"],
  719. "release_versions": ["2", "5"],
  720. "device_name": "MK82FN256xxx15"
  721. },
  722. "UBRIDGE": {
  723. "inherits": ["K82F"],
  724. "extra_labels_remove": ["FRDM"],
  725. "supported_form_factors": []
  726. },
  727. "FAMILY_STM32": {
  728. "inherits": ["Target"],
  729. "public": false,
  730. "extra_labels": ["STM"],
  731. "supported_toolchains": ["ARM", "uARM", "IAR", "GCC_ARM"],
  732. "macros": ["TRANSACTION_QUEUE_SIZE_SPI=2"],
  733. "config": {
  734. "lse_available": {
  735. "help": "Define if a Low Speed External xtal (LSE) is available on the board (0 = No, 1 = Yes). If Yes, the LSE will be used to clock the RTC, LPUART, ... otherwise the Low Speed Internal clock (LSI) will be used",
  736. "value": "1"
  737. },
  738. "lpuart_clock_source": {
  739. "help": "Define the LPUART clock source. Mask values: USE_LPUART_CLK_LSE, USE_LPUART_CLK_PCLK1, USE_LPUART_CLK_HSI",
  740. "value": "USE_LPUART_CLK_LSE|USE_LPUART_CLK_PCLK1"
  741. },
  742. "stdio_uart_tx": {
  743. "help": "default TX STDIO pins is defined in PinNames.h file, but it can be overridden"
  744. },
  745. "stdio_uart_rx": {
  746. "help": "default RX STDIO pins is defined in PinNames.h file, but it can be overridden"
  747. }
  748. },
  749. "device_has": ["USTICKER", "LPTICKER", "RTC", "ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"]
  750. },
  751. "MIMXRT1050_EVK": {
  752. "supported_form_factors": ["ARDUINO"],
  753. "core": "Cortex-M7FD",
  754. "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
  755. "extra_labels": ["NXP", "MCUXpresso_MCUS", "EVK", "MIMXRT1050", "IMX"],
  756. "is_disk_virtual": true,
  757. "macros": ["CPU_MIMXRT1052DVL6B", "FSL_RTOS_MBED", "XIP_BOOT_HEADER_ENABLE=1", "XIP_EXTERNAL_FLASH=1", "XIP_BOOT_HEADER_DCD_ENABLE=1", "SKIP_SYSCLK_INIT"],
  758. "inherits": ["Target"],
  759. "detect_code": ["0227"],
  760. "device_has": ["SLEEP", "USTICKER", "LPTICKER", "ANALOGIN", "I2C", "I2CSLAVE", "ERROR_RED", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
  761. "release_versions": ["2", "5"],
  762. "device_name": "MIMXRT1052"
  763. },
  764. "LPC54114": {
  765. "supported_form_factors": ["ARDUINO"],
  766. "core": "Cortex-M4F",
  767. "supported_toolchains": ["ARM", "IAR", "GCC_ARM"],
  768. "extra_labels": ["NXP", "MCUXpresso_MCUS", "LPC54114_M4", "LPCXpresso", "LPC"],
  769. "is_disk_virtual": true,
  770. "macros": ["CPU_LPC54114J256BD64_cm4", "FSL_RTOS_MBED"],
  771. "inherits": ["Target"],
  772. "detect_code": ["1054"],
  773. "device_has": ["USTICKER", "RTC", "ANALOGIN", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH"],
  774. "release_versions": ["2", "5"],
  775. "device_name" : "LPC54114J256BD64"
  776. },
  777. "MCU_LPC546XX": {
  778. "core": "Cortex-M4F",
  779. "supported_toolchains": ["ARM", "IAR", "GCC_ARM"],
  780. "extra_labels": ["NXP", "MCUXpresso_MCUS", "LPCXpresso", "LPC", "LPC546XX", "NXP_EMAC"],
  781. "is_disk_virtual": true,
  782. "macros": ["CPU_LPC54628J512ET180", "FSL_RTOS_MBED"],
  783. "inherits": ["Target"],
  784. "device_has": ["USTICKER", "RTC", "ANALOGIN", "EMAC", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "STDIO_MESSAGES", "FLASH", "TRNG"],
  785. "features": ["LWIP"],
  786. "device_name" : "LPC54628J512ET180",
  787. "overrides": {
  788. "network-default-interface-type": "ETHERNET"
  789. }
  790. },
  791. "LPC546XX": {
  792. "supported_form_factors": ["ARDUINO"],
  793. "inherits": ["MCU_LPC546XX"],
  794. "detect_code": ["1056"],
  795. "release_versions": ["2", "5"]
  796. },
  797. "FF_LPC546XX": {
  798. "inherits": ["MCU_LPC546XX"],
  799. "extra_labels_remove" : ["LPCXpresso"],
  800. "detect_code": ["8081"],
  801. "release_versions": ["2", "5"]
  802. },
  803. "NUCLEO_F030R8": {
  804. "inherits": ["FAMILY_STM32"],
  805. "supported_form_factors": ["ARDUINO", "MORPHO"],
  806. "core": "Cortex-M0",
  807. "extra_labels_add": ["STM32F0", "STM32F030R8"],
  808. "config": {
  809. "clock_source": {
  810. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  811. "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
  812. "macro_name": "CLOCK_SOURCE"
  813. }
  814. },
  815. "detect_code": ["0725"],
  816. "macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
  817. "device_has_add": ["CRC", "SERIAL_FC"],
  818. "device_has_remove": ["LPTICKER"],
  819. "default_lib": "small",
  820. "release_versions": ["2"],
  821. "device_name": "STM32F030R8"
  822. },
  823. "NUCLEO_F031K6": {
  824. "inherits": ["FAMILY_STM32"],
  825. "supported_form_factors": ["ARDUINO"],
  826. "core": "Cortex-M0",
  827. "default_toolchain": "uARM",
  828. "extra_labels_add": ["STM32F0", "STM32F031K6"],
  829. "config": {
  830. "clock_source": {
  831. "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  832. "value": "USE_PLL_HSI",
  833. "macro_name": "CLOCK_SOURCE"
  834. }
  835. },
  836. "detect_code": ["0791"],
  837. "overrides": {"lse_available": 0},
  838. "macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
  839. "device_has_add": ["CRC", "SERIAL_FC"],
  840. "device_has_remove": ["LPTICKER"],
  841. "default_lib": "small",
  842. "release_versions": ["2"],
  843. "device_name": "STM32F031K6"
  844. },
  845. "NUCLEO_F042K6": {
  846. "inherits": ["FAMILY_STM32"],
  847. "supported_form_factors": ["ARDUINO"],
  848. "core": "Cortex-M0",
  849. "default_toolchain": "uARM",
  850. "extra_labels_add": ["STM32F0", "STM32F042K6"],
  851. "config": {
  852. "clock_source": {
  853. "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  854. "value": "USE_PLL_HSI",
  855. "macro_name": "CLOCK_SOURCE"
  856. }
  857. },
  858. "detect_code": ["0785"],
  859. "overrides": {"lse_available": 0},
  860. "macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
  861. "device_has_add": ["CAN", "CRC", "SERIAL_FC"],
  862. "device_has_remove": ["LPTICKER"],
  863. "default_lib": "small",
  864. "release_versions": ["2"],
  865. "device_name": "STM32F042K6"
  866. },
  867. "NUCLEO_F070RB": {
  868. "inherits": ["FAMILY_STM32"],
  869. "supported_form_factors": ["ARDUINO", "MORPHO"],
  870. "core": "Cortex-M0",
  871. "extra_labels_add": ["STM32F0", "STM32F070RB"],
  872. "config": {
  873. "clock_source": {
  874. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  875. "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
  876. "macro_name": "CLOCK_SOURCE"
  877. },
  878. "lpticker_delay_ticks": {
  879. "help": "For targets with low frequency system clock, set lpticker_delay_ticks value to 1",
  880. "value": 1,
  881. "macro_name": "LPTICKER_DELAY_TICKS"
  882. }
  883. },
  884. "detect_code": ["0755"],
  885. "macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
  886. "device_has_add": ["CRC", "SERIAL_FC", "SERIAL_ASYNCH", "FLASH"],
  887. "release_versions": ["2", "5"],
  888. "device_name": "STM32F070RB"
  889. },
  890. "NUCLEO_F072RB": {
  891. "inherits": ["FAMILY_STM32"],
  892. "supported_form_factors": ["ARDUINO", "MORPHO"],
  893. "core": "Cortex-M0",
  894. "extra_labels_add": ["STM32F0", "STM32F072RB"],
  895. "config": {
  896. "clock_source": {
  897. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  898. "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
  899. "macro_name": "CLOCK_SOURCE"
  900. },
  901. "lpticker_delay_ticks": {
  902. "help": "For targets with low frequency system clock, set lpticker_delay_ticks value to 1",
  903. "value": 1,
  904. "macro_name": "LPTICKER_DELAY_TICKS"
  905. }
  906. },
  907. "detect_code": ["0730"],
  908. "macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
  909. "device_has_add": ["ANALOGOUT", "CAN", "CRC", "SERIAL_FC", "SERIAL_ASYNCH", "FLASH"],
  910. "release_versions": ["2", "5"],
  911. "device_name": "STM32F072RB"
  912. },
  913. "NUCLEO_F091RC": {
  914. "inherits": ["FAMILY_STM32"],
  915. "supported_form_factors": ["ARDUINO", "MORPHO"],
  916. "core": "Cortex-M0",
  917. "extra_labels_add": ["STM32F0", "STM32F091RC"],
  918. "config": {
  919. "clock_source": {
  920. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  921. "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
  922. "macro_name": "CLOCK_SOURCE"
  923. },
  924. "lpticker_delay_ticks": {
  925. "help": "For targets with low frequency system clock, set lpticker_delay_ticks value to 1",
  926. "value": 1,
  927. "macro_name": "LPTICKER_DELAY_TICKS"
  928. }
  929. },
  930. "detect_code": ["0750"],
  931. "macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
  932. "device_has_add": ["ANALOGOUT", "CAN", "CRC", "SERIAL_FC", "SERIAL_ASYNCH", "FLASH"],
  933. "release_versions": ["2", "5"],
  934. "device_name": "STM32F091RC"
  935. },
  936. "NUCLEO_F103RB": {
  937. "inherits": ["FAMILY_STM32"],
  938. "supported_form_factors": ["ARDUINO", "MORPHO"],
  939. "core": "Cortex-M3",
  940. "extra_labels_add": ["STM32F1", "STM32F103RB"],
  941. "config": {
  942. "clock_source": {
  943. "help": "Mask value : USE_PLL_HSE_EXTC (SYSCLK=72 MHz) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI (SYSCLK=64 MHz)",
  944. "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
  945. "macro_name": "CLOCK_SOURCE"
  946. },
  947. "clock_source_usb": {
  948. "help": "In case of HSI clock source, to get 48 Mhz USB, SYSCLK has to be reduced from 64 to 48 MHz (set 0 for the max SYSCLK value)",
  949. "value": "0",
  950. "macro_name": "CLOCK_SOURCE_USB"
  951. }
  952. },
  953. "detect_code": ["0700"],
  954. "device_has_add": ["CAN", "SERIAL_FC", "SERIAL_ASYNCH", "FLASH"],
  955. "device_has_remove": ["LPTICKER"],
  956. "release_versions": ["2", "5"],
  957. "device_name": "STM32F103RB"
  958. },
  959. "NUCLEO_F207ZG": {
  960. "inherits": ["FAMILY_STM32"],
  961. "supported_form_factors": ["ARDUINO", "MORPHO"],
  962. "core": "Cortex-M3",
  963. "extra_labels_add": ["STM32F2", "STM32F207ZG", "STM_EMAC"],
  964. "config": {
  965. "d11_configuration": {
  966. "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
  967. "value": "PA_7",
  968. "macro_name": "STM32_D11_SPI_ETHERNET_PIN"
  969. },
  970. "clock_source": {
  971. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  972. "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
  973. "macro_name": "CLOCK_SOURCE"
  974. }
  975. },
  976. "detect_code": ["0835"],
  977. "macros_add": ["USBHOST_OTHER"],
  978. "device_has_add": ["ANALOGOUT", "CAN", "EMAC", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
  979. "device_has_remove": ["LPTICKER"],
  980. "features": ["LWIP"],
  981. "release_versions": ["2", "5"],
  982. "device_name": "STM32F207ZG",
  983. "overrides": {
  984. "network-default-interface-type": "ETHERNET"
  985. }
  986. },
  987. "NUCLEO_F302R8": {
  988. "inherits": ["FAMILY_STM32"],
  989. "supported_form_factors": ["ARDUINO", "MORPHO"],
  990. "core": "Cortex-M4F",
  991. "extra_labels_add": ["STM32F3", "STM32F302x8", "STM32F302R8"],
  992. "config": {
  993. "clock_source": {
  994. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  995. "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
  996. "macro_name": "CLOCK_SOURCE"
  997. }
  998. },
  999. "detect_code": ["0705"],
  1000. "device_has_add": ["ANALOGOUT", "CAN", "CRC", "SERIAL_ASYNCH", "SERIAL_FC"],
  1001. "default_lib": "small",
  1002. "release_versions": ["2"],
  1003. "device_name": "STM32F302R8"
  1004. },
  1005. "NUCLEO_F303K8": {
  1006. "inherits": ["FAMILY_STM32"],
  1007. "supported_form_factors": ["ARDUINO"],
  1008. "core": "Cortex-M4F",
  1009. "extra_labels_add": ["STM32F3", "STM32F303x8", "STM32F303K8"],
  1010. "config": {
  1011. "clock_source": {
  1012. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  1013. "value": "USE_PLL_HSI",
  1014. "macro_name": "CLOCK_SOURCE"
  1015. }
  1016. },
  1017. "overrides": {"lse_available": 0},
  1018. "detect_code": ["0775"],
  1019. "default_lib": "small",
  1020. "device_has_add": ["ANALOGOUT", "CAN", "CRC", "SERIAL_FC"],
  1021. "release_versions": ["2"],
  1022. "device_name": "STM32F303K8"
  1023. },
  1024. "NUCLEO_F303RE": {
  1025. "inherits": ["FAMILY_STM32"],
  1026. "supported_form_factors": ["ARDUINO", "MORPHO"],
  1027. "core": "Cortex-M4F",
  1028. "extra_labels_add": ["STM32F3", "STM32F303xE", "STM32F303RE"],
  1029. "config": {
  1030. "clock_source": {
  1031. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  1032. "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
  1033. "macro_name": "CLOCK_SOURCE"
  1034. }
  1035. },
  1036. "detect_code": ["0745"],
  1037. "device_has_add": ["ANALOGOUT", "CAN", "CRC", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
  1038. "release_versions": ["2", "5"],
  1039. "bootloader_supported": true,
  1040. "device_name": "STM32F303RE"
  1041. },
  1042. "NUCLEO_F303ZE": {
  1043. "inherits": ["FAMILY_STM32"],
  1044. "supported_form_factors": ["ARDUINO", "MORPHO"],
  1045. "core": "Cortex-M4F",
  1046. "extra_labels_add": ["STM32F3", "STM32F303xE", "STM32F303ZE"],
  1047. "config": {
  1048. "clock_source": {
  1049. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  1050. "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
  1051. "macro_name": "CLOCK_SOURCE"
  1052. }
  1053. },
  1054. "detect_code": ["0747"],
  1055. "device_has_add": ["ANALOGOUT", "CAN", "CRC", "FLASH"],
  1056. "release_versions": ["2", "5"],
  1057. "device_name": "STM32F303ZE"
  1058. },
  1059. "NUCLEO_F334R8": {
  1060. "inherits": ["FAMILY_STM32"],
  1061. "supported_form_factors": ["ARDUINO", "MORPHO"],
  1062. "core": "Cortex-M4F",
  1063. "extra_labels_add": ["STM32F3", "STM32F334x8", "STM32F334R8"],
  1064. "config": {
  1065. "clock_source": {
  1066. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  1067. "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
  1068. "macro_name": "CLOCK_SOURCE"
  1069. }
  1070. },
  1071. "detect_code": ["0735"],
  1072. "device_has_add": ["ANALOGOUT", "CAN", "CRC", "SERIAL_ASYNCH", "SERIAL_FC"],
  1073. "default_lib": "small",
  1074. "release_versions": ["2"],
  1075. "device_name": "STM32F334R8"
  1076. },
  1077. "NUCLEO_F401RE": {
  1078. "inherits": ["FAMILY_STM32"],
  1079. "supported_form_factors": ["ARDUINO", "MORPHO"],
  1080. "core": "Cortex-M4F",
  1081. "extra_labels_add": ["STM32F4", "STM32F401xE", "STM32F401RE"],
  1082. "config": {
  1083. "clock_source": {
  1084. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  1085. "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
  1086. "macro_name": "CLOCK_SOURCE"
  1087. }
  1088. },
  1089. "detect_code": ["0720"],
  1090. "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
  1091. "device_has_add": ["SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
  1092. "release_versions": ["2", "5"],
  1093. "device_name": "STM32F401RE"
  1094. },
  1095. "STEVAL_3DP001V1": {
  1096. "inherits": ["FAMILY_STM32"],
  1097. "core": "Cortex-M4F",
  1098. "extra_labels_add": ["STM32F4", "STM32F401xE", "STM32F401VE"],
  1099. "config": {
  1100. "clock_source": {
  1101. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL | USE_PLL_HSI",
  1102. "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI",
  1103. "macro_name": "CLOCK_SOURCE"
  1104. }
  1105. },
  1106. "macros_add": ["USB_STM_HAL", "USBHOST_OTHER", "HSE_VALUE=25000000"],
  1107. "device_has_add": ["SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
  1108. "overrides": {"lse_available": 0},
  1109. "release_versions": ["2", "5"],
  1110. "device_name": "STM32F401VE"
  1111. },
  1112. "NUCLEO_F410RB": {
  1113. "inherits": ["FAMILY_STM32"],
  1114. "supported_form_factors": ["ARDUINO", "MORPHO"],
  1115. "core": "Cortex-M4F",
  1116. "extra_labels_add": ["STM32F4", "STM32F410RB","STM32F410xB", "STM32F410Rx"],
  1117. "config": {
  1118. "clock_source": {
  1119. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  1120. "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
  1121. "macro_name": "CLOCK_SOURCE"
  1122. },
  1123. "lpticker_lptim": {
  1124. "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
  1125. "value": 1
  1126. },
  1127. "lpticker_delay_ticks": {
  1128. "help": "In case of lpticker_lptim=1, set lpticker_delay_ticks=3",
  1129. "value": 3,
  1130. "macro_name": "LPTICKER_DELAY_TICKS"
  1131. }
  1132. },
  1133. "detect_code": ["0744"],
  1134. "device_has_add": ["ANALOGOUT", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
  1135. "release_versions": ["2", "5"],
  1136. "device_name": "STM32F410RB"
  1137. },
  1138. "NUCLEO_F411RE": {
  1139. "inherits": ["FAMILY_STM32"],
  1140. "supported_form_factors": ["ARDUINO", "MORPHO"],
  1141. "core": "Cortex-M4F",
  1142. "extra_labels_add": ["STM32F4", "STM32F411xE", "STM32F411RE"],
  1143. "detect_code": ["0740"],
  1144. "config": {
  1145. "clock_source": {
  1146. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  1147. "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
  1148. "macro_name": "CLOCK_SOURCE"
  1149. },
  1150. "clock_source_usb": {
  1151. "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 100 to 96 MHz (set 0 for the max SYSCLK value)",
  1152. "value": "0",
  1153. "macro_name": "CLOCK_SOURCE_USB"
  1154. }
  1155. },
  1156. "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
  1157. "device_has_add": ["SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
  1158. "release_versions": ["2", "5"],
  1159. "device_name": "STM32F411RE",
  1160. "bootloader_supported": true
  1161. },
  1162. "NUCLEO_F412ZG": {
  1163. "inherits": ["FAMILY_STM32"],
  1164. "supported_form_factors": ["ARDUINO", "MORPHO"],
  1165. "core": "Cortex-M4F",
  1166. "extra_labels_add": ["STM32F4", "STM32F412xG", "STM32F412ZG"],
  1167. "config": {
  1168. "clock_source": {
  1169. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  1170. "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
  1171. "macro_name": "CLOCK_SOURCE"
  1172. }
  1173. },
  1174. "detect_code": ["0826"],
  1175. "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
  1176. "device_has_add": ["CAN", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
  1177. "release_versions": ["2", "5"],
  1178. "device_name": "STM32F412ZG",
  1179. "bootloader_supported": true
  1180. },
  1181. "MTB_MXCHIP_EMW3166": {
  1182. "inherits": ["FAMILY_STM32"],
  1183. "core": "Cortex-M4F",
  1184. "extra_labels_add": ["STM32F4", "STM32F412xG", "STM32F412ZG", "WICED", "CYW43362"],
  1185. "features": ["LWIP"],
  1186. "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
  1187. "device_has_add": ["CAN", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
  1188. "release_versions": ["5"],
  1189. "device_name": "STM32F412ZG",
  1190. "bootloader_supported": true,
  1191. "config": {
  1192. "clock_source": {
  1193. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  1194. "value": "USE_PLL_HSI",
  1195. "macro_name": "CLOCK_SOURCE"
  1196. }
  1197. },
  1198. "overrides": {
  1199. "network-default-interface-type": "WIFI"
  1200. }
  1201. },
  1202. "USI_WM_BN_BM_22": {
  1203. "inherits": ["FAMILY_STM32"],
  1204. "core": "Cortex-M4F",
  1205. "extra_labels_add": ["STM32F4", "STM32F412xG", "STM32F412ZG", "WICED", "CYW4343X", "CORDIO"],
  1206. "features": ["BLE", "LWIP"],
  1207. "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
  1208. "device_has_add": ["SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
  1209. "release_versions": ["5"],
  1210. "device_name": "STM32F412ZG",
  1211. "bootloader_supported": true,
  1212. "public": false,
  1213. "config": {
  1214. "clock_source": {
  1215. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  1216. "value": "USE_PLL_HSI",
  1217. "macro_name": "CLOCK_SOURCE"
  1218. }
  1219. },
  1220. "overrides": {
  1221. "network-default-interface-type": "WIFI"
  1222. }
  1223. },
  1224. "MTB_USI_WM_BN_BM_22": {
  1225. "overrides": {
  1226. "lse_available": 0
  1227. },
  1228. "inherits": ["USI_WM_BN_BM_22"]
  1229. },
  1230. "MTB_ADV_WISE_1530": {
  1231. "inherits": ["USI_WM_BN_BM_22"],
  1232. "config": {
  1233. "led1": "PA_4",
  1234. "led2": "PC_12",
  1235. "led3": "NC"
  1236. },
  1237. "overrides": {
  1238. "stdio_uart_tx": "PB_10",
  1239. "stdio_uart_rx": "PC_11"
  1240. }
  1241. },
  1242. "DISCO_F413ZH": {
  1243. "inherits": ["FAMILY_STM32"],
  1244. "supported_form_factors": ["ARDUINO"],
  1245. "core": "Cortex-M4F",
  1246. "extra_labels_add": ["STM32F4", "STM32F413xx", "STM32F413ZH", "STM32F413xH"],
  1247. "config": {
  1248. "clock_source": {
  1249. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  1250. "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
  1251. "macro_name": "CLOCK_SOURCE"
  1252. },
  1253. "lpticker_lptim": {
  1254. "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
  1255. "value": 1
  1256. },
  1257. "lpticker_delay_ticks": {
  1258. "help": "In case of lpticker_lptim=1, set lpticker_delay_ticks=3",
  1259. "value": 3,
  1260. "macro_name": "LPTICKER_DELAY_TICKS"
  1261. }
  1262. },
  1263. "detect_code": ["0743"],
  1264. "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
  1265. "device_has_add": ["ANALOGOUT", "CAN", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
  1266. "release_versions": ["2", "5"],
  1267. "device_name": "STM32F413ZH"
  1268. },
  1269. "NUCLEO_F413ZH": {
  1270. "inherits": ["FAMILY_STM32"],
  1271. "supported_form_factors": ["ARDUINO"],
  1272. "core": "Cortex-M4F",
  1273. "extra_labels_add": ["STM32F4", "STM32F413xx", "STM32F413ZH", "STM32F413xH"],
  1274. "config": {
  1275. "clock_source": {
  1276. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  1277. "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
  1278. "macro_name": "CLOCK_SOURCE"
  1279. },
  1280. "lpticker_lptim": {
  1281. "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
  1282. "value": 1
  1283. },
  1284. "lpticker_delay_ticks": {
  1285. "help": "In case of lpticker_lptim=1, set lpticker_delay_ticks=3",
  1286. "value": 3,
  1287. "macro_name": "LPTICKER_DELAY_TICKS"
  1288. }
  1289. },
  1290. "detect_code": ["0743"],
  1291. "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
  1292. "device_has_add": ["ANALOGOUT", "CAN", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
  1293. "release_versions": ["2", "5"],
  1294. "device_name": "STM32F413ZH"
  1295. },
  1296. "ELMO_F411RE": {
  1297. "inherits": ["FAMILY_STM32"],
  1298. "supported_form_factors": ["ARDUINO"],
  1299. "core": "Cortex-M4F",
  1300. "default_toolchain": "uARM",
  1301. "extra_labels_add": ["STM32F4", "STM32F411xE", "STM32F411RE"],
  1302. "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
  1303. "detect_code": ["----"],
  1304. "device_has_add": [],
  1305. "default_lib": "small",
  1306. "release_versions": ["2"],
  1307. "device_name": "STM32F411RE"
  1308. },
  1309. "NUCLEO_F429ZI": {
  1310. "inherits": ["FAMILY_STM32"],
  1311. "supported_form_factors": ["ARDUINO"],
  1312. "core": "Cortex-M4F",
  1313. "config": {
  1314. "d11_configuration": {
  1315. "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
  1316. "value": "PA_7",
  1317. "macro_name": "STM32_D11_SPI_ETHERNET_PIN"
  1318. },
  1319. "clock_source": {
  1320. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  1321. "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
  1322. "macro_name": "CLOCK_SOURCE"
  1323. },
  1324. "clock_source_usb": {
  1325. "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)",
  1326. "value": "1",
  1327. "macro_name": "CLOCK_SOURCE_USB"
  1328. }
  1329. },
  1330. "extra_labels_add": ["STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xx", "STM32F429xI", "STM_EMAC"],
  1331. "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
  1332. "device_has_add": ["ANALOGOUT", "CAN", "EMAC", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
  1333. "detect_code": ["0796"],
  1334. "features": ["LWIP"],
  1335. "release_versions": ["2", "5"],
  1336. "device_name": "STM32F429ZI",
  1337. "bootloader_supported": true,
  1338. "overrides": {
  1339. "network-default-interface-type": "ETHERNET"
  1340. }
  1341. },
  1342. "NUCLEO_F439ZI": {
  1343. "inherits": ["FAMILY_STM32"],
  1344. "supported_form_factors": ["ARDUINO"],
  1345. "core": "Cortex-M4F",
  1346. "config": {
  1347. "d11_configuration": {
  1348. "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
  1349. "value": "PA_7",
  1350. "macro_name": "STM32_D11_SPI_ETHERNET_PIN"
  1351. },
  1352. "clock_source": {
  1353. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  1354. "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
  1355. "macro_name": "CLOCK_SOURCE"
  1356. },
  1357. "clock_source_usb": {
  1358. "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)",
  1359. "value": "1",
  1360. "macro_name": "CLOCK_SOURCE_USB"
  1361. }
  1362. },
  1363. "extra_labels_add": ["STM32F4", "STM32F439", "STM32F439ZI", "STM32F439xx", "STM32F439xI", "STM_EMAC"],
  1364. "macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT", "USB_STM_HAL", "USBHOST_OTHER"],
  1365. "device_has_add": ["ANALOGOUT", "CAN", "EMAC", "SERIAL_FC", "TRNG", "FLASH"],
  1366. "detect_code": ["0797"],
  1367. "features": ["LWIP"],
  1368. "release_versions": ["2", "5"],
  1369. "device_name" : "STM32F439ZI",
  1370. "bootloader_supported": true,
  1371. "overrides": {
  1372. "network-default-interface-type": "ETHERNET"
  1373. }
  1374. },
  1375. "NUCLEO_F446RE": {
  1376. "inherits": ["FAMILY_STM32"],
  1377. "supported_form_factors": ["ARDUINO", "MORPHO"],
  1378. "core": "Cortex-M4F",
  1379. "extra_labels_add": ["STM32F4", "STM32F446xE", "STM32F446RE"],
  1380. "config": {
  1381. "clock_source": {
  1382. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  1383. "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
  1384. "macro_name": "CLOCK_SOURCE"
  1385. }
  1386. },
  1387. "detect_code": ["0777"],
  1388. "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
  1389. "device_has_add": ["ANALOGOUT", "CAN", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
  1390. "release_versions": ["2", "5"],
  1391. "device_name": "STM32F446RE",
  1392. "bootloader_supported": true
  1393. },
  1394. "NUCLEO_F446ZE": {
  1395. "inherits": ["FAMILY_STM32"],
  1396. "supported_form_factors": ["ARDUINO", "MORPHO"],
  1397. "core": "Cortex-M4F",
  1398. "extra_labels_add": ["STM32F4", "STM32F446xE", "STM32F446ZE"],
  1399. "config": {
  1400. "clock_source": {
  1401. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  1402. "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
  1403. "macro_name": "CLOCK_SOURCE"
  1404. }
  1405. },
  1406. "detect_code": ["0778"],
  1407. "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
  1408. "device_has_add": ["ANALOGOUT", "CAN", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
  1409. "release_versions": ["2", "5"],
  1410. "device_name": "STM32F446ZE"
  1411. },
  1412. "B96B_F446VE": {
  1413. "inherits": ["FAMILY_STM32"],
  1414. "supported_form_factors": ["ARDUINO", "MORPHO"],
  1415. "core": "Cortex-M4F",
  1416. "extra_labels_add": ["STM32F4", "STM32F446xE", "STM32F446VE"],
  1417. "detect_code": ["0840"],
  1418. "device_has_add": ["ANALOGOUT", "CAN", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
  1419. "release_versions": ["2", "5"],
  1420. "device_name":"STM32F446VE"
  1421. },
  1422. "NUCLEO_F746ZG": {
  1423. "inherits": ["FAMILY_STM32"],
  1424. "core": "Cortex-M7F",
  1425. "extra_labels_add": ["STM32F7", "STM32F746", "STM32F746xG", "STM32F746ZG", "STM_EMAC"],
  1426. "config": {
  1427. "d11_configuration": {
  1428. "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
  1429. "value": "PA_7",
  1430. "macro_name": "STM32_D11_SPI_ETHERNET_PIN"
  1431. },
  1432. "clock_source": {
  1433. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  1434. "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
  1435. "macro_name": "CLOCK_SOURCE"
  1436. },
  1437. "lpticker_lptim": {
  1438. "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
  1439. "value": 1
  1440. },
  1441. "lpticker_delay_ticks": {
  1442. "help": "In case of lpticker_lptim=1, set lpticker_delay_ticks=3",
  1443. "value": 3,
  1444. "macro_name": "LPTICKER_DELAY_TICKS"
  1445. }
  1446. },
  1447. "macros_add": ["USBHOST_OTHER"],
  1448. "supported_form_factors": ["ARDUINO"],
  1449. "detect_code": ["0816"],
  1450. "features": ["LWIP"],
  1451. "device_has_add": ["ANALOGOUT", "CAN", "CRC", "EMAC", "SERIAL_ASYNCH", "TRNG", "FLASH"],
  1452. "release_versions": ["2", "5"],
  1453. "device_name": "STM32F746ZG",
  1454. "bootloader_supported": true,
  1455. "overrides": {
  1456. "network-default-interface-type": "ETHERNET"
  1457. }
  1458. },
  1459. "NUCLEO_F756ZG": {
  1460. "inherits": ["FAMILY_STM32"],
  1461. "core": "Cortex-M7F",
  1462. "extra_labels_add": ["STM32F7", "STM32F756", "STM32F756xG", "STM32F756ZG", "STM_EMAC"],
  1463. "config": {
  1464. "d11_configuration": {
  1465. "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
  1466. "value": "PA_7",
  1467. "macro_name": "STM32_D11_SPI_ETHERNET_PIN"
  1468. },
  1469. "clock_source": {
  1470. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  1471. "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
  1472. "macro_name": "CLOCK_SOURCE"
  1473. },
  1474. "lpticker_lptim": {
  1475. "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
  1476. "value": 1
  1477. },
  1478. "lpticker_delay_ticks": {
  1479. "help": "In case of lpticker_lptim=1, set lpticker_delay_ticks=3",
  1480. "value": 3,
  1481. "macro_name": "LPTICKER_DELAY_TICKS"
  1482. }
  1483. },
  1484. "macros_add": ["TRANSACTION_QUEUE_SIZE_SPI=2", "USBHOST_OTHER", "MBEDTLS_CONFIG_HW_SUPPORT"],
  1485. "supported_form_factors": ["ARDUINO"],
  1486. "detect_code": ["0819"],
  1487. "features": ["LWIP"],
  1488. "device_has_add": ["ANALOGOUT", "CAN", "CRC", "EMAC", "SERIAL_ASYNCH", "TRNG", "FLASH"],
  1489. "release_versions": ["2", "5"],
  1490. "device_name": "STM32F756ZG",
  1491. "overrides": {
  1492. "network-default-interface-type": "ETHERNET"
  1493. }
  1494. },
  1495. "NUCLEO_F767ZI": {
  1496. "inherits": ["FAMILY_STM32"],
  1497. "core": "Cortex-M7FD",
  1498. "extra_labels_add": ["STM32F7", "STM32F767", "STM32F767xI", "STM32F767ZI", "STM_EMAC"],
  1499. "config": {
  1500. "flash_dual_bank": {
  1501. "help": "Default board configuration is Single Bank Flash. If you enable Dual Bank with ST Link Utility, set value to 1",
  1502. "value": "0"
  1503. },
  1504. "d11_configuration": {
  1505. "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
  1506. "value": "PA_7",
  1507. "macro_name": "STM32_D11_SPI_ETHERNET_PIN"
  1508. },
  1509. "clock_source": {
  1510. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  1511. "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
  1512. "macro_name": "CLOCK_SOURCE"
  1513. },
  1514. "lpticker_lptim": {
  1515. "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
  1516. "value": 1
  1517. },
  1518. "lpticker_delay_ticks": {
  1519. "help": "In case of lpticker_lptim=1, set lpticker_delay_ticks=3",
  1520. "value": 3,
  1521. "macro_name": "LPTICKER_DELAY_TICKS"
  1522. }
  1523. },
  1524. "supported_form_factors": ["ARDUINO"],
  1525. "macros_add": ["USBHOST_OTHER"],
  1526. "detect_code": ["0818"],
  1527. "features": ["LWIP"],
  1528. "device_has_add": ["ANALOGOUT", "CAN", "CRC", "EMAC", "SERIAL_ASYNCH", "TRNG", "FLASH"],
  1529. "release_versions": ["2", "5"],
  1530. "device_name": "STM32F767ZI",
  1531. "bootloader_supported": true,
  1532. "overrides": {
  1533. "network-default-interface-type": "ETHERNET"
  1534. }
  1535. },
  1536. "NUCLEO_L011K4": {
  1537. "inherits": ["FAMILY_STM32"],
  1538. "core": "Cortex-M0+",
  1539. "extra_labels_add": ["STM32L0", "STM32L011K4"],
  1540. "supported_toolchains": ["uARM"],
  1541. "default_toolchain": "uARM",
  1542. "supported_form_factors": ["ARDUINO"],
  1543. "config": {
  1544. "clock_source": {
  1545. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  1546. "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
  1547. "macro_name": "CLOCK_SOURCE"
  1548. },
  1549. "lpticker_lptim": {
  1550. "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
  1551. "value": 1
  1552. },
  1553. "lpticker_delay_ticks": {
  1554. "help": "In case of lpticker_lptim=1, set lpticker_delay_ticks=3",
  1555. "value": 3,
  1556. "macro_name": "LPTICKER_DELAY_TICKS"
  1557. }
  1558. },
  1559. "detect_code": ["0780"],
  1560. "device_has_add": ["CRC", "SERIAL_FC", "FLASH"],
  1561. "default_lib": "small",
  1562. "release_versions": ["2"],
  1563. "device_name": "STM32L011K4"
  1564. },
  1565. "NUCLEO_L031K6": {
  1566. "inherits": ["FAMILY_STM32"],
  1567. "core": "Cortex-M0+",
  1568. "extra_labels_add": ["STM32L0", "STM32L031K6"],
  1569. "default_toolchain": "uARM",
  1570. "supported_form_factors": ["ARDUINO"],
  1571. "config": {
  1572. "clock_source": {
  1573. "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  1574. "value": "USE_PLL_HSI",
  1575. "macro_name": "CLOCK_SOURCE"
  1576. },
  1577. "lpticker_lptim": {
  1578. "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
  1579. "value": 1
  1580. },
  1581. "lpticker_delay_ticks": {
  1582. "help": "In case of lpticker_lptim=1, set lpticker_delay_ticks=3",
  1583. "value": 3,
  1584. "macro_name": "LPTICKER_DELAY_TICKS"
  1585. }
  1586. },
  1587. "detect_code": ["0790"],
  1588. "device_has_add": ["CRC", "SERIAL_FC", "FLASH"],
  1589. "default_lib": "small",
  1590. "release_versions": ["2"],
  1591. "device_name": "STM32L031K6"
  1592. },
  1593. "NUCLEO_L053R8": {
  1594. "inherits": ["FAMILY_STM32"],
  1595. "supported_form_factors": ["ARDUINO", "MORPHO"],
  1596. "core": "Cortex-M0+",
  1597. "extra_labels_add": ["STM32L0", "STM32L053x8", "STM32L053R8"],
  1598. "config": {
  1599. "clock_source": {
  1600. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  1601. "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
  1602. "macro_name": "CLOCK_SOURCE"
  1603. },
  1604. "lpticker_lptim": {
  1605. "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
  1606. "value": 1
  1607. },
  1608. "lpticker_delay_ticks": {
  1609. "help": "In case of lpticker_lptim=1, set lpticker_delay_ticks=3",
  1610. "value": 3,
  1611. "macro_name": "LPTICKER_DELAY_TICKS"
  1612. }
  1613. },
  1614. "detect_code": ["0715"],
  1615. "device_has_add": ["ANALOGOUT", "CRC", "SERIAL_FC", "SERIAL_ASYNCH", "FLASH"],
  1616. "default_lib": "small",
  1617. "release_versions": ["2"],
  1618. "device_name": "STM32L053R8"
  1619. },
  1620. "NUCLEO_L073RZ": {
  1621. "inherits": ["FAMILY_STM32"],
  1622. "supported_form_factors": ["ARDUINO", "MORPHO"],
  1623. "core": "Cortex-M0+",
  1624. "extra_labels_add": ["STM32L0", "STM32L073RZ", "STM32L073xx"],
  1625. "config": {
  1626. "clock_source": {
  1627. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  1628. "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
  1629. "macro_name": "CLOCK_SOURCE"
  1630. },
  1631. "lpticker_lptim": {
  1632. "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
  1633. "value": 1
  1634. },
  1635. "lpticker_delay_ticks": {
  1636. "help": "In case of lpticker_lptim=1, set lpticker_delay_ticks=3",
  1637. "value": 3,
  1638. "macro_name": "LPTICKER_DELAY_TICKS"
  1639. }
  1640. },
  1641. "detect_code": ["0760"],
  1642. "device_has_add": ["ANALOGOUT", "CRC", "SERIAL_FC", "SERIAL_ASYNCH", "TRNG", "FLASH"],
  1643. "release_versions": ["2", "5"],
  1644. "device_name": "STM32L073RZ"
  1645. },
  1646. "NUCLEO_L152RE": {
  1647. "inherits": ["FAMILY_STM32"],
  1648. "supported_form_factors": ["ARDUINO", "MORPHO"],
  1649. "core": "Cortex-M3",
  1650. "extra_labels_add": ["STM32L1", "STM32L152RE"],
  1651. "config": {
  1652. "clock_source": {
  1653. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  1654. "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
  1655. "macro_name": "CLOCK_SOURCE"
  1656. },
  1657. "lpticker_delay_ticks": {
  1658. "help": "For targets with low frequency system clock, set lpticker_delay_ticks value to 1",
  1659. "value": 1,
  1660. "macro_name": "LPTICKER_DELAY_TICKS"
  1661. }
  1662. },
  1663. "detect_code": ["0710"],
  1664. "device_has_add": ["ANALOGOUT", "SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
  1665. "release_versions": ["2", "5"],
  1666. "device_name": "STM32L152RE"
  1667. },
  1668. "NUCLEO_L432KC": {
  1669. "inherits": ["FAMILY_STM32"],
  1670. "supported_form_factors": ["ARDUINO"],
  1671. "core": "Cortex-M4F",
  1672. "extra_labels_add": ["STM32L4", "STM32L432xC", "STM32L432KC"],
  1673. "config": {
  1674. "clock_source": {
  1675. "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
  1676. "value": "USE_PLL_MSI",
  1677. "macro_name": "CLOCK_SOURCE"
  1678. },
  1679. "lpticker_lptim": {
  1680. "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
  1681. "value": 1
  1682. },
  1683. "lpticker_delay_ticks": {
  1684. "help": "In case of lpticker_lptim=1, set lpticker_delay_ticks=3",
  1685. "value": 3,
  1686. "macro_name": "LPTICKER_DELAY_TICKS"
  1687. }
  1688. },
  1689. "detect_code": ["0770"],
  1690. "device_has_add": ["ANALOGOUT", "CRC", "SERIAL_FC", "SERIAL_ASYNCH", "CAN", "TRNG", "FLASH"],
  1691. "release_versions": ["2", "5"],
  1692. "device_name": "STM32L432KC",
  1693. "bootloader_supported": true
  1694. },
  1695. "NUCLEO_L433RC_P": {
  1696. "inherits": ["FAMILY_STM32"],
  1697. "supported_form_factors": ["ARDUINO", "MORPHO"],
  1698. "core": "Cortex-M4F",
  1699. "extra_labels_add": ["STM32L4", "STM32L433xC", "STM32L433RC"],
  1700. "config": {
  1701. "clock_source": {
  1702. "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
  1703. "value": "USE_PLL_MSI",
  1704. "macro_name": "CLOCK_SOURCE"
  1705. },
  1706. "lpticker_lptim": {
  1707. "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
  1708. "value": 1
  1709. },
  1710. "lpticker_delay_ticks": {
  1711. "help": "In case of lpticker_lptim=1, set lpticker_delay_ticks=3",
  1712. "value": 3,
  1713. "macro_name": "LPTICKER_DELAY_TICKS"
  1714. }
  1715. },
  1716. "detect_code": ["0779"],
  1717. "device_has_add": ["ANALOGOUT", "CRC", "SERIAL_FC", "SERIAL_ASYNCH", "CAN", "TRNG", "FLASH"],
  1718. "release_versions": ["2", "5"],
  1719. "device_name": "STM32L433RC",
  1720. "bootloader_supported": true
  1721. },
  1722. "MTB_ADV_WISE_1510": {
  1723. "inherits": ["FAMILY_STM32"],
  1724. "supported_form_factors": ["ARDUINO"],
  1725. "core": "Cortex-M4F",
  1726. "extra_labels_add": ["STM32L4", "STM32L443xC", "STM32L443RC"],
  1727. "config": {
  1728. "clock_source": {
  1729. "help": "Mask value : USE_PLL_HSI | USE_PLL_MSI",
  1730. "value": "USE_PLL_HSI",
  1731. "macro_name": "CLOCK_SOURCE"
  1732. }
  1733. },
  1734. "overrides": {"lse_available": 0},
  1735. "release_versions": ["5"],
  1736. "device_has_add": ["ANALOGOUT", "CRC", "SERIAL_FC", "SERIAL_ASYNCH", "CAN", "TRNG", "FLASH"],
  1737. "device_has_remove": ["LPTICKER"],
  1738. "macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT"],
  1739. "device_name" : "STM32L443RC",
  1740. "detect_code": ["0458"],
  1741. "bootloader_supported": true
  1742. },
  1743. "NUCLEO_L476RG": {
  1744. "inherits": ["FAMILY_STM32"],
  1745. "supported_form_factors": ["ARDUINO", "MORPHO"],
  1746. "core": "Cortex-M4F",
  1747. "extra_labels_add": ["STM32L4", "STM32L476RG", "STM32L476xG"],
  1748. "config": {
  1749. "clock_source": {
  1750. "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
  1751. "value": "USE_PLL_MSI",
  1752. "macro_name": "CLOCK_SOURCE"
  1753. },
  1754. "lpticker_lptim": {
  1755. "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
  1756. "value": 1
  1757. },
  1758. "lpticker_delay_ticks": {
  1759. "help": "In case of lpticker_lptim=1, set lpticker_delay_ticks=3",
  1760. "value": 3,
  1761. "macro_name": "LPTICKER_DELAY_TICKS"
  1762. }
  1763. },
  1764. "detect_code": ["0765"],
  1765. "macros_add": ["USBHOST_OTHER", "TWO_RAM_REGIONS"],
  1766. "device_has_add": ["ANALOGOUT", "CAN", "CRC", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
  1767. "release_versions": ["2", "5"],
  1768. "device_name": "STM32L476RG",
  1769. "bootloader_supported": true
  1770. },
  1771. "SILICA_SENSOR_NODE": {
  1772. "inherits": ["FAMILY_STM32"],
  1773. "core": "Cortex-M4F",
  1774. "default_toolchain": "GCC_ARM",
  1775. "extra_labels_add": ["STM32L4", "STM32L476xG", "STM32L476JG"],
  1776. "config": {
  1777. "clock_source": {
  1778. "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
  1779. "value": "USE_PLL_MSI",
  1780. "macro_name": "CLOCK_SOURCE"
  1781. }
  1782. },
  1783. "detect_code": ["0766"],
  1784. "macros_add": ["USBHOST_OTHER", "TWO_RAM_REGIONS"],
  1785. "device_has_add": ["ANALOGOUT", "CAN", "CRC", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
  1786. "release_versions": ["5"],
  1787. "device_name": "STM32L476JG"
  1788. },
  1789. "NUCLEO_L486RG": {
  1790. "inherits": ["FAMILY_STM32"],
  1791. "supported_form_factors": ["ARDUINO", "MORPHO"],
  1792. "core": "Cortex-M4F",
  1793. "extra_labels_add": ["STM32L4", "STM32L486RG", "STM32L486xG"],
  1794. "config": {
  1795. "clock_source": {
  1796. "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
  1797. "value": "USE_PLL_MSI",
  1798. "macro_name": "CLOCK_SOURCE"
  1799. },
  1800. "lpticker_lptim": {
  1801. "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
  1802. "value": 1
  1803. },
  1804. "lpticker_delay_ticks": {
  1805. "help": "In case of lpticker_lptim=1, set lpticker_delay_ticks=3",
  1806. "value": 3,
  1807. "macro_name": "LPTICKER_DELAY_TICKS"
  1808. }
  1809. },
  1810. "detect_code": ["0827"],
  1811. "macros_add": ["USBHOST_OTHER", "MBEDTLS_CONFIG_HW_SUPPORT", "TWO_RAM_REGIONS"],
  1812. "device_has_add": ["ANALOGOUT", "CAN", "CRC", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
  1813. "release_versions": ["2", "5"],
  1814. "device_name": "STM32L486RG"
  1815. },
  1816. "MTB_ADV_WISE_1570": {
  1817. "inherits": ["FAMILY_STM32"],
  1818. "core": "Cortex-M4F",
  1819. "extra_labels_add": ["STM32L4", "STM32L486RG", "STM32L486xG", "WISE_1570"],
  1820. "config": {
  1821. "clock_source": {
  1822. "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
  1823. "value": "USE_PLL_HSE_XTAL",
  1824. "macro_name": "CLOCK_SOURCE"
  1825. }
  1826. },
  1827. "overrides": {"lpuart_clock_source": "USE_LPUART_CLK_HSI"},
  1828. "detect_code": ["0460"],
  1829. "macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT", "WISE_1570", "TWO_RAM_REGIONS"],
  1830. "device_has_add": ["ANALOGOUT", "CRC", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
  1831. "device_has_remove": ["LPTICKER"],
  1832. "release_versions": ["5"],
  1833. "device_name": "STM32L486RG",
  1834. "bootloader_supported": true,
  1835. "OUTPUT_EXT": "hex"
  1836. },
  1837. "ARCH_MAX": {
  1838. "inherits": ["FAMILY_STM32"],
  1839. "supported_form_factors": ["ARDUINO"],
  1840. "core": "Cortex-M4F",
  1841. "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
  1842. "program_cycle_s": 2,
  1843. "extra_labels_add": ["STM32F4", "STM32F407", "STM32F407xG", "STM32F407VG"],
  1844. "device_has_add": ["ANALOGOUT"],
  1845. "release_versions": ["2"],
  1846. "device_name": "STM32F407VG"
  1847. },
  1848. "WIO_3G": {
  1849. "inherits": ["FAMILY_STM32"],
  1850. "core": "Cortex-M4F",
  1851. "config": {
  1852. "clock_source": {
  1853. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL | USE_PLL_HSI",
  1854. "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI",
  1855. "macro_name": "CLOCK_SOURCE"
  1856. },
  1857. "clock_source_usb": {
  1858. "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)",
  1859. "value": "1",
  1860. "macro_name": "CLOCK_SOURCE_USB"
  1861. },
  1862. "modem_is_on_board": {
  1863. "help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.",
  1864. "value": 1,
  1865. "macro_name": "MODEM_ON_BOARD"
  1866. },
  1867. "modem_data_connection_type": {
  1868. "help": "Value: Defines how the modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.",
  1869. "value": 1,
  1870. "macro_name": "MODEM_ON_BOARD_UART"
  1871. }
  1872. },
  1873. "extra_labels_add": ["STM32F4", "STM32F439", "STM32F439VI", "STM32F439xx", "STM32F439xI"],
  1874. "macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT", "USB_STM_HAL", "USBHOST_OTHER"],
  1875. "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_FC", "TRNG", "FLASH"],
  1876. "detect_code": ["9014"],
  1877. "features": ["LWIP"],
  1878. "release_versions": ["2", "5"],
  1879. "device_name" : "STM32F439VI",
  1880. "bootloader_supported": true
  1881. },
  1882. "DISCO_F051R8": {
  1883. "inherits": ["FAMILY_STM32"],
  1884. "core": "Cortex-M0",
  1885. "extra_labels_add": ["STM32F0", "STM32F051", "STM32F051R8"],
  1886. "supported_toolchains": ["GCC_ARM"],
  1887. "config": {
  1888. "clock_source": {
  1889. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  1890. "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
  1891. "macro_name": "CLOCK_SOURCE"
  1892. }
  1893. },
  1894. "macros_add": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
  1895. "device_has_add": ["CRC", "SERIAL_FC"],
  1896. "device_has_remove": ["LPTICKER"],
  1897. "device_name": "STM32F051R8"
  1898. },
  1899. "DISCO_F100RB": {
  1900. "inherits": ["FAMILY_STM32"],
  1901. "core": "Cortex-M3",
  1902. "extra_labels_add": ["STM32F1", "STM32F100RB"],
  1903. "supported_toolchains": ["GCC_ARM"],
  1904. "device_has_add": [],
  1905. "device_has_remove": ["LPTICKER"],
  1906. "device_name": "STM32F100RB"
  1907. },
  1908. "DISCO_F303VC": {
  1909. "inherits": ["FAMILY_STM32"],
  1910. "core": "Cortex-M4F",
  1911. "extra_labels_add": ["STM32F3", "STM32F303", "STM32F303xC", "STM32F303VC"],
  1912. "overrides": {"lse_available": 0},
  1913. "config": {
  1914. "clock_source": {
  1915. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSI",
  1916. "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
  1917. "macro_name": "CLOCK_SOURCE"
  1918. }
  1919. },
  1920. "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
  1921. "release_versions": ["2", "5"],
  1922. "device_has_add": ["ANALOGOUT", "CAN", "CRC", "SERIAL_FC"],
  1923. "device_name": "STM32F303VC"
  1924. },
  1925. "DISCO_F334C8": {
  1926. "inherits": ["FAMILY_STM32"],
  1927. "core": "Cortex-M4F",
  1928. "extra_labels_add": ["STM32F3", "STM32F334x8","STM32F334C8"],
  1929. "config": {
  1930. "clock_source": {
  1931. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  1932. "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
  1933. "macro_name": "CLOCK_SOURCE"
  1934. }
  1935. },
  1936. "overrides": {"lse_available": 0},
  1937. "detect_code": ["0810"],
  1938. "device_has_add": ["ANALOGOUT", "CRC", "SERIAL_ASYNCH", "SERIAL_FC"],
  1939. "default_lib": "small",
  1940. "release_versions": ["2"],
  1941. "device_name": "STM32F334C8"
  1942. },
  1943. "DISCO_F407VG": {
  1944. "inherits": ["FAMILY_STM32"],
  1945. "core": "Cortex-M4F",
  1946. "extra_labels_add": ["STM32F4", "STM32F407", "STM32F407xG", "STM32F407VG"],
  1947. "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
  1948. "config": {
  1949. "clock_source": {
  1950. "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL | USE_PLL_HSI",
  1951. "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI",
  1952. "macro_name": "CLOCK_SOURCE"
  1953. }
  1954. },
  1955. "macros_add": ["USB_STM_HAL"],
  1956. "overrides": {"lse_available": 0},
  1957. "device_has_add": ["ANALOGOUT"],
  1958. "release_versions": ["2", "5"],
  1959. "device_name": "STM32F407VG"
  1960. },
  1961. "DISCO_F429ZI": {
  1962. "inherits": ["FAMILY_STM32"],
  1963. "core": "Cortex-M4F",
  1964. "extra_labels_add": ["STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xI", "STM32F429xx"],
  1965. "config": {
  1966. "clock_source": {
  1967. "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL | USE_PLL_HSI",
  1968. "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI",
  1969. "macro_name": "CLOCK_SOURCE"
  1970. },
  1971. "clock_source_usb": {
  1972. "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)",
  1973. "value": "1",
  1974. "macro_name": "CLOCK_SOURCE_USB"
  1975. }
  1976. },
  1977. "overrides": {"lse_available": 0},
  1978. "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
  1979. "device_has_add": ["ANALOGOUT", "CAN", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
  1980. "release_versions": ["2", "5"],
  1981. "device_name": "STM32F429ZI",
  1982. "bootloader_supported": true
  1983. },
  1984. "DISCO_F469NI": {
  1985. "inherits": ["FAMILY_STM32"],
  1986. "supported_form_factors": ["ARDUINO"],
  1987. "core": "Cortex-M4F",
  1988. "extra_labels_add": ["STM32F4", "STM32F469", "STM32F469NI", "STM32F469xI", "STM32F469xx"],
  1989. "config": {
  1990. "clock_source": {
  1991. "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL | USE_PLL_HSI",
  1992. "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI",
  1993. "macro_name": "CLOCK_SOURCE"
  1994. }
  1995. },
  1996. "detect_code": ["0788"],
  1997. "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
  1998. "device_has_add": ["ANALOGOUT", "CAN", "SERIAL_FC", "TRNG", "FLASH"],
  1999. "release_versions": ["2", "5"],
  2000. "device_name": "STM32F469NI"
  2001. },
  2002. "DISCO_L053C8": {
  2003. "inherits": ["FAMILY_STM32"],
  2004. "core": "Cortex-M0+",
  2005. "extra_labels_add": ["STM32L0", "STM32L053x8", "STM32L053C8"],
  2006. "config": {
  2007. "clock_source": {
  2008. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  2009. "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
  2010. "macro_name": "CLOCK_SOURCE"
  2011. },
  2012. "lpticker_lptim": {
  2013. "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
  2014. "value": 1
  2015. },
  2016. "lpticker_delay_ticks": {
  2017. "help": "In case of lpticker_lptim=1, set lpticker_delay_ticks=3",
  2018. "value": 3,
  2019. "macro_name": "LPTICKER_DELAY_TICKS"
  2020. }
  2021. },
  2022. "overrides": {"lse_available": 0},
  2023. "device_has_add": ["ANALOGOUT", "CRC", "SERIAL_FC", "FLASH"],
  2024. "default_lib": "small",
  2025. "release_versions": ["2"],
  2026. "device_name": "STM32L053C8"
  2027. },
  2028. "DISCO_L072CZ_LRWAN1": {
  2029. "inherits": ["FAMILY_STM32"],
  2030. "core": "Cortex-M0+",
  2031. "extra_labels_add": ["STM32L0", "STM32L072CZ", "STM32L072xZ", "STM32L072xx"],
  2032. "supported_form_factors": ["ARDUINO", "MORPHO"],
  2033. "config": {
  2034. "clock_source": {
  2035. "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  2036. "value": "USE_PLL_HSI",
  2037. "macro_name": "CLOCK_SOURCE"
  2038. },
  2039. "lpticker_lptim": {
  2040. "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
  2041. "value": 1
  2042. },
  2043. "lpticker_delay_ticks": {
  2044. "help": "In case of lpticker_lptim=1, set lpticker_delay_ticks=3",
  2045. "value": 3,
  2046. "macro_name": "LPTICKER_DELAY_TICKS"
  2047. }
  2048. },
  2049. "detect_code": ["0833"],
  2050. "device_has_add": ["ANALOGOUT", "SERIAL_FC", "SERIAL_ASYNCH", "TRNG", "FLASH"],
  2051. "release_versions": ["2", "5"],
  2052. "device_name": "STM32L072CZ"
  2053. },
  2054. "MTB_MURATA_ABZ": {
  2055. "inherits": ["FAMILY_STM32"],
  2056. "core": "Cortex-M0+",
  2057. "extra_labels_add": ["STM32L0", "STM32L0x2xZ", "STM32L082CZ", "STM32L082xx"],
  2058. "detect_code": ["0456"],
  2059. "device_has_add": ["ANALOGOUT", "SERIAL_FC", "SERIAL_ASYNCH", "TRNG", "FLASH"],
  2060. "device_has_remove": ["LPTICKER"],
  2061. "release_versions": ["5"],
  2062. "device_name": "STM32L082CZ"
  2063. },
  2064. "DISCO_F746NG": {
  2065. "inherits": ["FAMILY_STM32"],
  2066. "core": "Cortex-M7F",
  2067. "extra_labels_add": ["STM32F7", "STM32F746", "STM32F746xG", "STM32F746NG", "STM_EMAC"],
  2068. "supported_form_factors": ["ARDUINO"],
  2069. "config": {
  2070. "clock_source": {
  2071. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL | USE_PLL_HSI",
  2072. "value": "USE_PLL_HSE_XTAL|USE_PLL_HSI",
  2073. "macro_name": "CLOCK_SOURCE"
  2074. },
  2075. "usb_speed": {
  2076. "help": "Select the USB speed/connector (0=FullSpeed, 1=HighSpeed)",
  2077. "value": "1"
  2078. },
  2079. "lpticker_lptim": {
  2080. "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
  2081. "value": 1
  2082. },
  2083. "lpticker_delay_ticks": {
  2084. "help": "In case of lpticker_lptim=1, set lpticker_delay_ticks=3",
  2085. "value": 3,
  2086. "macro_name": "LPTICKER_DELAY_TICKS"
  2087. }
  2088. },
  2089. "detect_code": ["0815"],
  2090. "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
  2091. "features": ["LWIP"],
  2092. "device_has_add": ["ANALOGOUT", "CAN", "EMAC", "SERIAL_ASYNCH", "TRNG", "FLASH"],
  2093. "release_versions": ["2", "5"],
  2094. "device_name": "STM32F746NG",
  2095. "overrides": {
  2096. "network-default-interface-type": "ETHERNET"
  2097. }
  2098. },
  2099. "DISCO_F769NI": {
  2100. "inherits": ["FAMILY_STM32"],
  2101. "core": "Cortex-M7FD",
  2102. "extra_labels_add": ["STM32F7", "STM32F769", "STM32F769xI", "STM32F769NI", "STM_EMAC"],
  2103. "supported_form_factors": ["ARDUINO"],
  2104. "config": {
  2105. "flash_dual_bank": {
  2106. "help": "Default board configuration is Single Bank Flash. If you enable Dual Bank with ST Link Utility, set value to 1",
  2107. "value": "0"
  2108. },
  2109. "clock_source": {
  2110. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL | USE_PLL_HSI",
  2111. "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
  2112. "macro_name": "CLOCK_SOURCE"
  2113. },
  2114. "lpticker_lptim": {
  2115. "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
  2116. "value": 1
  2117. },
  2118. "lpticker_delay_ticks": {
  2119. "help": "In case of lpticker_lptim=1, set lpticker_delay_ticks=3",
  2120. "value": 3,
  2121. "macro_name": "LPTICKER_DELAY_TICKS"
  2122. }
  2123. },
  2124. "detect_code": ["0817"],
  2125. "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
  2126. "features": ["LWIP"],
  2127. "device_has_add": ["ANALOGOUT", "CAN", "EMAC", "SERIAL_ASYNCH", "TRNG", "FLASH"],
  2128. "release_versions": ["2", "5"],
  2129. "device_name": "STM32F769NI",
  2130. "overrides": {
  2131. "network-default-interface-type": "ETHERNET"
  2132. }
  2133. },
  2134. "DISCO_L475VG_IOT01A": {
  2135. "inherits": ["FAMILY_STM32"],
  2136. "core": "Cortex-M4F",
  2137. "extra_labels_add": ["STM32L4", "STM32L475xG", "STM32L475VG"],
  2138. "config": {
  2139. "clock_source": {
  2140. "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
  2141. "value": "USE_PLL_MSI",
  2142. "macro_name": "CLOCK_SOURCE"
  2143. },
  2144. "lpticker_lptim": {
  2145. "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
  2146. "value": 1
  2147. },
  2148. "lpticker_delay_ticks": {
  2149. "help": "In case of lpticker_lptim=1, set lpticker_delay_ticks=3",
  2150. "value": 3,
  2151. "macro_name": "LPTICKER_DELAY_TICKS"
  2152. }
  2153. },
  2154. "supported_form_factors": ["ARDUINO"],
  2155. "detect_code": ["0764"],
  2156. "macros_add": ["USBHOST_OTHER", "TWO_RAM_REGIONS"],
  2157. "device_has_add": ["ANALOGOUT", "CAN", "SERIAL_FC", "TRNG", "FLASH"],
  2158. "release_versions": ["2", "5"],
  2159. "device_name": "STM32L475VG",
  2160. "bootloader_supported": true
  2161. },
  2162. "DISCO_L476VG": {
  2163. "inherits": ["FAMILY_STM32"],
  2164. "core": "Cortex-M4F",
  2165. "extra_labels_add": ["STM32L4", "STM32L476xG", "STM32L476VG"],
  2166. "config": {
  2167. "clock_source": {
  2168. "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
  2169. "value": "USE_PLL_MSI",
  2170. "macro_name": "CLOCK_SOURCE"
  2171. },
  2172. "lpticker_lptim": {
  2173. "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
  2174. "value": 1
  2175. },
  2176. "lpticker_delay_ticks": {
  2177. "help": "In case of lpticker_lptim=1, set lpticker_delay_ticks=3",
  2178. "value": 3,
  2179. "macro_name": "LPTICKER_DELAY_TICKS"
  2180. }
  2181. },
  2182. "detect_code": ["0820"],
  2183. "macros_add": ["USBHOST_OTHER", "TWO_RAM_REGIONS"],
  2184. "device_has_add": ["ANALOGOUT", "CAN", "SERIAL_FC", "TRNG", "FLASH"],
  2185. "release_versions": ["2", "5"],
  2186. "device_name": "STM32L476VG",
  2187. "bootloader_supported": true
  2188. },
  2189. "MTS_MDOT_F405RG": {
  2190. "inherits": ["FAMILY_STM32"],
  2191. "core": "Cortex-M4F",
  2192. "extra_labels_add": ["STM32F4", "STM32F405RG"],
  2193. "is_disk_virtual": true,
  2194. "macros_add": ["HSE_VALUE=26000000"],
  2195. "device_has_add": ["ANALOGOUT"],
  2196. "release_versions": ["2"],
  2197. "device_name": "STM32F405RG"
  2198. },
  2199. "MTS_MDOT_F411RE": {
  2200. "inherits": ["FAMILY_STM32"],
  2201. "core": "Cortex-M4F",
  2202. "extra_labels_add": ["STM32F4", "STM32F411RE"],
  2203. "macros_add": ["HSE_VALUE=26000000", "USE_PLL_HSE_EXTC=0", "VECT_TAB_OFFSET=0x00010000"],
  2204. "post_binary_hook": {
  2205. "function": "MTSCode.combine_bins_mts_dot",
  2206. "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO", "IAR"]
  2207. },
  2208. "device_has_add": [],
  2209. "release_versions": ["2", "5"],
  2210. "device_name": "STM32F411RE"
  2211. },
  2212. "MTS_DRAGONFLY_F411RE": {
  2213. "inherits": ["FAMILY_STM32"],
  2214. "core": "Cortex-M4F",
  2215. "extra_labels_add": ["STM32F4", "STM32F411RE"],
  2216. "config": {
  2217. "modem_is_on_board": {
  2218. "help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.",
  2219. "value": 1,
  2220. "macro_name": "MODEM_ON_BOARD"
  2221. },
  2222. "modem_data_connection_type": {
  2223. "help": "Value: Defines how an on-board modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.",
  2224. "value": 1,
  2225. "macro_name": "MODEM_ON_BOARD_UART"
  2226. }
  2227. },
  2228. "overrides": {"lse_available": 0},
  2229. "macros_add": ["HSE_VALUE=26000000", "VECT_TAB_OFFSET=0x08010000"],
  2230. "post_binary_hook": {
  2231. "function": "MTSCode.combine_bins_mts_dragonfly",
  2232. "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO", "IAR"]
  2233. },
  2234. "device_has_add": [],
  2235. "release_versions": ["2", "5"],
  2236. "device_name": "STM32F411RE"
  2237. },
  2238. "MTB_MTS_DRAGONFLY": {
  2239. "inherits": ["FAMILY_STM32"],
  2240. "core": "Cortex-M4F",
  2241. "extra_labels_add": ["STM32F4", "STM32F411RE"],
  2242. "config": {
  2243. "modem_is_on_board": {
  2244. "help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.",
  2245. "value": 1,
  2246. "macro_name": "MODEM_ON_BOARD"
  2247. },
  2248. "modem_data_connection_type": {
  2249. "help": "Value: Defines how an on-board modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.",
  2250. "value": 1,
  2251. "macro_name": "MODEM_ON_BOARD_UART"
  2252. }
  2253. },
  2254. "overrides": {
  2255. "lse_available": 0
  2256. },
  2257. "macros_add": ["HSE_VALUE=26000000", "VECT_TAB_OFFSET=0x08010000"],
  2258. "post_binary_hook": {
  2259. "function": "MTSCode.combine_bins_mtb_mts_dragonfly",
  2260. "toolchains": ["GCC_ARM", "ARM_STD", "ARM_MICRO", "IAR"]
  2261. },
  2262. "release_versions": ["2", "5"],
  2263. "device_name": "STM32F411RE",
  2264. "bootloader_supported": true
  2265. },
  2266. "XDOT_L151CC": {
  2267. "inherits": ["FAMILY_STM32"],
  2268. "core": "Cortex-M3",
  2269. "default_toolchain": "ARM",
  2270. "extra_labels_add": ["STM32L1", "STM32L151CC"],
  2271. "config": {
  2272. "hse_value": {
  2273. "value": "24000000",
  2274. "macro_name": "HSE_VALUE"
  2275. }
  2276. },
  2277. "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
  2278. "device_has_add": ["ANALOGOUT", "FLASH"],
  2279. "release_versions": ["5"],
  2280. "device_name": "STM32L151CC",
  2281. "bootloader_supported": true
  2282. },
  2283. "FF1705_L151CC": {
  2284. "supported_form_factors": ["ARDUINO"],
  2285. "inherits": ["XDOT_L151CC"],
  2286. "detect_code": ["8080"]
  2287. },
  2288. "MTB_MTS_XDOT": {
  2289. "inherits": ["FAMILY_STM32"],
  2290. "core": "Cortex-M3",
  2291. "default_toolchain": "ARM",
  2292. "extra_labels_add": ["STM32L1", "STM32L151CC"],
  2293. "config": {
  2294. "hse_value": {
  2295. "value": "24000000",
  2296. "macro_name": "HSE_VALUE"
  2297. }
  2298. },
  2299. "overrides": {
  2300. "stdio_uart_tx": "PA_2",
  2301. "stdio_uart_rx": "PA_3"
  2302. },
  2303. "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
  2304. "device_has_add": ["ANALOGOUT", "FLASH"],
  2305. "release_versions": ["5"],
  2306. "device_name": "STM32L151CC",
  2307. "bootloader_supported": true
  2308. },
  2309. "MTB_RAK811": {
  2310. "inherits": ["FAMILY_STM32"],
  2311. "core": "Cortex-M3",
  2312. "default_toolchain": "ARM",
  2313. "extra_labels_add": ["STM32L1", "STM32L151xBA", "STM32L151CBA"],
  2314. "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
  2315. "device_has_add": ["ANALOGOUT"],
  2316. "release_versions": ["5"],
  2317. "device_name": "STM32L151CBxxA",
  2318. "bootloader_supported": true
  2319. },
  2320. "MOTE_L152RC": {
  2321. "inherits": ["FAMILY_STM32"],
  2322. "core": "Cortex-M3",
  2323. "default_toolchain": "uARM",
  2324. "extra_labels_add": ["STM32L1", "STM32L152RC"],
  2325. "overrides": {"lse_available": 0},
  2326. "detect_code": ["4100"],
  2327. "device_has_add": ["ANALOGOUT"],
  2328. "default_lib": "small",
  2329. "release_versions": ["2"],
  2330. "device_name": "STM32L152RC"
  2331. },
  2332. "DISCO_F401VC": {
  2333. "inherits": ["FAMILY_STM32"],
  2334. "core": "Cortex-M4F",
  2335. "default_toolchain": "GCC_ARM",
  2336. "extra_labels_add": ["STM32F4", "STM32F401", "STM32F401xC", "STM32F401VC"],
  2337. "supported_toolchains": ["GCC_ARM"],
  2338. "device_has_add": [],
  2339. "device_name": "STM32F401VC"
  2340. },
  2341. "MODULE_UBLOX_ODIN_W2": {
  2342. "inherits": ["FAMILY_STM32"],
  2343. "core": "Cortex-M4F",
  2344. "extra_labels_add": ["STM32F4", "STM32F439", "STM32F439ZI","STM32F439xx", "STM32F439xI", "STM_EMAC"],
  2345. "macros": ["MBEDTLS_CONFIG_HW_SUPPORT", "HSE_VALUE=24000000", "HSE_STARTUP_TIMEOUT=5000", "CB_INTERFACE_SDIO","CB_CHIP_WL18XX","SUPPORT_80211D_ALWAYS","WLAN_ENABLED","CB_FEATURE_802DOT11W","CB_FEATURE_802DOT11R","MBEDTLS_ARC4_C","MBEDTLS_DES_C","MBEDTLS_MD4_C","MBEDTLS_MD5_C","MBEDTLS_SHA1_C"],
  2346. "device_has_add": ["CAN", "EMAC", "TRNG", "FLASH", "WIFI"],
  2347. "device_has_remove": [],
  2348. "features": ["LWIP"],
  2349. "device_name": "STM32F439ZI",
  2350. "public": false,
  2351. "bootloader_supported": true,
  2352. "overrides": {
  2353. "network-default-interface-type": "WIFI"
  2354. }
  2355. },
  2356. "UBLOX_EVK_ODIN_W2": {
  2357. "inherits": ["MODULE_UBLOX_ODIN_W2"],
  2358. "supported_form_factors": ["ARDUINO"],
  2359. "release_versions": ["5"],
  2360. "device_has_remove": [],
  2361. "config": {
  2362. "stdio_uart_tx_help": {
  2363. "help": "Value: D8(default) or D1"
  2364. },
  2365. "stdio_uart_rx_help": {
  2366. "help": "Value: D2(default) or D0"
  2367. }
  2368. },
  2369. "overrides": {
  2370. "stdio_uart_tx": "D8",
  2371. "stdio_uart_rx": "D2"
  2372. }
  2373. },
  2374. "MBED_CONNECT_ODIN": {
  2375. "inherits": ["MODULE_UBLOX_ODIN_W2"],
  2376. "release_versions": ["5"],
  2377. "config": {
  2378. "stdio_uart_tx_help": {
  2379. "help": "Value: PA_9(default) or PD_8"
  2380. },
  2381. "stdio_uart_rx_help": {
  2382. "help": "Value: PA_10(default) or PD_9"
  2383. }
  2384. },
  2385. "overrides": {
  2386. "stdio_uart_tx": "PA_9",
  2387. "stdio_uart_rx": "PA_10"
  2388. }
  2389. },
  2390. "MTB_UBLOX_ODIN_W2": {
  2391. "inherits": ["MODULE_UBLOX_ODIN_W2"],
  2392. "device_has_add": [],
  2393. "release_versions": ["5"]
  2394. },
  2395. "UBLOX_C030": {
  2396. "inherits": ["FAMILY_STM32"],
  2397. "supported_form_factors": ["ARDUINO"],
  2398. "core": "Cortex-M4F",
  2399. "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
  2400. "extra_labels_add": ["STM32F4", "STM32F437", "STM32F437VG", "STM32F437xx", "STM32F437xG", "STM_EMAC"],
  2401. "config": {
  2402. "modem_is_on_board": {
  2403. "help": "Value: Tells the build system that the modem is on-board as oppose to a plug-in shield/module.",
  2404. "value": 1,
  2405. "macro_name": "MODEM_ON_BOARD"
  2406. },
  2407. "modem_data_connection_type": {
  2408. "help": "Value: Defines how the modem is wired up to the MCU, e.g., data connection can be a UART or USB and so forth.",
  2409. "value": 1,
  2410. "macro_name": "MODEM_ON_BOARD_UART"
  2411. }
  2412. },
  2413. "macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT", "HSE_VALUE=12000000", "GNSSBAUD=9600"],
  2414. "overrides": {"lse_available": 0},
  2415. "device_has_add": ["ANALOGOUT", "EMAC", "SERIAL_FC", "TRNG", "FLASH"],
  2416. "features": ["LWIP"],
  2417. "public": false,
  2418. "device_name": "STM32F437VG",
  2419. "bootloader_supported": true,
  2420. "overrides": {
  2421. "network-default-interface-type": "ETHERNET"
  2422. }
  2423. },
  2424. "UBLOX_C030_U201": {
  2425. "inherits": ["UBLOX_C030"],
  2426. "release_versions": ["5"]
  2427. },
  2428. "UBLOX_C030_N211": {
  2429. "inherits": ["UBLOX_C030"],
  2430. "release_versions": ["5"]
  2431. },
  2432. "UBLOX_C030_R410M": {
  2433. "inherits": ["UBLOX_C030"],
  2434. "release_versions": ["5"]
  2435. },
  2436. "NZ32_SC151": {
  2437. "inherits": ["FAMILY_STM32"],
  2438. "core": "Cortex-M3",
  2439. "default_toolchain": "uARM",
  2440. "program_cycle_s": 1.5,
  2441. "extra_labels_add": ["STM32L1", "STM32L151RC"],
  2442. "overrides": {"lse_available": 0},
  2443. "supported_toolchains": ["ARM", "uARM", "GCC_ARM"],
  2444. "device_has_add": ["ANALOGOUT"],
  2445. "default_lib": "small",
  2446. "device_name": "STM32L151RC"
  2447. },
  2448. "MCU_NRF51": {
  2449. "inherits": ["Target"],
  2450. "core": "Cortex-M0",
  2451. "OVERRIDE_BOOTLOADER_FILENAME": "nrf51822_bootloader.hex",
  2452. "macros": ["NRF51", "TARGET_NRF51822", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
  2453. "MERGE_BOOTLOADER": false,
  2454. "extra_labels": ["NORDIC", "MCU_NRF51", "MCU_NRF51822"],
  2455. "OUTPUT_EXT": "hex",
  2456. "is_disk_virtual": true,
  2457. "supported_toolchains": ["ARM", "GCC_ARM"],
  2458. "public": false,
  2459. "MERGE_SOFT_DEVICE": true,
  2460. "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
  2461. {
  2462. "boot": "s130_nrf51_1.0.0_bootloader.hex",
  2463. "name": "s130_nrf51_1.0.0_softdevice.hex",
  2464. "offset": 114688
  2465. },
  2466. {
  2467. "boot": "s110_nrf51822_8.0.0_bootloader.hex",
  2468. "name": "s110_nrf51822_8.0.0_softdevice.hex",
  2469. "offset": 98304
  2470. },
  2471. {
  2472. "boot": "s110_nrf51822_7.1.0_bootloader.hex",
  2473. "name": "s110_nrf51822_7.1.0_softdevice.hex",
  2474. "offset": 90112
  2475. },
  2476. {
  2477. "boot": "s110_nrf51822_7.0.0_bootloader.hex",
  2478. "name": "s110_nrf51822_7.0.0_softdevice.hex",
  2479. "offset": 90112
  2480. },
  2481. {
  2482. "boot": "s110_nrf51822_6.0.0_bootloader.hex",
  2483. "name": "s110_nrf51822_6.0.0_softdevice.hex",
  2484. "offset": 81920
  2485. }
  2486. ],
  2487. "detect_code": ["1070"],
  2488. "post_binary_hook": {
  2489. "function": "MCU_NRF51Code.binary_hook",
  2490. "toolchains": ["ARM_STD", "GCC_ARM"]
  2491. },
  2492. "program_cycle_s": 6,
  2493. "features": ["BLE"],
  2494. "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
  2495. },
  2496. "MCU_NRF51_16K_BASE": {
  2497. "inherits": ["MCU_NRF51"],
  2498. "extra_labels_add": ["MCU_NORDIC_16K", "MCU_NRF51_16K"],
  2499. "macros_add": ["TARGET_MCU_NORDIC_16K", "TARGET_MCU_NRF51_16K"],
  2500. "public": false,
  2501. "default_lib": "small"
  2502. },
  2503. "MCU_NRF51_16K_BOOT_BASE": {
  2504. "inherits": ["MCU_NRF51_16K_BASE"],
  2505. "MERGE_BOOTLOADER": true,
  2506. "extra_labels_add": ["MCU_NRF51_16K_BOOT"],
  2507. "macros_add": ["TARGET_MCU_NRF51_16K_BOOT", "TARGET_OTA_ENABLED"],
  2508. "public": false
  2509. },
  2510. "MCU_NRF51_16K_OTA_BASE": {
  2511. "inherits": ["MCU_NRF51_16K_BASE"],
  2512. "public": false,
  2513. "extra_labels_add": ["MCU_NRF51_16K_OTA"],
  2514. "macros_add": ["TARGET_MCU_NRF51_16K_OTA", "TARGET_OTA_ENABLED"],
  2515. "MERGE_SOFT_DEVICE": false
  2516. },
  2517. "MCU_NRF51_16K": {
  2518. "inherits": ["MCU_NRF51_16K_BASE"],
  2519. "extra_labels_add": ["MCU_NRF51_16K_S130"],
  2520. "macros_add": ["TARGET_MCU_NRF51_16K_S130"],
  2521. "public": false
  2522. },
  2523. "MCU_NRF51_S110": {
  2524. "extra_labels_add": ["MCU_NRF51_16K_S110"],
  2525. "macros_add": ["TARGET_MCU_NRF51_16K_S110"],
  2526. "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
  2527. {
  2528. "name": "s110_nrf51822_8.0.0_softdevice.hex",
  2529. "boot": "s110_nrf51822_8.0.0_bootloader.hex",
  2530. "offset": 98304
  2531. },
  2532. {
  2533. "name": "s110_nrf51822_7.1.0_softdevice.hex",
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  2904. "macros": ["CMSDK_CM0plus"],
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  2908. "ARM_MPS2_M3": {
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  2921. "extra_labels": ["ARM_SSG", "MPS2", "MPS2_M4"],
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  2944. "extra_labels": ["ARM_SSG", "IOTSS", "IOTSS_BEID"],
  2945. "macros": ["CMSDK_BEID"],
  2946. "device_has": ["AACI", "ANALOGIN", "CLCD", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC"],
  2947. "release_versions": ["2"]
  2948. },
  2949. "ARM_CM3DS_MPS2": {
  2950. "inherits": ["ARM_IOTSS_Target"],
  2951. "core": "Cortex-M3",
  2952. "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
  2953. "extra_labels": ["ARM_SSG", "CM3DS_MPS2"],
  2954. "OUTPUT_EXT": "elf",
  2955. "macros": ["CMSDK_CM3DS"],
  2956. "device_has": ["ANALOGIN", "ETHERNET", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SPI", "TRNG", "FLASH"],
  2957. "release_versions": ["2", "5"],
  2958. "copy_method": "mps2",
  2959. "reset_method": "reboot.txt"
  2960. },
  2961. "ARM_BEETLE_SOC": {
  2962. "inherits": ["ARM_IOTSS_Target"],
  2963. "core": "Cortex-M3",
  2964. "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
  2965. "default_toolchain": "ARM",
  2966. "extra_labels": ["ARM_SSG", "BEETLE"],
  2967. "macros": ["CMSDK_BEETLE", "WSF_MS_PER_TICK=20", "WSF_TOKEN_ENABLED=FALSE", "WSF_TRACE_ENABLED=TRUE", "WSF_ASSERT_ENABLED=FALSE", "WSF_PRINTF_MAX_LEN=128", "ASIC", "CONFIG_HOST_REV=0x20", "CONFIG_ALLOW_DEEP_SLEEP=FALSE", "HCI_VS_TARGET", "CONFIG_ALLOW_SETTING_WRITE=TRUE", "WSF_MAX_HANDLERS=20", "NO_LEDS"],
  2968. "device_has": ["ANALOGIN", "CLCD", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SLEEP", "SPI"],
  2969. "features": ["BLE"],
  2970. "release_versions": ["2", "5"]
  2971. },
  2972. "RZ_A1XX": {
  2973. "inherits": ["Target"],
  2974. "core": "Cortex-A9",
  2975. "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
  2976. "extra_labels": ["RENESAS", "RZ_A1XX"],
  2977. "device_has": ["SLEEP", "USTICKER", "RTC", "ANALOGIN", "CAN", "ETHERNET", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
  2978. "features": ["LWIP"],
  2979. "program_cycle_s": 2,
  2980. "overrides": {
  2981. "network-default-interface-type": "ETHERNET"
  2982. }
  2983. },
  2984. "RZ_A1H": {
  2985. "inherits": ["RZ_A1XX"],
  2986. "supported_form_factors": ["ARDUINO"],
  2987. "extra_labels_add": ["RZA1H", "MBRZA1H", "RZ_A1_EMAC"],
  2988. "device_has_add": ["EMAC", "FLASH", "LPTICKER"],
  2989. "release_versions": ["2", "5"],
  2990. "device_name": "R7S72100",
  2991. "bootloader_supported": true
  2992. },
  2993. "VK_RZ_A1H": {
  2994. "inherits": ["RZ_A1XX"],
  2995. "extra_labels_add": ["RZA1H", "VKRZA1H", "RZ_A1_EMAC"],
  2996. "device_has_add": ["EMAC"],
  2997. "release_versions": ["2", "5"]
  2998. },
  2999. "GR_LYCHEE": {
  3000. "inherits": ["RZ_A1XX"],
  3001. "supported_form_factors": ["ARDUINO"],
  3002. "extra_labels_add": ["RZA1UL", "MBRZA1LU"],
  3003. "device_has_add": ["TRNG", "FLASH", "LPTICKER"],
  3004. "device_has_remove": ["ETHERNET"],
  3005. "features_remove": ["LWIP"],
  3006. "release_versions": ["2", "5"],
  3007. "device_name": "R7S72103",
  3008. "bootloader_supported": true,
  3009. "overrides": {
  3010. "network-default-interface-type": null
  3011. }
  3012. },
  3013. "MAXWSNENV": {
  3014. "inherits": ["Target"],
  3015. "core": "Cortex-M3",
  3016. "macros": ["__SYSTEM_HFX=24000000"],
  3017. "extra_labels": ["Maxim", "MAX32610"],
  3018. "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
  3019. "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
  3020. "features": ["BLE"],
  3021. "release_versions": []
  3022. },
  3023. "MAX32600MBED": {
  3024. "inherits": ["Target"],
  3025. "core": "Cortex-M3",
  3026. "macros": ["__SYSTEM_HFX=24000000"],
  3027. "extra_labels": ["Maxim", "MAX32600"],
  3028. "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
  3029. "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES"],
  3030. "release_versions": ["2", "5"]
  3031. },
  3032. "MAX32620HSP": {
  3033. "inherits": ["Target"],
  3034. "core": "Cortex-M4F",
  3035. "extra_labels": ["Maxim", "MAX32620"],
  3036. "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
  3037. "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "STDIO_MESSAGES"],
  3038. "features": ["BLE"],
  3039. "release_versions": []
  3040. },
  3041. "MAX32620FTHR": {
  3042. "inherits": ["Target"],
  3043. "core": "Cortex-M4F",
  3044. "macros": ["__SYSTEM_HFX=96000000","TARGET=MAX32620","TARGET_REV=0x4332","OPEN_DRAIN_LEDS"],
  3045. "extra_labels": ["Maxim", "MAX32620C"],
  3046. "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
  3047. "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES", "USTICKER"],
  3048. "release_versions": ["2", "5"]
  3049. },
  3050. "MAX32625_BASE": {
  3051. "inherits": ["Target"],
  3052. "core": "Cortex-M4F",
  3053. "macros": ["TARGET=MAX32625","TARGET_REV=0x4132", "OPEN_DRAIN_LEDS"],
  3054. "extra_labels": ["Maxim", "MAX32625"],
  3055. "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
  3056. "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "STDIO_MESSAGES", "USTICKER"],
  3057. "release_versions": ["2", "5"],
  3058. "public": false
  3059. },
  3060. "MAX32625_BOOT": {
  3061. "inherits": ["MAX32625_BASE"],
  3062. "extra_labels_add": ["MAX32625_BOOT"],
  3063. "public": false
  3064. },
  3065. "MAX32625_NO_BOOT": {
  3066. "inherits": ["MAX32625_BASE"],
  3067. "extra_labels_add": ["MAX32625_NO_BOOT"],
  3068. "public": false
  3069. },
  3070. "MAX32625MBED": {
  3071. "inherits": ["MAX32625_NO_BOOT"]
  3072. },
  3073. "MAX32625PICO": {
  3074. "inherits": ["MAX32625_BOOT"],
  3075. "extra_labels_add": ["MAX32625PICO_BASE"]
  3076. },
  3077. "MAX32625PICO_NO_BOOT": {
  3078. "inherits": ["MAX32625_NO_BOOT"],
  3079. "extra_labels_add": ["MAX32625PICO_BASE"]
  3080. },
  3081. "MAX32625NEXPAQ": {
  3082. "inherits": ["MAX32625_BASE"],
  3083. "extra_labels_add": ["MAX32625NEXPAQ"]
  3084. },
  3085. "MAX32630FTHR": {
  3086. "inherits": ["Target"],
  3087. "core": "Cortex-M4F",
  3088. "macros": ["__SYSTEM_HFX=96000000", "TARGET=MAX32630", "TARGET_REV=0x4132", "BLE_HCI_UART", "OPEN_DRAIN_LEDS"],
  3089. "extra_labels": ["Maxim", "MAX32630"],
  3090. "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
  3091. "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SPI", "STDIO_MESSAGES", "USTICKER"],
  3092. "features": ["BLE"],
  3093. "release_versions": ["2", "5"]
  3094. },
  3095. "EFM32": {
  3096. "inherits": ["Target"],
  3097. "extra_labels": ["Silicon_Labs", "EFM32"],
  3098. "macros": ["MBEDTLS_CONFIG_HW_SUPPORT", "MBED_TICKLESS", "EM_MSC_RUN_FROM_FLASH"],
  3099. "public": false
  3100. },
  3101. "EFM32GG990F1024": {
  3102. "inherits": ["EFM32"],
  3103. "extra_labels_add": ["EFM32GG", "1024K", "SL_AES"],
  3104. "core": "Cortex-M3",
  3105. "macros_add": ["EFM32GG990F1024", "TRANSACTION_QUEUE_SIZE_SPI=4"],
  3106. "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
  3107. "release_versions": ["2", "5"],
  3108. "device_name": "EFM32GG990F1024",
  3109. "public": false,
  3110. "bootloader_supported": true
  3111. },
  3112. "EFM32GG_STK3700": {
  3113. "inherits": ["EFM32GG990F1024"],
  3114. "progen": {"target": "efm32gg-stk"},
  3115. "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER", "FLASH", "ITM"],
  3116. "forced_reset_timeout": 2,
  3117. "config": {
  3118. "hf_clock_src": {
  3119. "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
  3120. "value": "HFXO",
  3121. "macro_name": "CORE_CLOCK_SOURCE"
  3122. },
  3123. "hfxo_clock_freq": {
  3124. "help": "Value: External crystal frequency in hertz",
  3125. "value": "48000000",
  3126. "macro_name": "HFXO_FREQUENCY"
  3127. },
  3128. "lf_clock_src": {
  3129. "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
  3130. "value": "LFXO",
  3131. "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
  3132. },
  3133. "lfxo_clock_freq": {
  3134. "help": "Value: External crystal frequency in hertz",
  3135. "value": "32768",
  3136. "macro_name": "LFXO_FREQUENCY"
  3137. },
  3138. "hfrco_clock_freq": {
  3139. "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
  3140. "value": "21000000",
  3141. "macro_name": "HFRCO_FREQUENCY"
  3142. },
  3143. "hfrco_band_select": {
  3144. "help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
  3145. "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
  3146. "macro_name": "HFRCO_FREQUENCY_ENUM"
  3147. },
  3148. "board_controller_enable": {
  3149. "help": "Pin to pull high for enabling the USB serial port",
  3150. "value": "PF7",
  3151. "macro_name": "EFM_BC_EN"
  3152. }
  3153. }
  3154. },
  3155. "EFM32LG990F256": {
  3156. "inherits": ["EFM32"],
  3157. "extra_labels_add": ["EFM32LG", "256K", "SL_AES"],
  3158. "core": "Cortex-M3",
  3159. "macros_add": ["EFM32LG990F256", "TRANSACTION_QUEUE_SIZE_SPI=4"],
  3160. "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
  3161. "release_versions": ["2", "5"],
  3162. "device_name": "EFM32LG990F256",
  3163. "public": false,
  3164. "bootloader_supported": true
  3165. },
  3166. "EFM32LG_STK3600": {
  3167. "inherits": ["EFM32LG990F256"],
  3168. "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER", "FLASH"],
  3169. "forced_reset_timeout": 2,
  3170. "device_name": "EFM32LG990F256",
  3171. "config": {
  3172. "hf_clock_src": {
  3173. "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
  3174. "value": "HFXO",
  3175. "macro_name": "CORE_CLOCK_SOURCE"
  3176. },
  3177. "hfxo_clock_freq": {
  3178. "help": "Value: External crystal frequency in hertz",
  3179. "value": "48000000",
  3180. "macro_name": "HFXO_FREQUENCY"
  3181. },
  3182. "lf_clock_src": {
  3183. "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
  3184. "value": "LFXO",
  3185. "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
  3186. },
  3187. "lfxo_clock_freq": {
  3188. "help": "Value: External crystal frequency in hertz",
  3189. "value": "32768",
  3190. "macro_name": "LFXO_FREQUENCY"
  3191. },
  3192. "hfrco_clock_freq": {
  3193. "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
  3194. "value": "21000000",
  3195. "macro_name": "HFRCO_FREQUENCY"
  3196. },
  3197. "hfrco_band_select": {
  3198. "help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
  3199. "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
  3200. "macro_name": "HFRCO_FREQUENCY_ENUM"
  3201. },
  3202. "board_controller_enable": {
  3203. "help": "Pin to pull high for enabling the USB serial port",
  3204. "value": "PF7",
  3205. "macro_name": "EFM_BC_EN"
  3206. }
  3207. }
  3208. },
  3209. "EFM32WG990F256": {
  3210. "inherits": ["EFM32"],
  3211. "extra_labels_add": ["EFM32WG", "256K", "SL_AES"],
  3212. "core": "Cortex-M4F",
  3213. "macros_add": ["EFM32WG990F256", "TRANSACTION_QUEUE_SIZE_SPI=4"],
  3214. "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
  3215. "release_versions": ["2", "5"],
  3216. "device_name": "EFM32WG990F256",
  3217. "public": false,
  3218. "bootloader_supported": true
  3219. },
  3220. "EFM32WG_STK3800": {
  3221. "inherits": ["EFM32WG990F256"],
  3222. "progen": {"target": "efm32wg-stk"},
  3223. "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER", "FLASH"],
  3224. "forced_reset_timeout": 2,
  3225. "config": {
  3226. "hf_clock_src": {
  3227. "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
  3228. "value": "HFXO",
  3229. "macro_name": "CORE_CLOCK_SOURCE"
  3230. },
  3231. "hfxo_clock_freq": {
  3232. "help": "Value: External crystal frequency in hertz",
  3233. "value": "48000000",
  3234. "macro_name": "HFXO_FREQUENCY"
  3235. },
  3236. "lf_clock_src": {
  3237. "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
  3238. "value": "LFXO",
  3239. "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
  3240. },
  3241. "lfxo_clock_freq": {
  3242. "help": "Value: External crystal frequency in hertz",
  3243. "value": "32768",
  3244. "macro_name": "LFXO_FREQUENCY"
  3245. },
  3246. "hfrco_clock_freq": {
  3247. "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
  3248. "value": "21000000",
  3249. "macro_name": "HFRCO_FREQUENCY"
  3250. },
  3251. "hfrco_band_select": {
  3252. "help": "Value: One of _CMU_HFRCOCTRL_BAND_28MHZ, _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
  3253. "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
  3254. "macro_name": "HFRCO_FREQUENCY_ENUM"
  3255. },
  3256. "board_controller_enable": {
  3257. "help": "Pin to pull high for enabling the USB serial port",
  3258. "value": "PF7",
  3259. "macro_name": "EFM_BC_EN"
  3260. }
  3261. }
  3262. },
  3263. "EFM32ZG222F32": {
  3264. "inherits": ["EFM32"],
  3265. "extra_labels_add": ["EFM32ZG", "32K", "SL_AES"],
  3266. "core": "Cortex-M0+",
  3267. "default_toolchain": "uARM",
  3268. "macros_add": ["EFM32ZG222F32", "TRANSACTION_QUEUE_SIZE_SPI=0"],
  3269. "supported_toolchains": ["GCC_ARM", "uARM", "IAR"],
  3270. "default_lib": "small",
  3271. "release_versions": ["2"],
  3272. "device_name": "EFM32ZG222F32",
  3273. "public": false
  3274. },
  3275. "EFM32ZG_STK3200": {
  3276. "inherits": ["EFM32ZG222F32"],
  3277. "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER"],
  3278. "forced_reset_timeout": 2,
  3279. "config": {
  3280. "hf_clock_src": {
  3281. "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
  3282. "value": "HFXO",
  3283. "macro_name": "CORE_CLOCK_SOURCE"
  3284. },
  3285. "hfxo_clock_freq": {
  3286. "help": "Value: External crystal frequency in hertz",
  3287. "value": "24000000",
  3288. "macro_name": "HFXO_FREQUENCY"
  3289. },
  3290. "lf_clock_src": {
  3291. "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
  3292. "value": "LFXO",
  3293. "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
  3294. },
  3295. "lfxo_clock_freq": {
  3296. "help": "Value: External crystal frequency in hertz",
  3297. "value": "32768",
  3298. "macro_name": "LFXO_FREQUENCY"
  3299. },
  3300. "hfrco_clock_freq": {
  3301. "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
  3302. "value": "21000000",
  3303. "macro_name": "HFRCO_FREQUENCY"
  3304. },
  3305. "hfrco_band_select": {
  3306. "help": "Value: One of _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
  3307. "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
  3308. "macro_name": "HFRCO_FREQUENCY_ENUM"
  3309. },
  3310. "board_controller_enable": {
  3311. "help": "Pin to pull high for enabling the USB serial port",
  3312. "value": "PA9",
  3313. "macro_name": "EFM_BC_EN"
  3314. }
  3315. }
  3316. },
  3317. "EFM32HG322F64": {
  3318. "inherits": ["EFM32"],
  3319. "extra_labels_add": ["EFM32HG", "64K", "SL_AES"],
  3320. "core": "Cortex-M0+",
  3321. "default_toolchain": "uARM",
  3322. "macros_add": ["EFM32HG322F64", "TRANSACTION_QUEUE_SIZE_SPI=0"],
  3323. "supported_toolchains": ["GCC_ARM", "uARM", "IAR"],
  3324. "default_lib": "small",
  3325. "release_versions": ["2"],
  3326. "device_name": "EFM32HG322F64",
  3327. "public": false
  3328. },
  3329. "EFM32HG_STK3400": {
  3330. "inherits": ["EFM32HG322F64"],
  3331. "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER"],
  3332. "forced_reset_timeout": 2,
  3333. "config": {
  3334. "hf_clock_src": {
  3335. "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
  3336. "value": "HFXO",
  3337. "macro_name": "CORE_CLOCK_SOURCE"
  3338. },
  3339. "hfxo_clock_freq": {
  3340. "help": "Value: External crystal frequency in hertz",
  3341. "value": "24000000",
  3342. "macro_name": "HFXO_FREQUENCY"
  3343. },
  3344. "lf_clock_src": {
  3345. "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
  3346. "value": "LFXO",
  3347. "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
  3348. },
  3349. "lfxo_clock_freq": {
  3350. "help": "Value: External crystal frequency in hertz",
  3351. "value": "32768",
  3352. "macro_name": "LFXO_FREQUENCY"
  3353. },
  3354. "hfrco_clock_freq": {
  3355. "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
  3356. "value": "21000000",
  3357. "macro_name": "HFRCO_FREQUENCY"
  3358. },
  3359. "hfrco_band_select": {
  3360. "help": "Value: One of _CMU_HFRCOCTRL_BAND_21MHZ, _CMU_HFRCOCTRL_BAND_14MHZ, _CMU_HFRCOCTRL_BAND_11MHZ, _CMU_HFRCOCTRL_BAND_7MHZ, _CMU_HFRCOCTRL_BAND_1MHZ. Be sure to set hfrco_clock_freq accordingly!",
  3361. "value": "_CMU_HFRCOCTRL_BAND_21MHZ",
  3362. "macro_name": "HFRCO_FREQUENCY_ENUM"
  3363. },
  3364. "board_controller_enable": {
  3365. "help": "Pin to pull high for enabling the USB serial port",
  3366. "value": "PA9",
  3367. "macro_name": "EFM_BC_EN"
  3368. }
  3369. }
  3370. },
  3371. "EFM32PG1B100F256GM32": {
  3372. "inherits": ["EFM32"],
  3373. "extra_labels_add": ["EFM32PG", "256K", "SL_CRYPTO"],
  3374. "core": "Cortex-M4F",
  3375. "macros_add": ["EFM32PG1B100F256GM32", "TRANSACTION_QUEUE_SIZE_SPI=4"],
  3376. "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
  3377. "release_versions": ["2", "5"],
  3378. "device_name": "EFM32PG1B100F256GM32",
  3379. "public": false,
  3380. "bootloader_supported": true
  3381. },
  3382. "EFM32PG_STK3401": {
  3383. "inherits": ["EFM32PG1B100F256GM32"],
  3384. "device_has": ["ANALOGIN", "CRC", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER", "FLASH"],
  3385. "forced_reset_timeout": 2,
  3386. "config": {
  3387. "hf_clock_src": {
  3388. "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
  3389. "value": "HFXO",
  3390. "macro_name": "CORE_CLOCK_SOURCE"
  3391. },
  3392. "hfxo_clock_freq": {
  3393. "help": "Value: External crystal frequency in hertz",
  3394. "value": "40000000",
  3395. "macro_name": "HFXO_FREQUENCY"
  3396. },
  3397. "lf_clock_src": {
  3398. "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
  3399. "value": "LFXO",
  3400. "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
  3401. },
  3402. "lfxo_clock_freq": {
  3403. "help": "Value: External crystal frequency in hertz",
  3404. "value": "32768",
  3405. "macro_name": "LFXO_FREQUENCY"
  3406. },
  3407. "hfrco_clock_freq": {
  3408. "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
  3409. "value": "32000000",
  3410. "macro_name": "HFRCO_FREQUENCY"
  3411. },
  3412. "hfrco_band_select": {
  3413. "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!",
  3414. "value": "cmuHFRCOFreq_32M0Hz",
  3415. "macro_name": "HFRCO_FREQUENCY_ENUM"
  3416. },
  3417. "board_controller_enable": {
  3418. "help": "Pin to pull high for enabling the USB serial port",
  3419. "value": "PA5",
  3420. "macro_name": "EFM_BC_EN"
  3421. }
  3422. }
  3423. },
  3424. "EFR32MG1P132F256GM48": {
  3425. "inherits": ["EFM32"],
  3426. "extra_labels_add": ["EFR32MG1", "EFR32_1", "256K", "SL_RAIL", "SL_CRYPTO"],
  3427. "core": "Cortex-M4F",
  3428. "macros_add": ["EFR32MG1P132F256GM48", "TRANSACTION_QUEUE_SIZE_SPI=4"],
  3429. "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
  3430. "release_versions": ["2", "5"],
  3431. "device_name": "EFR32MG1P132F256GM48",
  3432. "public": false,
  3433. "bootloader_supported": true
  3434. },
  3435. "EFR32MG1P233F256GM48": {
  3436. "inherits": ["EFM32"],
  3437. "extra_labels_add": ["EFR32MG1", "EFR32_1", "256K", "SL_RAIL", "SL_CRYPTO"],
  3438. "core": "Cortex-M4F",
  3439. "macros_add": ["EFR32MG1P233F256GM48", "TRANSACTION_QUEUE_SIZE_SPI=4"],
  3440. "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
  3441. "release_versions": ["2", "5"],
  3442. "public": false,
  3443. "bootloader_supported": true
  3444. },
  3445. "EFR32MG1_BRD4150": {
  3446. "inherits": ["EFR32MG1P132F256GM48"],
  3447. "device_has": ["ANALOGIN", "CRC", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER", "FLASH"],
  3448. "forced_reset_timeout": 2,
  3449. "config": {
  3450. "hf_clock_src": {
  3451. "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
  3452. "value": "HFXO",
  3453. "macro_name": "CORE_CLOCK_SOURCE"
  3454. },
  3455. "hfxo_clock_freq": {
  3456. "help": "Value: External crystal frequency in hertz",
  3457. "value": "38400000",
  3458. "macro_name": "HFXO_FREQUENCY"
  3459. },
  3460. "lf_clock_src": {
  3461. "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
  3462. "value": "LFXO",
  3463. "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
  3464. },
  3465. "lfxo_clock_freq": {
  3466. "help": "Value: External crystal frequency in hertz",
  3467. "value": "32768",
  3468. "macro_name": "LFXO_FREQUENCY"
  3469. },
  3470. "hfrco_clock_freq": {
  3471. "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
  3472. "value": "32000000",
  3473. "macro_name": "HFRCO_FREQUENCY"
  3474. },
  3475. "hfrco_band_select": {
  3476. "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!",
  3477. "value": "cmuHFRCOFreq_32M0Hz",
  3478. "macro_name": "HFRCO_FREQUENCY_ENUM"
  3479. },
  3480. "board_controller_enable": {
  3481. "help": "Pin to pull high for enabling the USB serial port",
  3482. "value": "PA5",
  3483. "macro_name": "EFM_BC_EN"
  3484. }
  3485. },
  3486. "public": false
  3487. },
  3488. "TB_SENSE_1": {
  3489. "inherits": ["EFR32MG1P233F256GM48"],
  3490. "device_has": ["ANALOGIN", "CRC", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER", "FLASH"],
  3491. "forced_reset_timeout": 5,
  3492. "config": {
  3493. "hf_clock_src": {
  3494. "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
  3495. "value": "HFXO",
  3496. "macro_name": "CORE_CLOCK_SOURCE"
  3497. },
  3498. "hfxo_clock_freq": {
  3499. "help": "Value: External crystal frequency in hertz",
  3500. "value": "38400000",
  3501. "macro_name": "HFXO_FREQUENCY"
  3502. },
  3503. "lf_clock_src": {
  3504. "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
  3505. "value": "LFXO",
  3506. "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
  3507. },
  3508. "lfxo_clock_freq": {
  3509. "help": "Value: External crystal frequency in hertz",
  3510. "value": "32768",
  3511. "macro_name": "LFXO_FREQUENCY"
  3512. },
  3513. "hfrco_clock_freq": {
  3514. "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
  3515. "value": "32000000",
  3516. "macro_name": "HFRCO_FREQUENCY"
  3517. },
  3518. "hfrco_band_select": {
  3519. "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!",
  3520. "value": "cmuHFRCOFreq_32M0Hz",
  3521. "macro_name": "HFRCO_FREQUENCY_ENUM"
  3522. }
  3523. }
  3524. },
  3525. "EFM32PG12B500F1024GL125": {
  3526. "inherits": ["EFM32"],
  3527. "extra_labels_add": ["EFM32PG12", "1024K", "SL_CRYPTO"],
  3528. "core": "Cortex-M4F",
  3529. "macros_add": ["EFM32PG12B500F1024GL125", "TRANSACTION_QUEUE_SIZE_SPI=4"],
  3530. "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
  3531. "release_versions": ["2", "5"],
  3532. "device_name": "EFM32PG12B500F1024GL125",
  3533. "public": false,
  3534. "bootloader_supported": true
  3535. },
  3536. "EFM32PG12_STK3402": {
  3537. "inherits": ["EFM32PG12B500F1024GL125"],
  3538. "device_has": ["ANALOGIN", "CRC", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER", "TRNG", "FLASH"],
  3539. "forced_reset_timeout": 2,
  3540. "config": {
  3541. "hf_clock_src": {
  3542. "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
  3543. "value": "HFXO",
  3544. "macro_name": "CORE_CLOCK_SOURCE"
  3545. },
  3546. "hfxo_clock_freq": {
  3547. "help": "Value: External crystal frequency in hertz",
  3548. "value": "40000000",
  3549. "macro_name": "HFXO_FREQUENCY"
  3550. },
  3551. "lf_clock_src": {
  3552. "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
  3553. "value": "LFXO",
  3554. "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
  3555. },
  3556. "lfxo_clock_freq": {
  3557. "help": "Value: External crystal frequency in hertz",
  3558. "value": "32768",
  3559. "macro_name": "LFXO_FREQUENCY"
  3560. },
  3561. "hfrco_clock_freq": {
  3562. "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
  3563. "value": "32000000",
  3564. "macro_name": "HFRCO_FREQUENCY"
  3565. },
  3566. "hfrco_band_select": {
  3567. "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!",
  3568. "value": "cmuHFRCOFreq_32M0Hz",
  3569. "macro_name": "HFRCO_FREQUENCY_ENUM"
  3570. },
  3571. "board_controller_enable": {
  3572. "help": "Pin to pull high for enabling the USB serial port",
  3573. "value": "PA5",
  3574. "macro_name": "EFM_BC_EN"
  3575. }
  3576. }
  3577. },
  3578. "EFR32MG12P332F1024GL125": {
  3579. "inherits": ["EFM32"],
  3580. "extra_labels_add": ["EFR32MG12", "EFR32_12", "1024K", "SL_RAIL", "SL_CRYPTO"],
  3581. "core": "Cortex-M4F",
  3582. "macros_add": ["EFR32MG12P332F1024GL125", "TRANSACTION_QUEUE_SIZE_SPI=4"],
  3583. "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
  3584. "release_versions": ["2", "5"],
  3585. "device_name": "EFR32MG12P332F1024GL125",
  3586. "public": false,
  3587. "bootloader_supported": true
  3588. },
  3589. "TB_SENSE_12": {
  3590. "inherits": ["EFR32MG12P332F1024GL125"],
  3591. "device_name": "EFR32MG12P332F1024GL125",
  3592. "device_has": ["ANALOGIN", "CRC", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER", "TRNG", "FLASH"],
  3593. "forced_reset_timeout": 5,
  3594. "config": {
  3595. "hf_clock_src": {
  3596. "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
  3597. "value": "HFXO",
  3598. "macro_name": "CORE_CLOCK_SOURCE"
  3599. },
  3600. "hfxo_clock_freq": {
  3601. "help": "Value: External crystal frequency in hertz",
  3602. "value": "38400000",
  3603. "macro_name": "HFXO_FREQUENCY"
  3604. },
  3605. "lf_clock_src": {
  3606. "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
  3607. "value": "LFXO",
  3608. "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
  3609. },
  3610. "lfxo_clock_freq": {
  3611. "help": "Value: External crystal frequency in hertz",
  3612. "value": "32768",
  3613. "macro_name": "LFXO_FREQUENCY"
  3614. },
  3615. "hfrco_clock_freq": {
  3616. "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
  3617. "value": "32000000",
  3618. "macro_name": "HFRCO_FREQUENCY"
  3619. },
  3620. "hfrco_band_select": {
  3621. "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!",
  3622. "value": "cmuHFRCOFreq_32M0Hz",
  3623. "macro_name": "HFRCO_FREQUENCY_ENUM"
  3624. }
  3625. }
  3626. },
  3627. "EFM32GG11B820F2048GL192": {
  3628. "inherits": ["EFM32"],
  3629. "extra_labels_add": ["EFM32GG11", "2048K", "SL_CRYPTO"],
  3630. "core": "Cortex-M4F",
  3631. "macros_add": ["EFM32GG11B820F2048GL192", "TRANSACTION_QUEUE_SIZE_SPI=4"],
  3632. "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
  3633. "release_versions": ["2", "5"],
  3634. "device_name": "EFM32GG11B820F2048GL192",
  3635. "public": false,
  3636. "bootloader_supported": true
  3637. },
  3638. "EFM32GG11_STK3701": {
  3639. "inherits": ["EFM32GG11B820F2048GL192"],
  3640. "device_name": "EFM32GG11B820F2048GL192",
  3641. "device_has": ["ANALOGIN", "CRC", "EMAC", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER", "TRNG", "FLASH"],
  3642. "features": ["LWIP"],
  3643. "forced_reset_timeout": 5,
  3644. "config": {
  3645. "hf_clock_src": {
  3646. "help": "Value: HFXO for external crystal, HFRCO for internal RC oscillator",
  3647. "value": "HFXO",
  3648. "macro_name": "CORE_CLOCK_SOURCE"
  3649. },
  3650. "hfxo_clock_freq": {
  3651. "help": "Value: External crystal frequency in hertz",
  3652. "value": "50000000",
  3653. "macro_name": "HFXO_FREQUENCY"
  3654. },
  3655. "lf_clock_src": {
  3656. "help": "Value: LFXO for external crystal, LFRCO for internal RC oscillator, ULFRCO for internal 1KHz RC oscillator",
  3657. "value": "LFXO",
  3658. "macro_name": "LOW_ENERGY_CLOCK_SOURCE"
  3659. },
  3660. "lfxo_clock_freq": {
  3661. "help": "Value: External crystal frequency in hertz",
  3662. "value": "32768",
  3663. "macro_name": "LFXO_FREQUENCY"
  3664. },
  3665. "hfrco_clock_freq": {
  3666. "help": "Value: Frequency in hertz, must correspond to setting of hfrco_band_select",
  3667. "value": "32000000",
  3668. "macro_name": "HFRCO_FREQUENCY"
  3669. },
  3670. "hfrco_band_select": {
  3671. "help": "Value: One of cmuHFRCOFreq_1M0Hz, cmuHFRCOFreq_2M0Hz, cmuHFRCOFreq_4M0Hz, cmuHFRCOFreq_7M0Hz, cmuHFRCOFreq_13M0Hz, cmuHFRCOFreq_16M0Hz, cmuHFRCOFreq_19M0Hz, cmuHFRCOFreq_26M0Hz, cmuHFRCOFreq_32M0Hz, cmuHFRCOFreq_38M0Hz. Be sure to set hfrco_clock_freq accordingly!",
  3672. "value": "cmuHFRCOFreq_32M0Hz",
  3673. "macro_name": "HFRCO_FREQUENCY_ENUM"
  3674. },
  3675. "board_controller_enable": {
  3676. "help": "Pin to pull high for enabling the USB serial port",
  3677. "value": "PE1",
  3678. "macro_name": "EFM_BC_EN"
  3679. }
  3680. }
  3681. },
  3682. "WIZWIKI_W7500": {
  3683. "supported_form_factors": ["ARDUINO"],
  3684. "core": "Cortex-M0",
  3685. "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500"],
  3686. "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
  3687. "supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"],
  3688. "inherits": ["Target"],
  3689. "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
  3690. "release_versions": ["2", "5"]
  3691. },
  3692. "WIZWIKI_W7500P": {
  3693. "supported_form_factors": ["ARDUINO"],
  3694. "core": "Cortex-M0",
  3695. "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500P"],
  3696. "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
  3697. "supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"],
  3698. "inherits": ["Target"],
  3699. "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
  3700. "release_versions": ["2", "5"]
  3701. },
  3702. "WIZWIKI_W7500ECO": {
  3703. "inherits": ["Target"],
  3704. "core": "Cortex-M0",
  3705. "extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500ECO"],
  3706. "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
  3707. "supported_toolchains": ["uARM", "ARM", "GCC_ARM", "IAR"],
  3708. "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
  3709. "release_versions": ["2", "5"]
  3710. },
  3711. "SAMR21G18A": {
  3712. "inherits": ["Target"],
  3713. "core": "Cortex-M0+",
  3714. "macros": ["__SAMR21G18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
  3715. "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMR21"],
  3716. "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
  3717. "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
  3718. "release_versions": ["2"],
  3719. "device_name": "ATSAMR21G18A"
  3720. },
  3721. "SAMD21J18A": {
  3722. "inherits": ["Target"],
  3723. "core": "Cortex-M0+",
  3724. "macros": ["__SAMD21J18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
  3725. "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMD21"],
  3726. "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
  3727. "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
  3728. "release_versions": ["2"],
  3729. "device_name": "ATSAMD21J18A"
  3730. },
  3731. "SAMD21G18A": {
  3732. "inherits": ["Target"],
  3733. "core": "Cortex-M0+",
  3734. "macros": ["__SAMD21G18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
  3735. "extra_labels": ["Atmel", "SAM_CortexM0P", "SAMD21"],
  3736. "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
  3737. "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
  3738. "release_versions": ["2"],
  3739. "device_name": "ATSAMD21G18A"
  3740. },
  3741. "SAML21J18A": {
  3742. "inherits": ["Target"],
  3743. "core": "Cortex-M0+",
  3744. "macros": ["__SAML21J18A__", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
  3745. "extra_labels": ["Atmel", "SAM_CortexM0P", "SAML21"],
  3746. "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
  3747. "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
  3748. "device_name": "ATSAML21J18A"
  3749. },
  3750. "SAMG55J19": {
  3751. "inherits": ["Target"],
  3752. "core": "Cortex-M4",
  3753. "extra_labels": ["Atmel", "SAM_CortexM4", "SAMG55"],
  3754. "macros": ["__SAMG55J19__", "BOARD=75", "I2C_MASTER_CALLBACK_MODE=true", "EXTINT_CALLBACK_MODE=true", "USART_CALLBACK_MODE=true", "TC_ASYNC=true"],
  3755. "supported_toolchains": ["GCC_ARM", "ARM", "uARM"],
  3756. "default_toolchain": "ARM",
  3757. "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
  3758. "default_lib": "std",
  3759. "device_name": "ATSAMG55J19"
  3760. },
  3761. "MCU_NRF51_UNIFIED": {
  3762. "inherits": ["Target"],
  3763. "core": "Cortex-M0",
  3764. "OVERRIDE_BOOTLOADER_FILENAME": "nrf51822_bootloader.hex",
  3765. "macros": [
  3766. "NRF51",
  3767. "TARGET_NRF51822",
  3768. "BLE_STACK_SUPPORT_REQD",
  3769. "SOFTDEVICE_PRESENT",
  3770. "S130",
  3771. "TARGET_MCU_NRF51822",
  3772. "CMSIS_VECTAB_VIRTUAL",
  3773. "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"",
  3774. "NO_SYSTICK",
  3775. "MBED_TICKLESS"
  3776. ],
  3777. "MERGE_BOOTLOADER": false,
  3778. "extra_labels": [
  3779. "NORDIC",
  3780. "MCU_NRF51",
  3781. "MCU_NRF51822_UNIFIED",
  3782. "NRF5x",
  3783. "NRF51",
  3784. "SDK_11"
  3785. ],
  3786. "OUTPUT_EXT": "hex",
  3787. "is_disk_virtual": true,
  3788. "supported_toolchains": ["ARM", "GCC_ARM", "IAR"],
  3789. "public": false,
  3790. "MERGE_SOFT_DEVICE": true,
  3791. "EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
  3792. {
  3793. "boot": "",
  3794. "name": "s130_nrf51_2.0.0_softdevice.hex",
  3795. "offset": 110592
  3796. }
  3797. ],
  3798. "detect_code": ["1070"],
  3799. "post_binary_hook": {
  3800. "function": "MCU_NRF51Code.binary_hook",
  3801. "toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
  3802. },
  3803. "program_cycle_s": 6,
  3804. "features": ["BLE"],
  3805. "config": {
  3806. "lf_clock_src": {
  3807. "value": "NRF_LF_SRC_XTAL",
  3808. "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC"
  3809. },
  3810. "uart_hwfc": {
  3811. "help": "Value: 1 for enable, 0 for disable",
  3812. "value": 1,
  3813. "macro_name": "MBED_CONF_NORDIC_UART_HWFC"
  3814. }
  3815. },
  3816. "device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"]
  3817. },
  3818. "MCU_NRF51_16K_UNIFIED_S130": {
  3819. "inherits": ["MCU_NRF51_UNIFIED"],
  3820. "extra_labels_add": ["MCU_NORDIC_16K", "MCU_NRF51_16K_S130", "MCU_NRF51_16K"],
  3821. "macros_add": ["TARGET_MCU_NORDIC_16K", "TARGET_MCU_NRF51_16K_S130", "TARGET_MCU_NRF51_16K"],
  3822. "public": false
  3823. },
  3824. "MCU_NRF51_32K_UNIFIED": {
  3825. "inherits": ["MCU_NRF51_UNIFIED"],
  3826. "extra_labels_add": ["MCU_NORDIC_32K", "MCU_NRF51_32K"],
  3827. "macros_add": ["TARGET_MCU_NORDIC_32K", "TARGET_MCU_NRF51_32K"],
  3828. "public": false
  3829. },
  3830. "NRF51_DK": {
  3831. "supported_form_factors": ["ARDUINO"],
  3832. "inherits": ["MCU_NRF51_32K_UNIFIED"],
  3833. "device_has": ["USTICKER", "LPTICKER", "ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
  3834. "release_versions": ["2", "5"],
  3835. "device_name": "nRF51822_xxAA"
  3836. },
  3837. "NRF51_DONGLE": {
  3838. "inherits": ["MCU_NRF51_32K_UNIFIED"],
  3839. "progen": {"target": "nrf51-dongle"},
  3840. "device_has": ["USTICKER", "LPTICKER", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
  3841. "release_versions": ["2", "5"]
  3842. },
  3843. "OSHCHIP": {
  3844. "inherits": ["MCU_NRF51_32K_UNIFIED"],
  3845. "overrides": {"lf_clock_src": "NRF_LF_SRC_RC"},
  3846. "device_has": ["USTICKER", "LPTICKER", "ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE"],
  3847. "device_name": "nRF51822_xxAC"
  3848. },
  3849. "MCU_NRF52832": {
  3850. "inherits": ["Target"],
  3851. "core": "Cortex-M4F",
  3852. "macros": [
  3853. "BOARD_PCA10040",
  3854. "NRF52",
  3855. "TARGET_NRF52832",
  3856. "CMSIS_VECTAB_VIRTUAL",
  3857. "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"",
  3858. "MBED_TICKLESS"
  3859. ],
  3860. "device_has": [
  3861. "ANALOGIN",
  3862. "FLASH",
  3863. "I2C",
  3864. "I2C_ASYNCH",
  3865. "INTERRUPTIN",
  3866. "ITM",
  3867. "LPTICKER",
  3868. "PORTIN",
  3869. "PORTINOUT",
  3870. "PORTOUT",
  3871. "PWMOUT",
  3872. "SERIAL",
  3873. "SERIAL_ASYNCH",
  3874. "SERIAL_FC",
  3875. "SLEEP",
  3876. "SPI",
  3877. "SPI_ASYNCH",
  3878. "STCLK_OFF_DURING_SLEEP",
  3879. "TRNG",
  3880. "USTICKER"
  3881. ],
  3882. "extra_labels": [
  3883. "NORDIC",
  3884. "NRF5x",
  3885. "NRF52",
  3886. "SDK_14_2",
  3887. "SOFTDEVICE_COMMON",
  3888. "SOFTDEVICE_S132_FULL"
  3889. ],
  3890. "config": {
  3891. "lf_clock_src": {
  3892. "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC",
  3893. "help": "Select Low Frequency clock source. Options: NRF_LF_SRC_XTAL, NRF_LF_SRC_SYNTH, and NRF_LF_SRC_RC",
  3894. "value": "NRF_LF_SRC_XTAL"
  3895. },
  3896. "lf_clock_rc_calib_timer_interval": {
  3897. "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_CALIB_TIMER_INTERVAL",
  3898. "value": 16
  3899. },
  3900. "lf_clock_rc_calib_mode_config": {
  3901. "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_CALIB_MODE_CONFIG",
  3902. "value": 0
  3903. }
  3904. },
  3905. "OUTPUT_EXT": "hex",
  3906. "is_disk_virtual": true,
  3907. "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
  3908. "public": false,
  3909. "detect_code": ["1101"],
  3910. "program_cycle_s": 6,
  3911. "bootloader_supported": true
  3912. },
  3913. "NRF52_DK": {
  3914. "supported_form_factors": ["ARDUINO"],
  3915. "inherits": ["MCU_NRF52832"],
  3916. "release_versions": ["5"],
  3917. "device_name": "nRF52832_xxAA"
  3918. },
  3919. "UBLOX_EVA_NINA": {
  3920. "inherits": ["MCU_NRF52832"],
  3921. "release_versions": ["5"],
  3922. "device_name": "nRF52832_xxAA"
  3923. },
  3924. "UBLOX_EVK_NINA_B1": {
  3925. "supported_form_factors": ["ARDUINO"],
  3926. "inherits": ["MCU_NRF52832"],
  3927. "release_versions": ["5"],
  3928. "device_name": "nRF52832_xxAA"
  3929. },
  3930. "MTB_UBLOX_NINA_B1": {
  3931. "inherits": ["MCU_NRF52832"],
  3932. "release_versions": ["5"],
  3933. "device_name": "nRF52832_xxAA"
  3934. },
  3935. "MTB_LAIRD_BL652": {
  3936. "inherits": ["MCU_NRF52832"],
  3937. "release_versions": ["5"],
  3938. "device_name": "nRF52832_xxAA"
  3939. },
  3940. "DELTA_DFBM_NQ620": {
  3941. "supported_form_factors": ["ARDUINO"],
  3942. "inherits": ["MCU_NRF52832"],
  3943. "release_versions": ["5"],
  3944. "device_name": "nRF52832_xxAA"
  3945. },
  3946. "MCU_NRF52840": {
  3947. "inherits": ["Target"],
  3948. "core": "Cortex-M4F",
  3949. "macros": [
  3950. "BOARD_PCA10056",
  3951. "NRF52840_XXAA",
  3952. "TARGET_NRF52840",
  3953. "CMSIS_VECTAB_VIRTUAL",
  3954. "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"",
  3955. "MBED_TICKLESS",
  3956. "MBEDTLS_CONFIG_HW_SUPPORT"
  3957. ],
  3958. "features": ["CRYPTOCELL310"],
  3959. "device_has": [
  3960. "ANALOGIN",
  3961. "FLASH",
  3962. "I2C",
  3963. "I2C_ASYNCH",
  3964. "INTERRUPTIN",
  3965. "ITM",
  3966. "LPTICKER",
  3967. "PORTIN",
  3968. "PORTINOUT",
  3969. "PORTOUT",
  3970. "PWMOUT",
  3971. "SERIAL",
  3972. "SERIAL_ASYNCH",
  3973. "SERIAL_FC",
  3974. "SLEEP",
  3975. "SPI",
  3976. "SPI_ASYNCH",
  3977. "STCLK_OFF_DURING_SLEEP",
  3978. "TRNG",
  3979. "USTICKER"
  3980. ],
  3981. "extra_labels": [
  3982. "NORDIC",
  3983. "NRF5x",
  3984. "NRF52",
  3985. "SDK_14_2",
  3986. "SOFTDEVICE_COMMON",
  3987. "SOFTDEVICE_S140_FULL"
  3988. ],
  3989. "config": {
  3990. "lf_clock_src": {
  3991. "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC",
  3992. "help": "Select Low Frequency clock source. Options: NRF_LF_SRC_XTAL, NRF_LF_SRC_SYNTH, and NRF_LF_SRC_RC",
  3993. "value": "NRF_LF_SRC_XTAL"
  3994. },
  3995. "lf_clock_rc_calib_timer_interval": {
  3996. "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_CALIB_TIMER_INTERVAL",
  3997. "value": 16
  3998. },
  3999. "lf_clock_rc_calib_mode_config": {
  4000. "macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_CALIB_MODE_CONFIG",
  4001. "value": 0
  4002. }
  4003. },
  4004. "OUTPUT_EXT": "hex",
  4005. "is_disk_virtual": true,
  4006. "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
  4007. "public": false,
  4008. "detect_code": ["1101"],
  4009. "program_cycle_s": 6,
  4010. "bootloader_supported": true
  4011. },
  4012. "NRF52840_DK": {
  4013. "supported_form_factors": ["ARDUINO"],
  4014. "inherits": ["MCU_NRF52840"],
  4015. "release_versions": ["5"],
  4016. "device_name": "nRF52840_xxAA"
  4017. },
  4018. "BLUEPILL_F103C8": {
  4019. "inherits": ["FAMILY_STM32"],
  4020. "core": "Cortex-M3",
  4021. "default_toolchain": "GCC_ARM",
  4022. "extra_labels_add": ["STM32F1", "STM32F103C8"],
  4023. "supported_toolchains": ["GCC_ARM"],
  4024. "device_has_add": [],
  4025. "device_has_remove": ["STDIO_MESSAGES", "LPTICKER"]
  4026. },
  4027. "NUMAKER_PFM_NUC472": {
  4028. "core": "Cortex-M4F",
  4029. "default_toolchain": "ARM",
  4030. "extra_labels": ["NUVOTON", "NUC472", "NU_XRAM_SUPPORTED", "FLASH_CMSIS_ALGO", "NUVOTON_EMAC"],
  4031. "is_disk_virtual": true,
  4032. "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
  4033. "config": {
  4034. "gpio-irq-debounce-enable": {
  4035. "help": "Enable GPIO IRQ debounce",
  4036. "value": 0
  4037. },
  4038. "gpio-irq-debounce-enable-list": {
  4039. "help": "Comma separated pin list to enable GPIO IRQ debounce",
  4040. "value": "NC"
  4041. },
  4042. "gpio-irq-debounce-clock-source": {
  4043. "help": "Select GPIO IRQ debounce clock source: GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_IRC10K",
  4044. "value": "GPIO_DBCTL_DBCLKSRC_IRC10K"
  4045. },
  4046. "gpio-irq-debounce-sample-rate": {
  4047. "help": "Select GPIO IRQ debounce sample rate: GPIO_DBCTL_DBCLKSEL_1, GPIO_DBCTL_DBCLKSEL_2, GPIO_DBCTL_DBCLKSEL_4, ..., or GPIO_DBCTL_DBCLKSEL_32768",
  4048. "value": "GPIO_DBCTL_DBCLKSEL_16"
  4049. }
  4050. },
  4051. "inherits": ["Target"],
  4052. "features": ["LWIP"],
  4053. "macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT", "LPTICKER_DELAY_TICKS=3"],
  4054. "device_has": ["USTICKER", "LPTICKER", "RTC", "ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG", "CAN", "FLASH", "EMAC"],
  4055. "release_versions": ["5"],
  4056. "device_name": "NUC472HI8AE",
  4057. "bootloader_supported": true,
  4058. "overrides": {
  4059. "network-default-interface-type": "ETHERNET"
  4060. }
  4061. },
  4062. "NCS36510": {
  4063. "inherits": ["Target"],
  4064. "core": "Cortex-M3",
  4065. "extra_labels": ["ONSEMI"],
  4066. "config": {
  4067. "mac-addr-low": {
  4068. "help": "Lower 32 bits of the MAC extended address. All FFs indicates that factory programmed MAC address shall be used. In order to override the factory programmed MAC address this value needs to be changed from 0xFFFFFFFF to any chosen value.",
  4069. "value": "0xFFFFFFFF"
  4070. },
  4071. "mac-addr-high": {
  4072. "help": "Higher 32 bits of the MAC extended address. All FFs indicates that factory programmed MAC address shall be used. In order to override the factory programmed MAC address this value needs to be changed from 0xFFFFFFFF to any chosen value.",
  4073. "value": "0xFFFFFFFF"
  4074. },
  4075. "32KHz-clk-trim": {
  4076. "help": "32KHz clock trim",
  4077. "value": "0x39"
  4078. },
  4079. "32MHz-clk-trim": {
  4080. "help": "32MHz clock trim",
  4081. "value": "0x17"
  4082. },
  4083. "rssi-trim": {
  4084. "help": "RSSI trim",
  4085. "value": "0x3D"
  4086. },
  4087. "txtune-trim": {
  4088. "help": "TX tune trim",
  4089. "value": "0xFFFFFFFF"
  4090. }
  4091. },
  4092. "OUTPUT_EXT": "hex",
  4093. "post_binary_hook": {"function": "NCS36510TargetCode.ncs36510_addfib"},
  4094. "macros": ["CM3", "CPU_NCS36510", "TARGET_NCS36510", "LOAD_ADDRESS=0x3000"],
  4095. "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
  4096. "device_has": ["ANALOGIN", "SERIAL", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "TRNG", "SPISLAVE"],
  4097. "release_versions": ["2", "5"]
  4098. },
  4099. "NUMAKER_PFM_M453": {
  4100. "core": "Cortex-M4F",
  4101. "default_toolchain": "ARM",
  4102. "extra_labels": ["NUVOTON", "M451", "NUMAKER_PFM_M453", "FLASH_CMSIS_ALGO"],
  4103. "is_disk_virtual": true,
  4104. "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
  4105. "config": {
  4106. "gpio-irq-debounce-enable": {
  4107. "help": "Enable GPIO IRQ debounce",
  4108. "value": 0
  4109. },
  4110. "gpio-irq-debounce-enable-list": {
  4111. "help": "Comma separated pin list to enable GPIO IRQ debounce",
  4112. "value": "NC"
  4113. },
  4114. "gpio-irq-debounce-clock-source": {
  4115. "help": "Select GPIO IRQ debounce clock source: GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_LIRC",
  4116. "value": "GPIO_DBCTL_DBCLKSRC_LIRC"
  4117. },
  4118. "gpio-irq-debounce-sample-rate": {
  4119. "help": "Select GPIO IRQ debounce sample rate: GPIO_DBCTL_DBCLKSEL_1, GPIO_DBCTL_DBCLKSEL_2, GPIO_DBCTL_DBCLKSEL_4, ..., or GPIO_DBCTL_DBCLKSEL_32768",
  4120. "value": "GPIO_DBCTL_DBCLKSEL_16"
  4121. }
  4122. },
  4123. "inherits": ["Target"],
  4124. "macros_add": ["LPTICKER_DELAY_TICKS=3"],
  4125. "progen": {"target": "numaker-pfm-m453"},
  4126. "device_has": ["USTICKER", "LPTICKER", "RTC", "ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "CAN", "FLASH"],
  4127. "release_versions": ["2", "5"],
  4128. "device_name": "M453VG6AE",
  4129. "bootloader_supported": true
  4130. },
  4131. "NUMAKER_PFM_NANO130": {
  4132. "core": "Cortex-M0",
  4133. "default_toolchain": "ARM",
  4134. "extra_labels": ["NUVOTON", "NANO100", "NANO130KE3BN"],
  4135. "is_disk_virtual": true,
  4136. "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
  4137. "config": {
  4138. "gpio-irq-debounce-enable": {
  4139. "help": "Enable GPIO IRQ debounce",
  4140. "value": 0
  4141. },
  4142. "gpio-irq-debounce-enable-list": {
  4143. "help": "Comma separated pin list to enable GPIO IRQ debounce",
  4144. "value": "NC"
  4145. },
  4146. "gpio-irq-debounce-clock-source": {
  4147. "help": "Select GPIO IRQ debounce clock source: GPIO_DBCLKSRC_HCLK or GPIO_DBCLKSRC_IRC10K",
  4148. "value": "GPIO_DBCLKSRC_IRC10K"
  4149. },
  4150. "gpio-irq-debounce-sample-rate": {
  4151. "help": "Select GPIO IRQ debounce sample rate: GPIO_DBCLKSEL_1, GPIO_DBCLKSEL_2, GPIO_DBCLKSEL_4, ..., or GPIO_DBCLKSEL_32768",
  4152. "value": "GPIO_DBCLKSEL_16"
  4153. },
  4154. "clock-pll": {
  4155. "help": "Choose clock source to clock PLL: NU_HXT_PLL or NU_HIRC_PLL",
  4156. "macro_name": "NU_CLOCK_PLL",
  4157. "value": "NU_HIRC_PLL"
  4158. }
  4159. },
  4160. "inherits": ["Target"],
  4161. "macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\"","MBED_FAULT_HANDLER_DISABLED", "LPTICKER_DELAY_TICKS=3"],
  4162. "device_has": ["USTICKER", "LPTICKER", "RTC", "ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
  4163. "release_versions": ["5"],
  4164. "device_name": "NANO130KE3BN"
  4165. },
  4166. "HI2110": {
  4167. "inherits": ["Target"],
  4168. "core": "Cortex-M0",
  4169. "default_toolchain": "GCC_ARM",
  4170. "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
  4171. "extra_labels": ["ublox"],
  4172. "macros": ["TARGET_PROCESSOR_FAMILY_BOUDICA", "BOUDICA_SARA", "NDEBUG=1", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
  4173. "public": false,
  4174. "target_overrides": {
  4175. "*": {
  4176. "core.stdio-flush-at-exit": false
  4177. }
  4178. },
  4179. "device_has": ["INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SLEEP", "STDIO_MESSAGES"],
  4180. "default_lib": "std",
  4181. "release_versions": []
  4182. },
  4183. "SARA_NBIOT": {
  4184. "inherits": ["HI2110"],
  4185. "extra_labels": ["ublox", "HI2110"],
  4186. "public": false
  4187. },
  4188. "SARA_NBIOT_EVK": {
  4189. "inherits": ["SARA_NBIOT"],
  4190. "extra_labels": ["ublox", "HI2110", "SARA_NBIOT"]
  4191. },
  4192. "REALTEK_RTL8195AM": {
  4193. "supported_form_factors": ["ARDUINO"],
  4194. "core": "Cortex-M3",
  4195. "default_toolchain": "GCC_ARM",
  4196. "inherits": ["Target"],
  4197. "detect_code": ["4600"],
  4198. "extra_labels": ["Realtek", "AMEBA", "RTL8195A", "RTW_EMAC"],
  4199. "macros": ["__RTL8195A__","CONFIG_PLATFORM_8195A","CONFIG_MBED_ENABLED","PLATFORM_CMSIS_RTOS","MBED_FAULT_HANDLER_DISABLED"],
  4200. "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
  4201. "features": ["LWIP"],
  4202. "device_has": ["ANALOGIN", "ANALOGOUT", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SPI", "TRNG", "FLASH"],
  4203. "post_binary_hook": {
  4204. "function": "RTL8195ACode.binary_hook",
  4205. "toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
  4206. },
  4207. "release_versions": ["5"],
  4208. "overrides": {
  4209. "network-default-interface-type": "WIFI"
  4210. }
  4211. },
  4212. "VBLUNO51_LEGACY": {
  4213. "supported_form_factors": ["ARDUINO"],
  4214. "inherits": ["MCU_NRF51_32K"],
  4215. "detect_code": ["C006"],
  4216. "overrides": {"uart_hwfc": 0},
  4217. "extra_labels_add": ["VBLUNO51"]
  4218. },
  4219. "VBLUNO51_BOOT": {
  4220. "supported_form_factors": ["ARDUINO"],
  4221. "inherits": ["MCU_NRF51_32K_BOOT"],
  4222. "detect_code": ["C006"],
  4223. "overrides": {"uart_hwfc": 0},
  4224. "extra_labels_add": ["VBLUNO51"],
  4225. "macros_add": ["TARGET_VBLUNO51"]
  4226. },
  4227. "VBLUNO51_OTA": {
  4228. "supported_form_factors": ["ARDUINO"],
  4229. "inherits": ["MCU_NRF51_32K_OTA"],
  4230. "detect_code": ["C006"],
  4231. "overrides": {"uart_hwfc": 0},
  4232. "extra_labels_add": ["VBLUNO51"],
  4233. "macros_add": ["TARGET_VBLUNO51"]
  4234. },
  4235. "VBLUNO51": {
  4236. "supported_form_factors": ["ARDUINO"],
  4237. "inherits": ["MCU_NRF51_32K_UNIFIED"],
  4238. "detect_code": ["C006"],
  4239. "overrides": {"uart_hwfc": 0},
  4240. "device_has": ["USTICKER", "LPTICKER", "ANALOGIN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
  4241. "release_versions": ["2"],
  4242. "device_name": "nRF51822_xxAC"
  4243. },
  4244. "DISCO_L496AG": {
  4245. "inherits": ["FAMILY_STM32"],
  4246. "supported_form_factors": ["ARDUINO"],
  4247. "core": "Cortex-M4F",
  4248. "extra_labels_add": ["STM32L4", "STM32L496AG", "STM32L496xG"],
  4249. "config": {
  4250. "clock_source": {
  4251. "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
  4252. "value": "USE_PLL_MSI",
  4253. "macro_name": "CLOCK_SOURCE"
  4254. },
  4255. "lpticker_lptim": {
  4256. "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
  4257. "value": 1
  4258. },
  4259. "lpticker_delay_ticks": {
  4260. "help": "In case of lpticker_lptim=1, set lpticker_delay_ticks=3",
  4261. "value": 3,
  4262. "macro_name": "LPTICKER_DELAY_TICKS"
  4263. }
  4264. },
  4265. "detect_code": ["0822"],
  4266. "device_has_add": ["ANALOGOUT", "CAN", "CRC", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
  4267. "release_versions": ["2", "5"],
  4268. "device_name": "STM32L496AG"
  4269. },
  4270. "NUCLEO_L496ZG": {
  4271. "inherits": ["FAMILY_STM32"],
  4272. "supported_form_factors": ["ARDUINO", "MORPHO"],
  4273. "core": "Cortex-M4F",
  4274. "extra_labels_add": ["STM32L4", "STM32L496ZG", "STM32L496xG"],
  4275. "config": {
  4276. "clock_source": {
  4277. "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
  4278. "value": "USE_PLL_MSI",
  4279. "macro_name": "CLOCK_SOURCE"
  4280. },
  4281. "lpticker_lptim": {
  4282. "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
  4283. "value": 1
  4284. },
  4285. "lpticker_delay_ticks": {
  4286. "help": "In case of lpticker_lptim=1, set lpticker_delay_ticks=3",
  4287. "value": 3,
  4288. "macro_name": "LPTICKER_DELAY_TICKS"
  4289. }
  4290. },
  4291. "detect_code": ["0823"],
  4292. "device_has_add": ["ANALOGOUT", "CAN", "CRC", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
  4293. "release_versions": ["2", "5"],
  4294. "device_name": "STM32L496ZG"
  4295. },
  4296. "NUCLEO_L496ZG_P": {
  4297. "inherits": ["NUCLEO_L496ZG"],
  4298. "detect_code": ["0828"]
  4299. },
  4300. "VBLUNO52": {
  4301. "supported_form_factors": ["ARDUINO"],
  4302. "inherits": ["MCU_NRF52832"],
  4303. "release_versions": ["5"],
  4304. "device_name": "nRF52832_xxAA"
  4305. },
  4306. "NUMAKER_PFM_M487": {
  4307. "core": "Cortex-M4F",
  4308. "default_toolchain": "ARM",
  4309. "extra_labels": ["NUVOTON", "M480", "FLASH_CMSIS_ALGO","NUVOTON_EMAC"],
  4310. "is_disk_virtual": true,
  4311. "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
  4312. "config": {
  4313. "gpio-irq-debounce-enable": {
  4314. "help": "Enable GPIO IRQ debounce",
  4315. "value": 0
  4316. },
  4317. "gpio-irq-debounce-enable-list": {
  4318. "help": "Comma separated pin list to enable GPIO IRQ debounce",
  4319. "value": "NC"
  4320. },
  4321. "gpio-irq-debounce-clock-source": {
  4322. "help": "Select GPIO IRQ debounce clock source: GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_LIRC",
  4323. "value": "GPIO_DBCTL_DBCLKSRC_LIRC"
  4324. },
  4325. "gpio-irq-debounce-sample-rate": {
  4326. "help": "Select GPIO IRQ debounce sample rate: GPIO_DBCTL_DBCLKSEL_1, GPIO_DBCTL_DBCLKSEL_2, GPIO_DBCTL_DBCLKSEL_4, ..., or GPIO_DBCTL_DBCLKSEL_32768",
  4327. "value": "GPIO_DBCTL_DBCLKSEL_16"
  4328. },
  4329. "usb-device-hsusbd": {
  4330. "help": "Select high-speed USB device or not",
  4331. "value": 1
  4332. },
  4333. "ctrl01-enable": {
  4334. "help": "Enable control_01",
  4335. "value": 0
  4336. }
  4337. },
  4338. "inherits": ["Target"],
  4339. "features": ["LWIP"],
  4340. "macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT", "LPTICKER_DELAY_TICKS=3"],
  4341. "device_has": ["USTICKER", "LPTICKER", "RTC", "ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG", "FLASH", "CAN", "EMAC"],
  4342. "release_versions": ["5"],
  4343. "device_name": "M487JIDAE",
  4344. "bootloader_supported": true,
  4345. "overrides": {
  4346. "network-default-interface-type": "ETHERNET"
  4347. }
  4348. },
  4349. "TMPM066": {
  4350. "inherits": ["Target"],
  4351. "core": "Cortex-M0",
  4352. "is_disk_virtual": true,
  4353. "extra_labels": ["TOSHIBA"],
  4354. "macros": ["__TMPM066__", "CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
  4355. "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
  4356. "device_has": ["ANALOGIN", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SLEEP", "I2C", "I2CSLAVE", "STDIO_MESSAGES", "PWMOUT"],
  4357. "device_name": "TMPM066FWUG",
  4358. "detect_code": ["7011"],
  4359. "release_versions": ["5"]
  4360. },
  4361. "SAKURAIO_EVB_01": {
  4362. "inherits": ["FAMILY_STM32"],
  4363. "supported_form_factors": [],
  4364. "core": "Cortex-M4F",
  4365. "extra_labels_add": ["STM32F4", "STM32F411xE", "STM32F411RE"],
  4366. "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES"],
  4367. "config": {
  4368. "clock_source": {
  4369. "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
  4370. "value": "USE_PLL_HSI",
  4371. "macro_name": "CLOCK_SOURCE"
  4372. }
  4373. },
  4374. "device_has_add": ["SERIAL_ASYNCH", "SERIAL_FC", "FLASH"],
  4375. "release_versions": ["2"],
  4376. "device_name": "STM32F411RE"
  4377. },
  4378. "TMPM46B": {
  4379. "inherits": ["Target"],
  4380. "core": "Cortex-M4",
  4381. "is_disk_virtual": true,
  4382. "extra_labels": ["TOSHIBA"],
  4383. "macros": ["__TMPM46B__"],
  4384. "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
  4385. "device_has": ["ANALOGIN", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_FC", "SPI", "I2C", "STDIO_MESSAGES", "TRNG", "FLASH", "SLEEP"],
  4386. "device_name": "TMPM46BF10FG",
  4387. "detect_code": ["7013"],
  4388. "release_versions": ["5"],
  4389. "bootloader_supported": true
  4390. },
  4391. "ARM_FM": {
  4392. "inherits": ["Target"],
  4393. "public": false,
  4394. "extra_labels": ["ARM_FM"]
  4395. },
  4396. "FVP_MPS2": {
  4397. "inherits": ["ARM_FM"],
  4398. "public": false,
  4399. "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
  4400. "OUTPUT_EXT": "elf",
  4401. "device_has": ["AACI", "ANALOGIN", "CLCD", "FLASH", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "SERIAL", "SERIAL_FC", "SPI", "SPISLAVE", "TSC", "USTICKER"],
  4402. "release_versions": ["5"]
  4403. },
  4404. "FVP_MPS2_M0": {
  4405. "inherits": ["FVP_MPS2"],
  4406. "core": "Cortex-M0",
  4407. "macros": ["CMSDK_CM0"]
  4408. },
  4409. "FVP_MPS2_M0P": {
  4410. "inherits": ["FVP_MPS2"],
  4411. "core": "Cortex-M0+",
  4412. "macros": ["CMSDK_CM0plus"]
  4413. },
  4414. "FVP_MPS2_M3": {
  4415. "inherits": ["FVP_MPS2"],
  4416. "core": "Cortex-M3",
  4417. "macros": ["CMSDK_CM3"]
  4418. },
  4419. "FVP_MPS2_M4": {
  4420. "inherits": ["FVP_MPS2"],
  4421. "core": "Cortex-M4",
  4422. "macros": ["CMSDK_CM4"]
  4423. },
  4424. "FVP_MPS2_M7": {
  4425. "inherits": ["FVP_MPS2"],
  4426. "core": "Cortex-M7",
  4427. "macros": ["CMSDK_CM7"]
  4428. },
  4429. "NUMAKER_PFM_M2351": {
  4430. "core": "Cortex-M23-NS",
  4431. "default_toolchain": "ARMC6",
  4432. "extra_labels": ["NUVOTON", "M2351", "M2351KIAAEES", "FLASH_CMSIS_ALGO"],
  4433. "OUTPUT_EXT": "hex",
  4434. "macros": ["MBED_FAULT_HANDLER_DISABLED", "MBED_TZ_DEFAULT_ACCESS=1", "LPTICKER_DELAY_TICKS=3"],
  4435. "is_disk_virtual": true,
  4436. "supported_toolchains": ["ARMC6"],
  4437. "config": {
  4438. "gpio-irq-debounce-enable": {
  4439. "help": "Enable GPIO IRQ debounce",
  4440. "value": 0
  4441. },
  4442. "gpio-irq-debounce-enable-list": {
  4443. "help": "Comma separated pin list to enable GPIO IRQ debounce",
  4444. "value": "NC"
  4445. },
  4446. "gpio-irq-debounce-clock-source": {
  4447. "help": "Select GPIO IRQ debounce clock source: GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_LIRC",
  4448. "value": "GPIO_DBCTL_DBCLKSRC_LIRC"
  4449. },
  4450. "gpio-irq-debounce-sample-rate": {
  4451. "help": "Select GPIO IRQ debounce sample rate: GPIO_DBCTL_DBCLKSEL_1, GPIO_DBCTL_DBCLKSEL_2, GPIO_DBCTL_DBCLKSEL_4, ..., or GPIO_DBCTL_DBCLKSEL_32768",
  4452. "value": "GPIO_DBCTL_DBCLKSEL_16"
  4453. }
  4454. },
  4455. "mbed_rom_start": "0x10040000",
  4456. "mbed_rom_size": "0x40000",
  4457. "mbed_ram_start": "0x30008000",
  4458. "mbed_ram_size": "0x10000",
  4459. "inherits": ["Target"],
  4460. "device_has": ["USTICKER", "LPTICKER", "RTC", "ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG", "FLASH"],
  4461. "detect_code": ["1305"],
  4462. "release_versions": ["5"],
  4463. "device_name": "M2351KIAAEES",
  4464. "bootloader_supported": true
  4465. },
  4466. "TMPM3H6": {
  4467. "inherits": ["Target"],
  4468. "core": "Cortex-M3",
  4469. "is_disk_virtual": true,
  4470. "extra_labels": ["TOSHIBA"],
  4471. "macros": ["__TMPM3H6__"],
  4472. "supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
  4473. "device_has": ["USTICKER", "ANALOGIN", "ANALOGOUT", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SLEEP", "SPI", "I2C", "I2CSLAVE", "STDIO_MESSAGES"],
  4474. "device_name": "TMPM3H6FWFG",
  4475. "detect_code": ["7012"],
  4476. "release_versions": ["5"]
  4477. }
  4478. }