Kevin Lee bceed9aa49 Implement PWM offset computation and refresh tick | 3 years ago | |
---|---|---|
.. | ||
.cargo | 3 years ago | |
.vscode | 3 years ago | |
old_examples | 3 years ago | |
src | 3 years ago | |
.gitignore | 3 years ago | |
Cargo.toml | 3 years ago | |
README.md | 3 years ago | |
build.rs | 3 years ago | |
dfu.py | 3 years ago | |
dfu.sh | 3 years ago | |
memory.x | 3 years ago | |
openocd.cfg | 3 years ago | |
openocd.gdb | 3 years ago |
cortex-m-quickstart
A template for building applications for ARM Cortex-M microcontrollers
This project is developed and maintained by the Cortex-M team.
To build embedded programs using this template you'll need:
Rust 1.31, 1.30-beta, nightly-2018-09-13 or a newer toolchain. e.g. rustup
default beta
The cargo generate
subcommand. Installation
instructions.
rust-std
components (pre-compiled core
crate) for the ARM Cortex-M
targets. Run:
$ rustup target add thumbv6m-none-eabi thumbv7m-none-eabi thumbv7em-none-eabi thumbv7em-none-eabihf
NOTE: This is the very short version that only covers building programs. For the long version, which additionally covers flashing, running and debugging programs, check the embedded Rust book.
The ARM core. e.g. Cortex-M3.
Does the ARM core include an FPU? Cortex-M4F and Cortex-M7F cores do.
How much Flash memory and RAM does the target device has? e.g. 256 KiB of Flash and 32 KiB of RAM.
Where are Flash memory and RAM mapped in the address space? e.g. RAM is
commonly located at address 0x2000_0000
.
You can find this information in the data sheet or the reference manual of your device.
In this example we'll be using the STM32F3DISCOVERY. This board contains an STM32F303VCT6 microcontroller. This microcontroller has:
A Cortex-M4F core that includes a single precision FPU
256 KiB of Flash located at address 0x0800_0000.
40 KiB of RAM located at address 0x2000_0000. (There's another RAM region but for simplicity we'll ignore it).
$ cargo generate --git https://github.com/rust-embedded/cortex-m-quickstart
Project Name: app
Creating project called `app`...
Done! New project created /tmp/app
$ cd app
.cargo/config
. For the STM32F303VCT6, which has a Cortex-M4F
core, we'll pick the thumbv7em-none-eabihf
target.$ tail -n6 .cargo/config
[build]
# Pick ONE of these compilation targets
# target = "thumbv6m-none-eabi" # Cortex-M0 and Cortex-M0+
# target = "thumbv7m-none-eabi" # Cortex-M3
# target = "thumbv7em-none-eabi" # Cortex-M4 and Cortex-M7 (no FPU)
target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU)
memory.x
file.$ cat memory.x
/* Linker script for the STM32F303VCT6 */
MEMORY
{
/* NOTE 1 K = 1 KiBi = 1024 bytes */
FLASH : ORIGIN = 0x08000000, LENGTH = 256K
RAM : ORIGIN = 0x20000000, LENGTH = 40K
}
$ cargo build
This template includes launch configurations for debugging CortexM programs with Visual Studio Code located in the .vscode/
directory.
See .vscode/README.md for more information.
If you're not using VS Code, you can safely delete the directory from the generated project.
This template is licensed under either of
Apache License, Version 2.0 (LICENSE-APACHE or http://www.apache.org/licenses/LICENSE-2.0)
MIT license (LICENSE-MIT or http://opensource.org/licenses/MIT)
at your option.
Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in the work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without any additional terms or conditions.
Contribution to this crate is organized under the terms of the Rust Code of Conduct, the maintainer of this crate, the Cortex-M team, promises to intervene to uphold that code of conduct.