stm32l4xx_hal_dfsdm.c 107 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32l4xx_hal_dfsdm.c
  4. * @author MCD Application Team
  5. * @brief This file provides firmware functions to manage the following
  6. * functionalities of the Digital Filter for Sigma-Delta Modulators
  7. * (DFSDM) peripherals:
  8. * + Initialization and configuration of channels and filters
  9. * + Regular channels configuration
  10. * + Injected channels configuration
  11. * + Regular/Injected Channels DMA Configuration
  12. * + Interrupts and flags management
  13. * + Analog watchdog feature
  14. * + Short-circuit detector feature
  15. * + Extremes detector feature
  16. * + Clock absence detector feature
  17. * + Break generation on analog watchdog or short-circuit event
  18. *
  19. @verbatim
  20. ==============================================================================
  21. ##### How to use this driver #####
  22. ==============================================================================
  23. [..]
  24. *** Channel initialization ***
  25. ==============================
  26. [..]
  27. (#) User has first to initialize channels (before filters initialization).
  28. (#) As prerequisite, fill in the HAL_DFSDM_ChannelMspInit() :
  29. (++) Enable DFSDMz clock interface with __HAL_RCC_DFSDMz_CLK_ENABLE().
  30. (++) Enable the clocks for the DFSDMz GPIOS with __HAL_RCC_GPIOx_CLK_ENABLE().
  31. (++) Configure these DFSDMz pins in alternate mode using HAL_GPIO_Init().
  32. (++) If interrupt mode is used, enable and configure DFSDMz_FLT0 global
  33. interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
  34. (#) Configure the output clock, input, serial interface, analog watchdog,
  35. offset and data right bit shift parameters for this channel using the
  36. HAL_DFSDM_ChannelInit() function.
  37. *** Channel clock absence detector ***
  38. ======================================
  39. [..]
  40. (#) Start clock absence detector using HAL_DFSDM_ChannelCkabStart() or
  41. HAL_DFSDM_ChannelCkabStart_IT().
  42. (#) In polling mode, use HAL_DFSDM_ChannelPollForCkab() to detect the clock
  43. absence.
  44. (#) In interrupt mode, HAL_DFSDM_ChannelCkabCallback() will be called if
  45. clock absence is detected.
  46. (#) Stop clock absence detector using HAL_DFSDM_ChannelCkabStop() or
  47. HAL_DFSDM_ChannelCkabStop_IT().
  48. (#) Please note that the same mode (polling or interrupt) has to be used
  49. for all channels because the channels are sharing the same interrupt.
  50. (#) Please note also that in interrupt mode, if clock absence detector is
  51. stopped for one channel, interrupt will be disabled for all channels.
  52. *** Channel short circuit detector ***
  53. ======================================
  54. [..]
  55. (#) Start short circuit detector using HAL_DFSDM_ChannelScdStart() or
  56. or HAL_DFSDM_ChannelScdStart_IT().
  57. (#) In polling mode, use HAL_DFSDM_ChannelPollForScd() to detect short
  58. circuit.
  59. (#) In interrupt mode, HAL_DFSDM_ChannelScdCallback() will be called if
  60. short circuit is detected.
  61. (#) Stop short circuit detector using HAL_DFSDM_ChannelScdStop() or
  62. or HAL_DFSDM_ChannelScdStop_IT().
  63. (#) Please note that the same mode (polling or interrupt) has to be used
  64. for all channels because the channels are sharing the same interrupt.
  65. (#) Please note also that in interrupt mode, if short circuit detector is
  66. stopped for one channel, interrupt will be disabled for all channels.
  67. *** Channel analog watchdog value ***
  68. =====================================
  69. [..]
  70. (#) Get analog watchdog filter value of a channel using
  71. HAL_DFSDM_ChannelGetAwdValue().
  72. *** Channel offset value ***
  73. =====================================
  74. [..]
  75. (#) Modify offset value of a channel using HAL_DFSDM_ChannelModifyOffset().
  76. *** Filter initialization ***
  77. =============================
  78. [..]
  79. (#) After channel initialization, user has to init filters.
  80. (#) As prerequisite, fill in the HAL_DFSDM_FilterMspInit() :
  81. (++) If interrupt mode is used , enable and configure DFSDMz_FLTx global
  82. interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
  83. Please note that DFSDMz_FLT0 global interrupt could be already
  84. enabled if interrupt is used for channel.
  85. (++) If DMA mode is used, configure DMA with HAL_DMA_Init() and link it
  86. with DFSDMz filter handle using __HAL_LINKDMA().
  87. (#) Configure the regular conversion, injected conversion and filter
  88. parameters for this filter using the HAL_DFSDM_FilterInit() function.
  89. *** Filter regular channel conversion ***
  90. =========================================
  91. [..]
  92. (#) Select regular channel and enable/disable continuous mode using
  93. HAL_DFSDM_FilterConfigRegChannel().
  94. (#) Start regular conversion using HAL_DFSDM_FilterRegularStart(),
  95. HAL_DFSDM_FilterRegularStart_IT(), HAL_DFSDM_FilterRegularStart_DMA() or
  96. HAL_DFSDM_FilterRegularMsbStart_DMA().
  97. (#) In polling mode, use HAL_DFSDM_FilterPollForRegConversion() to detect
  98. the end of regular conversion.
  99. (#) In interrupt mode, HAL_DFSDM_FilterRegConvCpltCallback() will be called
  100. at the end of regular conversion.
  101. (#) Get value of regular conversion and corresponding channel using
  102. HAL_DFSDM_FilterGetRegularValue().
  103. (#) In DMA mode, HAL_DFSDM_FilterRegConvHalfCpltCallback() and
  104. HAL_DFSDM_FilterRegConvCpltCallback() will be called respectively at the
  105. half transfer and at the transfer complete. Please note that
  106. HAL_DFSDM_FilterRegConvHalfCpltCallback() will be called only in DMA
  107. circular mode.
  108. (#) Stop regular conversion using HAL_DFSDM_FilterRegularStop(),
  109. HAL_DFSDM_FilterRegularStop_IT() or HAL_DFSDM_FilterRegularStop_DMA().
  110. *** Filter injected channels conversion ***
  111. ===========================================
  112. [..]
  113. (#) Select injected channels using HAL_DFSDM_FilterConfigInjChannel().
  114. (#) Start injected conversion using HAL_DFSDM_FilterInjectedStart(),
  115. HAL_DFSDM_FilterInjectedStart_IT(), HAL_DFSDM_FilterInjectedStart_DMA() or
  116. HAL_DFSDM_FilterInjectedMsbStart_DMA().
  117. (#) In polling mode, use HAL_DFSDM_FilterPollForInjConversion() to detect
  118. the end of injected conversion.
  119. (#) In interrupt mode, HAL_DFSDM_FilterInjConvCpltCallback() will be called
  120. at the end of injected conversion.
  121. (#) Get value of injected conversion and corresponding channel using
  122. HAL_DFSDM_FilterGetInjectedValue().
  123. (#) In DMA mode, HAL_DFSDM_FilterInjConvHalfCpltCallback() and
  124. HAL_DFSDM_FilterInjConvCpltCallback() will be called respectively at the
  125. half transfer and at the transfer complete. Please note that
  126. HAL_DFSDM_FilterInjConvCpltCallback() will be called only in DMA
  127. circular mode.
  128. (#) Stop injected conversion using HAL_DFSDM_FilterInjectedStop(),
  129. HAL_DFSDM_FilterInjectedStop_IT() or HAL_DFSDM_FilterInjectedStop_DMA().
  130. *** Filter analog watchdog ***
  131. ==============================
  132. [..]
  133. (#) Start filter analog watchdog using HAL_DFSDM_FilterAwdStart_IT().
  134. (#) HAL_DFSDM_FilterAwdCallback() will be called if analog watchdog occurs.
  135. (#) Stop filter analog watchdog using HAL_DFSDM_FilterAwdStop_IT().
  136. *** Filter extreme detector ***
  137. ===============================
  138. [..]
  139. (#) Start filter extreme detector using HAL_DFSDM_FilterExdStart().
  140. (#) Get extreme detector maximum value using HAL_DFSDM_FilterGetExdMaxValue().
  141. (#) Get extreme detector minimum value using HAL_DFSDM_FilterGetExdMinValue().
  142. (#) Start filter extreme detector using HAL_DFSDM_FilterExdStop().
  143. *** Filter conversion time ***
  144. ==============================
  145. [..]
  146. (#) Get conversion time value using HAL_DFSDM_FilterGetConvTimeValue().
  147. @endverbatim
  148. ******************************************************************************
  149. * @attention
  150. *
  151. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  152. *
  153. * Redistribution and use in source and binary forms, with or without modification,
  154. * are permitted provided that the following conditions are met:
  155. * 1. Redistributions of source code must retain the above copyright notice,
  156. * this list of conditions and the following disclaimer.
  157. * 2. Redistributions in binary form must reproduce the above copyright notice,
  158. * this list of conditions and the following disclaimer in the documentation
  159. * and/or other materials provided with the distribution.
  160. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  161. * may be used to endorse or promote products derived from this software
  162. * without specific prior written permission.
  163. *
  164. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  165. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  166. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  167. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  168. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  169. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  170. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  171. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  172. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  173. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  174. *
  175. ******************************************************************************
  176. */
  177. /* Includes ------------------------------------------------------------------*/
  178. #include "stm32l4xx_hal.h"
  179. /** @addtogroup STM32L4xx_HAL_Driver
  180. * @{
  181. */
  182. #ifdef HAL_DFSDM_MODULE_ENABLED
  183. #if defined(STM32L451xx) || defined(STM32L452xx) || defined(STM32L462xx) || \
  184. defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \
  185. defined(STM32L496xx) || defined(STM32L4A6xx) || \
  186. defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  187. /** @defgroup DFSDM DFSDM
  188. * @brief DFSDM HAL driver module
  189. * @{
  190. */
  191. /* Private typedef -----------------------------------------------------------*/
  192. /* Private define ------------------------------------------------------------*/
  193. /** @defgroup DFSDM_Private_Define DFSDM Private Define
  194. * @{
  195. */
  196. #define DFSDM_FLTCR1_MSB_RCH_OFFSET 8
  197. #define DFSDM_MSB_MASK 0xFFFF0000U
  198. #define DFSDM_LSB_MASK 0x0000FFFFU
  199. #define DFSDM_CKAB_TIMEOUT 5000U
  200. #if defined(STM32L451xx) || defined(STM32L452xx) || defined(STM32L462xx)
  201. #define DFSDM1_CHANNEL_NUMBER 4U
  202. #else /* STM32L451xx || STM32L452xx || STM32L462xx */
  203. #define DFSDM1_CHANNEL_NUMBER 8U
  204. #endif /* STM32L451xx || STM32L452xx || STM32L462xx */
  205. /**
  206. * @}
  207. */
  208. /* Private macro -------------------------------------------------------------*/
  209. /* Private variables ---------------------------------------------------------*/
  210. /** @defgroup DFSDM_Private_Variables DFSDM Private Variables
  211. * @{
  212. */
  213. __IO uint32_t v_dfsdm1ChannelCounter = 0;
  214. DFSDM_Channel_HandleTypeDef* a_dfsdm1ChannelHandle[DFSDM1_CHANNEL_NUMBER] = {NULL};
  215. /**
  216. * @}
  217. */
  218. /* Private function prototypes -----------------------------------------------*/
  219. /** @defgroup DFSDM_Private_Functions DFSDM Private Functions
  220. * @{
  221. */
  222. static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels);
  223. static uint32_t DFSDM_GetChannelFromInstance(DFSDM_Channel_TypeDef* Instance);
  224. static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
  225. static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
  226. static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
  227. static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
  228. static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma);
  229. static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma);
  230. static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma);
  231. static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma);
  232. static void DFSDM_DMAError(DMA_HandleTypeDef *hdma);
  233. /**
  234. * @}
  235. */
  236. /* Exported functions --------------------------------------------------------*/
  237. /** @defgroup DFSDM_Exported_Functions DFSDM Exported Functions
  238. * @{
  239. */
  240. /** @defgroup DFSDM_Exported_Functions_Group1_Channel Channel initialization and de-initialization functions
  241. * @brief Channel initialization and de-initialization functions
  242. *
  243. @verbatim
  244. ==============================================================================
  245. ##### Channel initialization and de-initialization functions #####
  246. ==============================================================================
  247. [..] This section provides functions allowing to:
  248. (+) Initialize the DFSDM channel.
  249. (+) De-initialize the DFSDM channel.
  250. @endverbatim
  251. * @{
  252. */
  253. /**
  254. * @brief Initialize the DFSDM channel according to the specified parameters
  255. * in the DFSDM_ChannelInitTypeDef structure and initialize the associated handle.
  256. * @param hdfsdm_channel DFSDM channel handle.
  257. * @retval HAL status.
  258. */
  259. HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  260. {
  261. /* Check DFSDM Channel handle */
  262. if(hdfsdm_channel == NULL)
  263. {
  264. return HAL_ERROR;
  265. }
  266. /* Check parameters */
  267. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  268. assert_param(IS_FUNCTIONAL_STATE(hdfsdm_channel->Init.OutputClock.Activation));
  269. assert_param(IS_DFSDM_CHANNEL_INPUT(hdfsdm_channel->Init.Input.Multiplexer));
  270. assert_param(IS_DFSDM_CHANNEL_DATA_PACKING(hdfsdm_channel->Init.Input.DataPacking));
  271. assert_param(IS_DFSDM_CHANNEL_INPUT_PINS(hdfsdm_channel->Init.Input.Pins));
  272. assert_param(IS_DFSDM_CHANNEL_SERIAL_INTERFACE_TYPE(hdfsdm_channel->Init.SerialInterface.Type));
  273. assert_param(IS_DFSDM_CHANNEL_SPI_CLOCK(hdfsdm_channel->Init.SerialInterface.SpiClock));
  274. assert_param(IS_DFSDM_CHANNEL_FILTER_ORDER(hdfsdm_channel->Init.Awd.FilterOrder));
  275. assert_param(IS_DFSDM_CHANNEL_FILTER_OVS_RATIO(hdfsdm_channel->Init.Awd.Oversampling));
  276. assert_param(IS_DFSDM_CHANNEL_OFFSET(hdfsdm_channel->Init.Offset));
  277. assert_param(IS_DFSDM_CHANNEL_RIGHT_BIT_SHIFT(hdfsdm_channel->Init.RightBitShift));
  278. /* Check that channel has not been already initialized */
  279. if(a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] != NULL)
  280. {
  281. return HAL_ERROR;
  282. }
  283. /* Call MSP init function */
  284. HAL_DFSDM_ChannelMspInit(hdfsdm_channel);
  285. /* Update the channel counter */
  286. v_dfsdm1ChannelCounter++;
  287. /* Configure output serial clock and enable global DFSDM interface only for first channel */
  288. if(v_dfsdm1ChannelCounter == 1)
  289. {
  290. assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK(hdfsdm_channel->Init.OutputClock.Selection));
  291. /* Set the output serial clock source */
  292. DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTSRC);
  293. DFSDM1_Channel0->CHCFGR1 |= hdfsdm_channel->Init.OutputClock.Selection;
  294. /* Reset clock divider */
  295. DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTDIV);
  296. if(hdfsdm_channel->Init.OutputClock.Activation == ENABLE)
  297. {
  298. assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(hdfsdm_channel->Init.OutputClock.Divider));
  299. /* Set the output clock divider */
  300. DFSDM1_Channel0->CHCFGR1 |= (uint32_t) ((hdfsdm_channel->Init.OutputClock.Divider - 1) <<
  301. DFSDM_CHCFGR1_CKOUTDIV_Pos);
  302. }
  303. /* enable the DFSDM global interface */
  304. DFSDM1_Channel0->CHCFGR1 |= DFSDM_CHCFGR1_DFSDMEN;
  305. }
  306. /* Set channel input parameters */
  307. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DATPACK | DFSDM_CHCFGR1_DATMPX |
  308. DFSDM_CHCFGR1_CHINSEL);
  309. hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.Input.Multiplexer |
  310. hdfsdm_channel->Init.Input.DataPacking |
  311. hdfsdm_channel->Init.Input.Pins);
  312. /* Set serial interface parameters */
  313. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SITP | DFSDM_CHCFGR1_SPICKSEL);
  314. hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.SerialInterface.Type |
  315. hdfsdm_channel->Init.SerialInterface.SpiClock);
  316. /* Set analog watchdog parameters */
  317. hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_AWFORD | DFSDM_CHAWSCDR_AWFOSR);
  318. hdfsdm_channel->Instance->CHAWSCDR |= (hdfsdm_channel->Init.Awd.FilterOrder |
  319. ((hdfsdm_channel->Init.Awd.Oversampling - 1) << DFSDM_CHAWSCDR_AWFOSR_Pos));
  320. /* Set channel offset and right bit shift */
  321. hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET | DFSDM_CHCFGR2_DTRBS);
  322. hdfsdm_channel->Instance->CHCFGR2 |= (((uint32_t) hdfsdm_channel->Init.Offset << DFSDM_CHCFGR2_OFFSET_Pos) |
  323. (hdfsdm_channel->Init.RightBitShift << DFSDM_CHCFGR2_DTRBS_Pos));
  324. /* Enable DFSDM channel */
  325. hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CHEN;
  326. /* Set DFSDM Channel to ready state */
  327. hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_READY;
  328. /* Store channel handle in DFSDM channel handle table */
  329. a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = hdfsdm_channel;
  330. return HAL_OK;
  331. }
  332. /**
  333. * @brief De-initialize the DFSDM channel.
  334. * @param hdfsdm_channel DFSDM channel handle.
  335. * @retval HAL status.
  336. */
  337. HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  338. {
  339. /* Check DFSDM Channel handle */
  340. if(hdfsdm_channel == NULL)
  341. {
  342. return HAL_ERROR;
  343. }
  344. /* Check parameters */
  345. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  346. /* Check that channel has not been already deinitialized */
  347. if(a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] == NULL)
  348. {
  349. return HAL_ERROR;
  350. }
  351. /* Disable the DFSDM channel */
  352. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CHEN);
  353. /* Update the channel counter */
  354. v_dfsdm1ChannelCounter--;
  355. /* Disable global DFSDM at deinit of last channel */
  356. if(v_dfsdm1ChannelCounter == 0)
  357. {
  358. DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_DFSDMEN);
  359. }
  360. /* Call MSP deinit function */
  361. HAL_DFSDM_ChannelMspDeInit(hdfsdm_channel);
  362. /* Set DFSDM Channel in reset state */
  363. hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_RESET;
  364. /* Reset channel handle in DFSDM channel handle table */
  365. a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = (DFSDM_Channel_HandleTypeDef *) NULL;
  366. return HAL_OK;
  367. }
  368. /**
  369. * @brief Initialize the DFSDM channel MSP.
  370. * @param hdfsdm_channel DFSDM channel handle.
  371. * @retval None
  372. */
  373. __weak void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  374. {
  375. /* Prevent unused argument(s) compilation warning */
  376. UNUSED(hdfsdm_channel);
  377. /* NOTE : This function should not be modified, when the function is needed,
  378. the HAL_DFSDM_ChannelMspInit could be implemented in the user file.
  379. */
  380. }
  381. /**
  382. * @brief De-initialize the DFSDM channel MSP.
  383. * @param hdfsdm_channel DFSDM channel handle.
  384. * @retval None
  385. */
  386. __weak void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  387. {
  388. /* Prevent unused argument(s) compilation warning */
  389. UNUSED(hdfsdm_channel);
  390. /* NOTE : This function should not be modified, when the function is needed,
  391. the HAL_DFSDM_ChannelMspDeInit could be implemented in the user file.
  392. */
  393. }
  394. /**
  395. * @}
  396. */
  397. /** @defgroup DFSDM_Exported_Functions_Group2_Channel Channel operation functions
  398. * @brief Channel operation functions
  399. *
  400. @verbatim
  401. ==============================================================================
  402. ##### Channel operation functions #####
  403. ==============================================================================
  404. [..] This section provides functions allowing to:
  405. (+) Manage clock absence detector feature.
  406. (+) Manage short circuit detector feature.
  407. (+) Get analog watchdog value.
  408. (+) Modify offset value.
  409. @endverbatim
  410. * @{
  411. */
  412. /**
  413. * @brief This function allows to start clock absence detection in polling mode.
  414. * @note Same mode has to be used for all channels.
  415. * @note If clock is not available on this channel during 5 seconds,
  416. * clock absence detection will not be activated and function
  417. * will return HAL_TIMEOUT error.
  418. * @param hdfsdm_channel DFSDM channel handle.
  419. * @retval HAL status
  420. */
  421. HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  422. {
  423. HAL_StatusTypeDef status = HAL_OK;
  424. uint32_t channel;
  425. uint32_t tickstart;
  426. /* Check parameters */
  427. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  428. /* Check DFSDM channel state */
  429. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  430. {
  431. /* Return error status */
  432. status = HAL_ERROR;
  433. }
  434. else
  435. {
  436. /* Get channel number from channel instance */
  437. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  438. /* Get timeout */
  439. tickstart = HAL_GetTick();
  440. /* Clear clock absence flag */
  441. while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1) != 0)
  442. {
  443. DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
  444. /* Check the Timeout */
  445. if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
  446. {
  447. /* Set timeout status */
  448. status = HAL_TIMEOUT;
  449. break;
  450. }
  451. }
  452. if(status == HAL_OK)
  453. {
  454. /* Start clock absence detection */
  455. hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN;
  456. }
  457. }
  458. /* Return function status */
  459. return status;
  460. }
  461. /**
  462. * @brief This function allows to poll for the clock absence detection.
  463. * @param hdfsdm_channel DFSDM channel handle.
  464. * @param Timeout Timeout value in milliseconds.
  465. * @retval HAL status
  466. */
  467. HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
  468. uint32_t Timeout)
  469. {
  470. uint32_t tickstart;
  471. uint32_t channel;
  472. /* Check parameters */
  473. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  474. /* Check DFSDM channel state */
  475. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  476. {
  477. /* Return error status */
  478. return HAL_ERROR;
  479. }
  480. else
  481. {
  482. /* Get channel number from channel instance */
  483. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  484. /* Get timeout */
  485. tickstart = HAL_GetTick();
  486. /* Wait clock absence detection */
  487. while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1) == 0)
  488. {
  489. /* Check the Timeout */
  490. if(Timeout != HAL_MAX_DELAY)
  491. {
  492. if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
  493. {
  494. /* Return timeout status */
  495. return HAL_TIMEOUT;
  496. }
  497. }
  498. }
  499. /* Clear clock absence detection flag */
  500. DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
  501. /* Return function status */
  502. return HAL_OK;
  503. }
  504. }
  505. /**
  506. * @brief This function allows to stop clock absence detection in polling mode.
  507. * @param hdfsdm_channel DFSDM channel handle.
  508. * @retval HAL status
  509. */
  510. HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  511. {
  512. HAL_StatusTypeDef status = HAL_OK;
  513. uint32_t channel;
  514. /* Check parameters */
  515. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  516. /* Check DFSDM channel state */
  517. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  518. {
  519. /* Return error status */
  520. status = HAL_ERROR;
  521. }
  522. else
  523. {
  524. /* Stop clock absence detection */
  525. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
  526. /* Clear clock absence flag */
  527. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  528. DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
  529. }
  530. /* Return function status */
  531. return status;
  532. }
  533. /**
  534. * @brief This function allows to start clock absence detection in interrupt mode.
  535. * @note Same mode has to be used for all channels.
  536. * @note If clock is not available on this channel during 5 seconds,
  537. * clock absence detection will not be activated and function
  538. * will return HAL_TIMEOUT error.
  539. * @param hdfsdm_channel DFSDM channel handle.
  540. * @retval HAL status
  541. */
  542. HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  543. {
  544. HAL_StatusTypeDef status = HAL_OK;
  545. uint32_t channel;
  546. uint32_t tickstart;
  547. /* Check parameters */
  548. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  549. /* Check DFSDM channel state */
  550. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  551. {
  552. /* Return error status */
  553. status = HAL_ERROR;
  554. }
  555. else
  556. {
  557. /* Get channel number from channel instance */
  558. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  559. /* Get timeout */
  560. tickstart = HAL_GetTick();
  561. /* Clear clock absence flag */
  562. while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1) != 0)
  563. {
  564. DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
  565. /* Check the Timeout */
  566. if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
  567. {
  568. /* Set timeout status */
  569. status = HAL_TIMEOUT;
  570. break;
  571. }
  572. }
  573. if(status == HAL_OK)
  574. {
  575. /* Activate clock absence detection interrupt */
  576. DFSDM1_Filter0->FLTCR2 |= DFSDM_FLTCR2_CKABIE;
  577. /* Start clock absence detection */
  578. hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN;
  579. }
  580. }
  581. /* Return function status */
  582. return status;
  583. }
  584. /**
  585. * @brief Clock absence detection callback.
  586. * @param hdfsdm_channel DFSDM channel handle.
  587. * @retval None
  588. */
  589. __weak void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  590. {
  591. /* Prevent unused argument(s) compilation warning */
  592. UNUSED(hdfsdm_channel);
  593. /* NOTE : This function should not be modified, when the callback is needed,
  594. the HAL_DFSDM_ChannelCkabCallback could be implemented in the user file
  595. */
  596. }
  597. /**
  598. * @brief This function allows to stop clock absence detection in interrupt mode.
  599. * @note Interrupt will be disabled for all channels
  600. * @param hdfsdm_channel DFSDM channel handle.
  601. * @retval HAL status
  602. */
  603. HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  604. {
  605. HAL_StatusTypeDef status = HAL_OK;
  606. uint32_t channel;
  607. /* Check parameters */
  608. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  609. /* Check DFSDM channel state */
  610. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  611. {
  612. /* Return error status */
  613. status = HAL_ERROR;
  614. }
  615. else
  616. {
  617. /* Stop clock absence detection */
  618. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
  619. /* Clear clock absence flag */
  620. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  621. DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
  622. /* Disable clock absence detection interrupt */
  623. DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_CKABIE);
  624. }
  625. /* Return function status */
  626. return status;
  627. }
  628. /**
  629. * @brief This function allows to start short circuit detection in polling mode.
  630. * @note Same mode has to be used for all channels
  631. * @param hdfsdm_channel DFSDM channel handle.
  632. * @param Threshold Short circuit detector threshold.
  633. * This parameter must be a number between Min_Data = 0 and Max_Data = 255.
  634. * @param BreakSignal Break signals assigned to short circuit event.
  635. * This parameter can be a values combination of @ref DFSDM_BreakSignals.
  636. * @retval HAL status
  637. */
  638. HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
  639. uint32_t Threshold,
  640. uint32_t BreakSignal)
  641. {
  642. HAL_StatusTypeDef status = HAL_OK;
  643. /* Check parameters */
  644. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  645. assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
  646. assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
  647. /* Check DFSDM channel state */
  648. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  649. {
  650. /* Return error status */
  651. status = HAL_ERROR;
  652. }
  653. else
  654. {
  655. /* Configure threshold and break signals */
  656. hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT);
  657. hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_Pos) | \
  658. Threshold);
  659. /* Start short circuit detection */
  660. hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN;
  661. }
  662. /* Return function status */
  663. return status;
  664. }
  665. /**
  666. * @brief This function allows to poll for the short circuit detection.
  667. * @param hdfsdm_channel DFSDM channel handle.
  668. * @param Timeout Timeout value in milliseconds.
  669. * @retval HAL status
  670. */
  671. HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
  672. uint32_t Timeout)
  673. {
  674. uint32_t tickstart;
  675. uint32_t channel;
  676. /* Check parameters */
  677. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  678. /* Check DFSDM channel state */
  679. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  680. {
  681. /* Return error status */
  682. return HAL_ERROR;
  683. }
  684. else
  685. {
  686. /* Get channel number from channel instance */
  687. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  688. /* Get timeout */
  689. tickstart = HAL_GetTick();
  690. /* Wait short circuit detection */
  691. while(((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_SCDF) >> (DFSDM_FLTISR_SCDF_Pos + channel)) == 0)
  692. {
  693. /* Check the Timeout */
  694. if(Timeout != HAL_MAX_DELAY)
  695. {
  696. if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
  697. {
  698. /* Return timeout status */
  699. return HAL_TIMEOUT;
  700. }
  701. }
  702. }
  703. /* Clear short circuit detection flag */
  704. DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRSCSDF_Pos + channel));
  705. /* Return function status */
  706. return HAL_OK;
  707. }
  708. }
  709. /**
  710. * @brief This function allows to stop short circuit detection in polling mode.
  711. * @param hdfsdm_channel DFSDM channel handle.
  712. * @retval HAL status
  713. */
  714. HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  715. {
  716. HAL_StatusTypeDef status = HAL_OK;
  717. uint32_t channel;
  718. /* Check parameters */
  719. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  720. /* Check DFSDM channel state */
  721. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  722. {
  723. /* Return error status */
  724. status = HAL_ERROR;
  725. }
  726. else
  727. {
  728. /* Stop short circuit detection */
  729. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
  730. /* Clear short circuit detection flag */
  731. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  732. DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRSCSDF_Pos + channel));
  733. }
  734. /* Return function status */
  735. return status;
  736. }
  737. /**
  738. * @brief This function allows to start short circuit detection in interrupt mode.
  739. * @note Same mode has to be used for all channels
  740. * @param hdfsdm_channel DFSDM channel handle.
  741. * @param Threshold Short circuit detector threshold.
  742. * This parameter must be a number between Min_Data = 0 and Max_Data = 255.
  743. * @param BreakSignal Break signals assigned to short circuit event.
  744. * This parameter can be a values combination of @ref DFSDM_BreakSignals.
  745. * @retval HAL status
  746. */
  747. HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
  748. uint32_t Threshold,
  749. uint32_t BreakSignal)
  750. {
  751. HAL_StatusTypeDef status = HAL_OK;
  752. /* Check parameters */
  753. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  754. assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
  755. assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
  756. /* Check DFSDM channel state */
  757. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  758. {
  759. /* Return error status */
  760. status = HAL_ERROR;
  761. }
  762. else
  763. {
  764. /* Activate short circuit detection interrupt */
  765. DFSDM1_Filter0->FLTCR2 |= DFSDM_FLTCR2_SCDIE;
  766. /* Configure threshold and break signals */
  767. hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT);
  768. hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_Pos) | \
  769. Threshold);
  770. /* Start short circuit detection */
  771. hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN;
  772. }
  773. /* Return function status */
  774. return status;
  775. }
  776. /**
  777. * @brief Short circuit detection callback.
  778. * @param hdfsdm_channel DFSDM channel handle.
  779. * @retval None
  780. */
  781. __weak void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  782. {
  783. /* Prevent unused argument(s) compilation warning */
  784. UNUSED(hdfsdm_channel);
  785. /* NOTE : This function should not be modified, when the callback is needed,
  786. the HAL_DFSDM_ChannelScdCallback could be implemented in the user file
  787. */
  788. }
  789. /**
  790. * @brief This function allows to stop short circuit detection in interrupt mode.
  791. * @note Interrupt will be disabled for all channels
  792. * @param hdfsdm_channel DFSDM channel handle.
  793. * @retval HAL status
  794. */
  795. HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  796. {
  797. HAL_StatusTypeDef status = HAL_OK;
  798. uint32_t channel;
  799. /* Check parameters */
  800. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  801. /* Check DFSDM channel state */
  802. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  803. {
  804. /* Return error status */
  805. status = HAL_ERROR;
  806. }
  807. else
  808. {
  809. /* Stop short circuit detection */
  810. hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
  811. /* Clear short circuit detection flag */
  812. channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
  813. DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRSCSDF_Pos + channel));
  814. /* Disable short circuit detection interrupt */
  815. DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_SCDIE);
  816. }
  817. /* Return function status */
  818. return status;
  819. }
  820. /**
  821. * @brief This function allows to get channel analog watchdog value.
  822. * @param hdfsdm_channel DFSDM channel handle.
  823. * @retval Channel analog watchdog value.
  824. */
  825. int16_t HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  826. {
  827. return (int16_t) hdfsdm_channel->Instance->CHWDATAR;
  828. }
  829. /**
  830. * @brief This function allows to modify channel offset value.
  831. * @param hdfsdm_channel DFSDM channel handle.
  832. * @param Offset DFSDM channel offset.
  833. * This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607.
  834. * @retval HAL status.
  835. */
  836. HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
  837. int32_t Offset)
  838. {
  839. HAL_StatusTypeDef status = HAL_OK;
  840. /* Check parameters */
  841. assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
  842. assert_param(IS_DFSDM_CHANNEL_OFFSET(Offset));
  843. /* Check DFSDM channel state */
  844. if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
  845. {
  846. /* Return error status */
  847. status = HAL_ERROR;
  848. }
  849. else
  850. {
  851. /* Modify channel offset */
  852. hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET);
  853. hdfsdm_channel->Instance->CHCFGR2 |= ((uint32_t) Offset << DFSDM_CHCFGR2_OFFSET_Pos);
  854. }
  855. /* Return function status */
  856. return status;
  857. }
  858. /**
  859. * @}
  860. */
  861. /** @defgroup DFSDM_Exported_Functions_Group3_Channel Channel state function
  862. * @brief Channel state function
  863. *
  864. @verbatim
  865. ==============================================================================
  866. ##### Channel state function #####
  867. ==============================================================================
  868. [..] This section provides function allowing to:
  869. (+) Get channel handle state.
  870. @endverbatim
  871. * @{
  872. */
  873. /**
  874. * @brief This function allows to get the current DFSDM channel handle state.
  875. * @param hdfsdm_channel DFSDM channel handle.
  876. * @retval DFSDM channel state.
  877. */
  878. HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
  879. {
  880. /* Return DFSDM channel handle state */
  881. return hdfsdm_channel->State;
  882. }
  883. /**
  884. * @}
  885. */
  886. /** @defgroup DFSDM_Exported_Functions_Group1_Filter Filter initialization and de-initialization functions
  887. * @brief Filter initialization and de-initialization functions
  888. *
  889. @verbatim
  890. ==============================================================================
  891. ##### Filter initialization and de-initialization functions #####
  892. ==============================================================================
  893. [..] This section provides functions allowing to:
  894. (+) Initialize the DFSDM filter.
  895. (+) De-initialize the DFSDM filter.
  896. @endverbatim
  897. * @{
  898. */
  899. /**
  900. * @brief Initialize the DFSDM filter according to the specified parameters
  901. * in the DFSDM_FilterInitTypeDef structure and initialize the associated handle.
  902. * @param hdfsdm_filter DFSDM filter handle.
  903. * @retval HAL status.
  904. */
  905. HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  906. {
  907. /* Check DFSDM Channel handle */
  908. if(hdfsdm_filter == NULL)
  909. {
  910. return HAL_ERROR;
  911. }
  912. /* Check parameters */
  913. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  914. assert_param(IS_DFSDM_FILTER_REG_TRIGGER(hdfsdm_filter->Init.RegularParam.Trigger));
  915. assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.FastMode));
  916. assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.DmaMode));
  917. assert_param(IS_DFSDM_FILTER_INJ_TRIGGER(hdfsdm_filter->Init.InjectedParam.Trigger));
  918. assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.ScanMode));
  919. assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.DmaMode));
  920. assert_param(IS_DFSDM_FILTER_SINC_ORDER(hdfsdm_filter->Init.FilterParam.SincOrder));
  921. assert_param(IS_DFSDM_FILTER_OVS_RATIO(hdfsdm_filter->Init.FilterParam.Oversampling));
  922. assert_param(IS_DFSDM_FILTER_INTEGRATOR_OVS_RATIO(hdfsdm_filter->Init.FilterParam.IntOversampling));
  923. /* Check parameters compatibility */
  924. if((hdfsdm_filter->Instance == DFSDM1_Filter0) &&
  925. ((hdfsdm_filter->Init.RegularParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER) ||
  926. (hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER)))
  927. {
  928. return HAL_ERROR;
  929. }
  930. /* Initialize DFSDM filter variables with default values */
  931. hdfsdm_filter->RegularContMode = DFSDM_CONTINUOUS_CONV_OFF;
  932. hdfsdm_filter->InjectedChannelsNbr = 1;
  933. hdfsdm_filter->InjConvRemaining = 1;
  934. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_NONE;
  935. /* Call MSP init function */
  936. HAL_DFSDM_FilterMspInit(hdfsdm_filter);
  937. /* Set regular parameters */
  938. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
  939. if(hdfsdm_filter->Init.RegularParam.FastMode == ENABLE)
  940. {
  941. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_FAST;
  942. }
  943. else
  944. {
  945. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_FAST);
  946. }
  947. if(hdfsdm_filter->Init.RegularParam.DmaMode == ENABLE)
  948. {
  949. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RDMAEN;
  950. }
  951. else
  952. {
  953. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RDMAEN);
  954. }
  955. /* Set injected parameters */
  956. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC | DFSDM_FLTCR1_JEXTEN | DFSDM_FLTCR1_JEXTSEL);
  957. if(hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_EXT_TRIGGER)
  958. {
  959. assert_param(IS_DFSDM_FILTER_EXT_TRIG(hdfsdm_filter->Init.InjectedParam.ExtTrigger));
  960. assert_param(IS_DFSDM_FILTER_EXT_TRIG_EDGE(hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge));
  961. hdfsdm_filter->Instance->FLTCR1 |= (hdfsdm_filter->Init.InjectedParam.ExtTrigger);
  962. }
  963. if(hdfsdm_filter->Init.InjectedParam.ScanMode == ENABLE)
  964. {
  965. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSCAN;
  966. }
  967. else
  968. {
  969. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSCAN);
  970. }
  971. if(hdfsdm_filter->Init.InjectedParam.DmaMode == ENABLE)
  972. {
  973. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JDMAEN;
  974. }
  975. else
  976. {
  977. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JDMAEN);
  978. }
  979. /* Set filter parameters */
  980. hdfsdm_filter->Instance->FLTFCR &= ~(DFSDM_FLTFCR_FORD | DFSDM_FLTFCR_FOSR | DFSDM_FLTFCR_IOSR);
  981. hdfsdm_filter->Instance->FLTFCR |= (hdfsdm_filter->Init.FilterParam.SincOrder |
  982. ((hdfsdm_filter->Init.FilterParam.Oversampling - 1) << DFSDM_FLTFCR_FOSR_Pos) |
  983. (hdfsdm_filter->Init.FilterParam.IntOversampling - 1));
  984. /* Store regular and injected triggers and injected scan mode*/
  985. hdfsdm_filter->RegularTrigger = hdfsdm_filter->Init.RegularParam.Trigger;
  986. hdfsdm_filter->InjectedTrigger = hdfsdm_filter->Init.InjectedParam.Trigger;
  987. hdfsdm_filter->ExtTriggerEdge = hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge;
  988. hdfsdm_filter->InjectedScanMode = hdfsdm_filter->Init.InjectedParam.ScanMode;
  989. /* Enable DFSDM filter */
  990. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
  991. /* Set DFSDM filter to ready state */
  992. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_READY;
  993. return HAL_OK;
  994. }
  995. /**
  996. * @brief De-initializes the DFSDM filter.
  997. * @param hdfsdm_filter DFSDM filter handle.
  998. * @retval HAL status.
  999. */
  1000. HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1001. {
  1002. /* Check DFSDM filter handle */
  1003. if(hdfsdm_filter == NULL)
  1004. {
  1005. return HAL_ERROR;
  1006. }
  1007. /* Check parameters */
  1008. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1009. /* Disable the DFSDM filter */
  1010. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
  1011. /* Call MSP deinit function */
  1012. HAL_DFSDM_FilterMspDeInit(hdfsdm_filter);
  1013. /* Set DFSDM filter in reset state */
  1014. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_RESET;
  1015. return HAL_OK;
  1016. }
  1017. /**
  1018. * @brief Initializes the DFSDM filter MSP.
  1019. * @param hdfsdm_filter DFSDM filter handle.
  1020. * @retval None
  1021. */
  1022. __weak void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1023. {
  1024. /* Prevent unused argument(s) compilation warning */
  1025. UNUSED(hdfsdm_filter);
  1026. /* NOTE : This function should not be modified, when the function is needed,
  1027. the HAL_DFSDM_FilterMspInit could be implemented in the user file.
  1028. */
  1029. }
  1030. /**
  1031. * @brief De-initializes the DFSDM filter MSP.
  1032. * @param hdfsdm_filter DFSDM filter handle.
  1033. * @retval None
  1034. */
  1035. __weak void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1036. {
  1037. /* Prevent unused argument(s) compilation warning */
  1038. UNUSED(hdfsdm_filter);
  1039. /* NOTE : This function should not be modified, when the function is needed,
  1040. the HAL_DFSDM_FilterMspDeInit could be implemented in the user file.
  1041. */
  1042. }
  1043. /**
  1044. * @}
  1045. */
  1046. /** @defgroup DFSDM_Exported_Functions_Group2_Filter Filter control functions
  1047. * @brief Filter control functions
  1048. *
  1049. @verbatim
  1050. ==============================================================================
  1051. ##### Filter control functions #####
  1052. ==============================================================================
  1053. [..] This section provides functions allowing to:
  1054. (+) Select channel and enable/disable continuous mode for regular conversion.
  1055. (+) Select channels for injected conversion.
  1056. @endverbatim
  1057. * @{
  1058. */
  1059. /**
  1060. * @brief This function allows to select channel and to enable/disable
  1061. * continuous mode for regular conversion.
  1062. * @param hdfsdm_filter DFSDM filter handle.
  1063. * @param Channel Channel for regular conversion.
  1064. * This parameter can be a value of @ref DFSDM_Channel_Selection.
  1065. * @param ContinuousMode Enable/disable continuous mode for regular conversion.
  1066. * This parameter can be a value of @ref DFSDM_ContinuousMode.
  1067. * @retval HAL status
  1068. */
  1069. HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1070. uint32_t Channel,
  1071. uint32_t ContinuousMode)
  1072. {
  1073. HAL_StatusTypeDef status = HAL_OK;
  1074. /* Check parameters */
  1075. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1076. assert_param(IS_DFSDM_REGULAR_CHANNEL(Channel));
  1077. assert_param(IS_DFSDM_CONTINUOUS_MODE(ContinuousMode));
  1078. /* Check DFSDM filter state */
  1079. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
  1080. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
  1081. {
  1082. /* Configure channel and continuous mode for regular conversion */
  1083. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RCH | DFSDM_FLTCR1_RCONT);
  1084. if(ContinuousMode == DFSDM_CONTINUOUS_CONV_ON)
  1085. {
  1086. hdfsdm_filter->Instance->FLTCR1 |= (uint32_t) (((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET) |
  1087. DFSDM_FLTCR1_RCONT);
  1088. }
  1089. else
  1090. {
  1091. hdfsdm_filter->Instance->FLTCR1 |= (uint32_t) ((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET);
  1092. }
  1093. /* Store continuous mode information */
  1094. hdfsdm_filter->RegularContMode = ContinuousMode;
  1095. }
  1096. else
  1097. {
  1098. status = HAL_ERROR;
  1099. }
  1100. /* Return function status */
  1101. return status;
  1102. }
  1103. /**
  1104. * @brief This function allows to select channels for injected conversion.
  1105. * @param hdfsdm_filter DFSDM filter handle.
  1106. * @param Channel Channels for injected conversion.
  1107. * This parameter can be a values combination of @ref DFSDM_Channel_Selection.
  1108. * @retval HAL status
  1109. */
  1110. HAL_StatusTypeDef HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1111. uint32_t Channel)
  1112. {
  1113. HAL_StatusTypeDef status = HAL_OK;
  1114. /* Check parameters */
  1115. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1116. assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
  1117. /* Check DFSDM filter state */
  1118. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
  1119. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
  1120. {
  1121. /* Configure channel for injected conversion */
  1122. hdfsdm_filter->Instance->FLTJCHGR = (uint32_t) (Channel & DFSDM_LSB_MASK);
  1123. /* Store number of injected channels */
  1124. hdfsdm_filter->InjectedChannelsNbr = DFSDM_GetInjChannelsNbr(Channel);
  1125. /* Update number of injected channels remaining */
  1126. hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
  1127. hdfsdm_filter->InjectedChannelsNbr : 1;
  1128. }
  1129. else
  1130. {
  1131. status = HAL_ERROR;
  1132. }
  1133. /* Return function status */
  1134. return status;
  1135. }
  1136. /**
  1137. * @}
  1138. */
  1139. /** @defgroup DFSDM_Exported_Functions_Group3_Filter Filter operation functions
  1140. * @brief Filter operation functions
  1141. *
  1142. @verbatim
  1143. ==============================================================================
  1144. ##### Filter operation functions #####
  1145. ==============================================================================
  1146. [..] This section provides functions allowing to:
  1147. (+) Start conversion of regular/injected channel.
  1148. (+) Poll for the end of regular/injected conversion.
  1149. (+) Stop conversion of regular/injected channel.
  1150. (+) Start conversion of regular/injected channel and enable interrupt.
  1151. (+) Call the callback functions at the end of regular/injected conversions.
  1152. (+) Stop conversion of regular/injected channel and disable interrupt.
  1153. (+) Start conversion of regular/injected channel and enable DMA transfer.
  1154. (+) Stop conversion of regular/injected channel and disable DMA transfer.
  1155. (+) Start analog watchdog and enable interrupt.
  1156. (+) Call the callback function when analog watchdog occurs.
  1157. (+) Stop analog watchdog and disable interrupt.
  1158. (+) Start extreme detector.
  1159. (+) Stop extreme detector.
  1160. (+) Get result of regular channel conversion.
  1161. (+) Get result of injected channel conversion.
  1162. (+) Get extreme detector maximum and minimum values.
  1163. (+) Get conversion time.
  1164. (+) Handle DFSDM interrupt request.
  1165. @endverbatim
  1166. * @{
  1167. */
  1168. /**
  1169. * @brief This function allows to start regular conversion in polling mode.
  1170. * @note This function should be called only when DFSDM filter instance is
  1171. * in idle state or if injected conversion is ongoing.
  1172. * @param hdfsdm_filter DFSDM filter handle.
  1173. * @retval HAL status
  1174. */
  1175. HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1176. {
  1177. HAL_StatusTypeDef status = HAL_OK;
  1178. /* Check parameters */
  1179. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1180. /* Check DFSDM filter state */
  1181. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1182. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
  1183. {
  1184. /* Start regular conversion */
  1185. DFSDM_RegConvStart(hdfsdm_filter);
  1186. }
  1187. else
  1188. {
  1189. status = HAL_ERROR;
  1190. }
  1191. /* Return function status */
  1192. return status;
  1193. }
  1194. /**
  1195. * @brief This function allows to poll for the end of regular conversion.
  1196. * @note This function should be called only if regular conversion is ongoing.
  1197. * @param hdfsdm_filter DFSDM filter handle.
  1198. * @param Timeout Timeout value in milliseconds.
  1199. * @retval HAL status
  1200. */
  1201. HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1202. uint32_t Timeout)
  1203. {
  1204. uint32_t tickstart;
  1205. /* Check parameters */
  1206. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1207. /* Check DFSDM filter state */
  1208. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
  1209. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1210. {
  1211. /* Return error status */
  1212. return HAL_ERROR;
  1213. }
  1214. else
  1215. {
  1216. /* Get timeout */
  1217. tickstart = HAL_GetTick();
  1218. /* Wait end of regular conversion */
  1219. while((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_REOCF) != DFSDM_FLTISR_REOCF)
  1220. {
  1221. /* Check the Timeout */
  1222. if(Timeout != HAL_MAX_DELAY)
  1223. {
  1224. if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
  1225. {
  1226. /* Return timeout status */
  1227. return HAL_TIMEOUT;
  1228. }
  1229. }
  1230. }
  1231. /* Check if overrun occurs */
  1232. if((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_ROVRF) == DFSDM_FLTISR_ROVRF)
  1233. {
  1234. /* Update error code and call error callback */
  1235. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
  1236. HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
  1237. /* Clear regular overrun flag */
  1238. hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
  1239. }
  1240. /* Update DFSDM filter state only if not continuous conversion and SW trigger */
  1241. if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
  1242. (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
  1243. {
  1244. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
  1245. HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
  1246. }
  1247. /* Return function status */
  1248. return HAL_OK;
  1249. }
  1250. }
  1251. /**
  1252. * @brief This function allows to stop regular conversion in polling mode.
  1253. * @note This function should be called only if regular conversion is ongoing.
  1254. * @param hdfsdm_filter DFSDM filter handle.
  1255. * @retval HAL status
  1256. */
  1257. HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1258. {
  1259. HAL_StatusTypeDef status = HAL_OK;
  1260. /* Check parameters */
  1261. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1262. /* Check DFSDM filter state */
  1263. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
  1264. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1265. {
  1266. /* Return error status */
  1267. status = HAL_ERROR;
  1268. }
  1269. else
  1270. {
  1271. /* Stop regular conversion */
  1272. DFSDM_RegConvStop(hdfsdm_filter);
  1273. }
  1274. /* Return function status */
  1275. return status;
  1276. }
  1277. /**
  1278. * @brief This function allows to start regular conversion in interrupt mode.
  1279. * @note This function should be called only when DFSDM filter instance is
  1280. * in idle state or if injected conversion is ongoing.
  1281. * @param hdfsdm_filter DFSDM filter handle.
  1282. * @retval HAL status
  1283. */
  1284. HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1285. {
  1286. HAL_StatusTypeDef status = HAL_OK;
  1287. /* Check parameters */
  1288. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1289. /* Check DFSDM filter state */
  1290. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1291. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
  1292. {
  1293. /* Enable interrupts for regular conversions */
  1294. hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE);
  1295. /* Start regular conversion */
  1296. DFSDM_RegConvStart(hdfsdm_filter);
  1297. }
  1298. else
  1299. {
  1300. status = HAL_ERROR;
  1301. }
  1302. /* Return function status */
  1303. return status;
  1304. }
  1305. /**
  1306. * @brief This function allows to stop regular conversion in interrupt mode.
  1307. * @note This function should be called only if regular conversion is ongoing.
  1308. * @param hdfsdm_filter DFSDM filter handle.
  1309. * @retval HAL status
  1310. */
  1311. HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1312. {
  1313. HAL_StatusTypeDef status = HAL_OK;
  1314. /* Check parameters */
  1315. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1316. /* Check DFSDM filter state */
  1317. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
  1318. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1319. {
  1320. /* Return error status */
  1321. status = HAL_ERROR;
  1322. }
  1323. else
  1324. {
  1325. /* Disable interrupts for regular conversions */
  1326. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE);
  1327. /* Stop regular conversion */
  1328. DFSDM_RegConvStop(hdfsdm_filter);
  1329. }
  1330. /* Return function status */
  1331. return status;
  1332. }
  1333. /**
  1334. * @brief This function allows to start regular conversion in DMA mode.
  1335. * @note This function should be called only when DFSDM filter instance is
  1336. * in idle state or if injected conversion is ongoing.
  1337. * Please note that data on buffer will contain signed regular conversion
  1338. * value on 24 most significant bits and corresponding channel on 3 least
  1339. * significant bits.
  1340. * @param hdfsdm_filter DFSDM filter handle.
  1341. * @param pData The destination buffer address.
  1342. * @param Length The length of data to be transferred from DFSDM filter to memory.
  1343. * @retval HAL status
  1344. */
  1345. HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1346. int32_t *pData,
  1347. uint32_t Length)
  1348. {
  1349. HAL_StatusTypeDef status = HAL_OK;
  1350. /* Check parameters */
  1351. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1352. /* Check destination address and length */
  1353. if((pData == NULL) || (Length == 0))
  1354. {
  1355. status = HAL_ERROR;
  1356. }
  1357. /* Check that DMA is enabled for regular conversion */
  1358. else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
  1359. {
  1360. status = HAL_ERROR;
  1361. }
  1362. /* Check parameters compatibility */
  1363. else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  1364. (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
  1365. (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
  1366. (Length != 1))
  1367. {
  1368. status = HAL_ERROR;
  1369. }
  1370. else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  1371. (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
  1372. (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
  1373. {
  1374. status = HAL_ERROR;
  1375. }
  1376. /* Check DFSDM filter state */
  1377. else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1378. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
  1379. {
  1380. /* Set callbacks on DMA handler */
  1381. hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
  1382. hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
  1383. hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
  1384. DFSDM_DMARegularHalfConvCplt : NULL;
  1385. /* Start DMA in interrupt mode */
  1386. if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)&hdfsdm_filter->Instance->FLTRDATAR, \
  1387. (uint32_t) pData, Length) != HAL_OK)
  1388. {
  1389. /* Set DFSDM filter in error state */
  1390. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
  1391. status = HAL_ERROR;
  1392. }
  1393. else
  1394. {
  1395. /* Start regular conversion */
  1396. DFSDM_RegConvStart(hdfsdm_filter);
  1397. }
  1398. }
  1399. else
  1400. {
  1401. status = HAL_ERROR;
  1402. }
  1403. /* Return function status */
  1404. return status;
  1405. }
  1406. /**
  1407. * @brief This function allows to start regular conversion in DMA mode and to get
  1408. * only the 16 most significant bits of conversion.
  1409. * @note This function should be called only when DFSDM filter instance is
  1410. * in idle state or if injected conversion is ongoing.
  1411. * Please note that data on buffer will contain signed 16 most significant
  1412. * bits of regular conversion.
  1413. * @param hdfsdm_filter DFSDM filter handle.
  1414. * @param pData The destination buffer address.
  1415. * @param Length The length of data to be transferred from DFSDM filter to memory.
  1416. * @retval HAL status
  1417. */
  1418. HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1419. int16_t *pData,
  1420. uint32_t Length)
  1421. {
  1422. HAL_StatusTypeDef status = HAL_OK;
  1423. /* Check parameters */
  1424. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1425. /* Check destination address and length */
  1426. if((pData == NULL) || (Length == 0))
  1427. {
  1428. status = HAL_ERROR;
  1429. }
  1430. /* Check that DMA is enabled for regular conversion */
  1431. else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
  1432. {
  1433. status = HAL_ERROR;
  1434. }
  1435. /* Check parameters compatibility */
  1436. else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  1437. (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
  1438. (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
  1439. (Length != 1))
  1440. {
  1441. status = HAL_ERROR;
  1442. }
  1443. else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  1444. (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
  1445. (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
  1446. {
  1447. status = HAL_ERROR;
  1448. }
  1449. /* Check DFSDM filter state */
  1450. else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1451. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
  1452. {
  1453. /* Set callbacks on DMA handler */
  1454. hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
  1455. hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
  1456. hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
  1457. DFSDM_DMARegularHalfConvCplt : NULL;
  1458. /* Start DMA in interrupt mode */
  1459. if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)(&hdfsdm_filter->Instance->FLTRDATAR) + 2, \
  1460. (uint32_t) pData, Length) != HAL_OK)
  1461. {
  1462. /* Set DFSDM filter in error state */
  1463. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
  1464. status = HAL_ERROR;
  1465. }
  1466. else
  1467. {
  1468. /* Start regular conversion */
  1469. DFSDM_RegConvStart(hdfsdm_filter);
  1470. }
  1471. }
  1472. else
  1473. {
  1474. status = HAL_ERROR;
  1475. }
  1476. /* Return function status */
  1477. return status;
  1478. }
  1479. /**
  1480. * @brief This function allows to stop regular conversion in DMA mode.
  1481. * @note This function should be called only if regular conversion is ongoing.
  1482. * @param hdfsdm_filter DFSDM filter handle.
  1483. * @retval HAL status
  1484. */
  1485. HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1486. {
  1487. HAL_StatusTypeDef status = HAL_OK;
  1488. /* Check parameters */
  1489. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1490. /* Check DFSDM filter state */
  1491. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
  1492. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1493. {
  1494. /* Return error status */
  1495. status = HAL_ERROR;
  1496. }
  1497. else
  1498. {
  1499. /* Stop current DMA transfer */
  1500. if(HAL_DMA_Abort(hdfsdm_filter->hdmaReg) != HAL_OK)
  1501. {
  1502. /* Set DFSDM filter in error state */
  1503. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
  1504. status = HAL_ERROR;
  1505. }
  1506. else
  1507. {
  1508. /* Stop regular conversion */
  1509. DFSDM_RegConvStop(hdfsdm_filter);
  1510. }
  1511. }
  1512. /* Return function status */
  1513. return status;
  1514. }
  1515. /**
  1516. * @brief This function allows to get regular conversion value.
  1517. * @param hdfsdm_filter DFSDM filter handle.
  1518. * @param Channel Corresponding channel of regular conversion.
  1519. * @retval Regular conversion value
  1520. */
  1521. int32_t HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1522. uint32_t *Channel)
  1523. {
  1524. uint32_t reg = 0;
  1525. int32_t value = 0;
  1526. /* Check parameters */
  1527. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1528. assert_param(Channel != NULL);
  1529. /* Get value of data register for regular channel */
  1530. reg = hdfsdm_filter->Instance->FLTRDATAR;
  1531. /* Extract channel and regular conversion value */
  1532. *Channel = (reg & DFSDM_FLTRDATAR_RDATACH);
  1533. value = ((int32_t)(reg & DFSDM_FLTRDATAR_RDATA) >> DFSDM_FLTRDATAR_RDATA_Pos);
  1534. /* return regular conversion value */
  1535. return value;
  1536. }
  1537. /**
  1538. * @brief This function allows to start injected conversion in polling mode.
  1539. * @note This function should be called only when DFSDM filter instance is
  1540. * in idle state or if regular conversion is ongoing.
  1541. * @param hdfsdm_filter DFSDM filter handle.
  1542. * @retval HAL status
  1543. */
  1544. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1545. {
  1546. HAL_StatusTypeDef status = HAL_OK;
  1547. /* Check parameters */
  1548. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1549. /* Check DFSDM filter state */
  1550. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1551. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
  1552. {
  1553. /* Start injected conversion */
  1554. DFSDM_InjConvStart(hdfsdm_filter);
  1555. }
  1556. else
  1557. {
  1558. status = HAL_ERROR;
  1559. }
  1560. /* Return function status */
  1561. return status;
  1562. }
  1563. /**
  1564. * @brief This function allows to poll for the end of injected conversion.
  1565. * @note This function should be called only if injected conversion is ongoing.
  1566. * @param hdfsdm_filter DFSDM filter handle.
  1567. * @param Timeout Timeout value in milliseconds.
  1568. * @retval HAL status
  1569. */
  1570. HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1571. uint32_t Timeout)
  1572. {
  1573. uint32_t tickstart;
  1574. /* Check parameters */
  1575. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1576. /* Check DFSDM filter state */
  1577. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
  1578. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1579. {
  1580. /* Return error status */
  1581. return HAL_ERROR;
  1582. }
  1583. else
  1584. {
  1585. /* Get timeout */
  1586. tickstart = HAL_GetTick();
  1587. /* Wait end of injected conversions */
  1588. while((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JEOCF) != DFSDM_FLTISR_JEOCF)
  1589. {
  1590. /* Check the Timeout */
  1591. if(Timeout != HAL_MAX_DELAY)
  1592. {
  1593. if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
  1594. {
  1595. /* Return timeout status */
  1596. return HAL_TIMEOUT;
  1597. }
  1598. }
  1599. }
  1600. /* Check if overrun occurs */
  1601. if((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JOVRF) == DFSDM_FLTISR_JOVRF)
  1602. {
  1603. /* Update error code and call error callback */
  1604. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
  1605. HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
  1606. /* Clear injected overrun flag */
  1607. hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
  1608. }
  1609. /* Update remaining injected conversions */
  1610. hdfsdm_filter->InjConvRemaining--;
  1611. if(hdfsdm_filter->InjConvRemaining == 0)
  1612. {
  1613. /* Update DFSDM filter state only if trigger is software */
  1614. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
  1615. {
  1616. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
  1617. HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
  1618. }
  1619. /* end of injected sequence, reset the value */
  1620. hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
  1621. hdfsdm_filter->InjectedChannelsNbr : 1;
  1622. }
  1623. /* Return function status */
  1624. return HAL_OK;
  1625. }
  1626. }
  1627. /**
  1628. * @brief This function allows to stop injected conversion in polling mode.
  1629. * @note This function should be called only if injected conversion is ongoing.
  1630. * @param hdfsdm_filter DFSDM filter handle.
  1631. * @retval HAL status
  1632. */
  1633. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1634. {
  1635. HAL_StatusTypeDef status = HAL_OK;
  1636. /* Check parameters */
  1637. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1638. /* Check DFSDM filter state */
  1639. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
  1640. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1641. {
  1642. /* Return error status */
  1643. status = HAL_ERROR;
  1644. }
  1645. else
  1646. {
  1647. /* Stop injected conversion */
  1648. DFSDM_InjConvStop(hdfsdm_filter);
  1649. }
  1650. /* Return function status */
  1651. return status;
  1652. }
  1653. /**
  1654. * @brief This function allows to start injected conversion in interrupt mode.
  1655. * @note This function should be called only when DFSDM filter instance is
  1656. * in idle state or if regular conversion is ongoing.
  1657. * @param hdfsdm_filter DFSDM filter handle.
  1658. * @retval HAL status
  1659. */
  1660. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1661. {
  1662. HAL_StatusTypeDef status = HAL_OK;
  1663. /* Check parameters */
  1664. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1665. /* Check DFSDM filter state */
  1666. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1667. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
  1668. {
  1669. /* Enable interrupts for injected conversions */
  1670. hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE);
  1671. /* Start injected conversion */
  1672. DFSDM_InjConvStart(hdfsdm_filter);
  1673. }
  1674. else
  1675. {
  1676. status = HAL_ERROR;
  1677. }
  1678. /* Return function status */
  1679. return status;
  1680. }
  1681. /**
  1682. * @brief This function allows to stop injected conversion in interrupt mode.
  1683. * @note This function should be called only if injected conversion is ongoing.
  1684. * @param hdfsdm_filter DFSDM filter handle.
  1685. * @retval HAL status
  1686. */
  1687. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1688. {
  1689. HAL_StatusTypeDef status = HAL_OK;
  1690. /* Check parameters */
  1691. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1692. /* Check DFSDM filter state */
  1693. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
  1694. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1695. {
  1696. /* Return error status */
  1697. status = HAL_ERROR;
  1698. }
  1699. else
  1700. {
  1701. /* Disable interrupts for injected conversions */
  1702. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE);
  1703. /* Stop injected conversion */
  1704. DFSDM_InjConvStop(hdfsdm_filter);
  1705. }
  1706. /* Return function status */
  1707. return status;
  1708. }
  1709. /**
  1710. * @brief This function allows to start injected conversion in DMA mode.
  1711. * @note This function should be called only when DFSDM filter instance is
  1712. * in idle state or if regular conversion is ongoing.
  1713. * Please note that data on buffer will contain signed injected conversion
  1714. * value on 24 most significant bits and corresponding channel on 3 least
  1715. * significant bits.
  1716. * @param hdfsdm_filter DFSDM filter handle.
  1717. * @param pData The destination buffer address.
  1718. * @param Length The length of data to be transferred from DFSDM filter to memory.
  1719. * @retval HAL status
  1720. */
  1721. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1722. int32_t *pData,
  1723. uint32_t Length)
  1724. {
  1725. HAL_StatusTypeDef status = HAL_OK;
  1726. /* Check parameters */
  1727. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1728. /* Check destination address and length */
  1729. if((pData == NULL) || (Length == 0))
  1730. {
  1731. status = HAL_ERROR;
  1732. }
  1733. /* Check that DMA is enabled for injected conversion */
  1734. else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
  1735. {
  1736. status = HAL_ERROR;
  1737. }
  1738. /* Check parameters compatibility */
  1739. else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  1740. (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
  1741. (Length > hdfsdm_filter->InjConvRemaining))
  1742. {
  1743. status = HAL_ERROR;
  1744. }
  1745. else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  1746. (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
  1747. {
  1748. status = HAL_ERROR;
  1749. }
  1750. /* Check DFSDM filter state */
  1751. else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1752. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
  1753. {
  1754. /* Set callbacks on DMA handler */
  1755. hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
  1756. hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
  1757. hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\
  1758. DFSDM_DMAInjectedHalfConvCplt : NULL;
  1759. /* Start DMA in interrupt mode */
  1760. if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)&hdfsdm_filter->Instance->FLTJDATAR, \
  1761. (uint32_t) pData, Length) != HAL_OK)
  1762. {
  1763. /* Set DFSDM filter in error state */
  1764. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
  1765. status = HAL_ERROR;
  1766. }
  1767. else
  1768. {
  1769. /* Start injected conversion */
  1770. DFSDM_InjConvStart(hdfsdm_filter);
  1771. }
  1772. }
  1773. else
  1774. {
  1775. status = HAL_ERROR;
  1776. }
  1777. /* Return function status */
  1778. return status;
  1779. }
  1780. /**
  1781. * @brief This function allows to start injected conversion in DMA mode and to get
  1782. * only the 16 most significant bits of conversion.
  1783. * @note This function should be called only when DFSDM filter instance is
  1784. * in idle state or if regular conversion is ongoing.
  1785. * Please note that data on buffer will contain signed 16 most significant
  1786. * bits of injected conversion.
  1787. * @param hdfsdm_filter DFSDM filter handle.
  1788. * @param pData The destination buffer address.
  1789. * @param Length The length of data to be transferred from DFSDM filter to memory.
  1790. * @retval HAL status
  1791. */
  1792. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1793. int16_t *pData,
  1794. uint32_t Length)
  1795. {
  1796. HAL_StatusTypeDef status = HAL_OK;
  1797. /* Check parameters */
  1798. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1799. /* Check destination address and length */
  1800. if((pData == NULL) || (Length == 0))
  1801. {
  1802. status = HAL_ERROR;
  1803. }
  1804. /* Check that DMA is enabled for injected conversion */
  1805. else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
  1806. {
  1807. status = HAL_ERROR;
  1808. }
  1809. /* Check parameters compatibility */
  1810. else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  1811. (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
  1812. (Length > hdfsdm_filter->InjConvRemaining))
  1813. {
  1814. status = HAL_ERROR;
  1815. }
  1816. else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
  1817. (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
  1818. {
  1819. status = HAL_ERROR;
  1820. }
  1821. /* Check DFSDM filter state */
  1822. else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
  1823. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
  1824. {
  1825. /* Set callbacks on DMA handler */
  1826. hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
  1827. hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
  1828. hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\
  1829. DFSDM_DMAInjectedHalfConvCplt : NULL;
  1830. /* Start DMA in interrupt mode */
  1831. if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)(&hdfsdm_filter->Instance->FLTJDATAR) + 2, \
  1832. (uint32_t) pData, Length) != HAL_OK)
  1833. {
  1834. /* Set DFSDM filter in error state */
  1835. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
  1836. status = HAL_ERROR;
  1837. }
  1838. else
  1839. {
  1840. /* Start injected conversion */
  1841. DFSDM_InjConvStart(hdfsdm_filter);
  1842. }
  1843. }
  1844. else
  1845. {
  1846. status = HAL_ERROR;
  1847. }
  1848. /* Return function status */
  1849. return status;
  1850. }
  1851. /**
  1852. * @brief This function allows to stop injected conversion in DMA mode.
  1853. * @note This function should be called only if injected conversion is ongoing.
  1854. * @param hdfsdm_filter DFSDM filter handle.
  1855. * @retval HAL status
  1856. */
  1857. HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1858. {
  1859. HAL_StatusTypeDef status = HAL_OK;
  1860. /* Check parameters */
  1861. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1862. /* Check DFSDM filter state */
  1863. if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
  1864. (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
  1865. {
  1866. /* Return error status */
  1867. status = HAL_ERROR;
  1868. }
  1869. else
  1870. {
  1871. /* Stop current DMA transfer */
  1872. if(HAL_DMA_Abort(hdfsdm_filter->hdmaInj) != HAL_OK)
  1873. {
  1874. /* Set DFSDM filter in error state */
  1875. hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
  1876. status = HAL_ERROR;
  1877. }
  1878. else
  1879. {
  1880. /* Stop regular conversion */
  1881. DFSDM_InjConvStop(hdfsdm_filter);
  1882. }
  1883. }
  1884. /* Return function status */
  1885. return status;
  1886. }
  1887. /**
  1888. * @brief This function allows to get injected conversion value.
  1889. * @param hdfsdm_filter DFSDM filter handle.
  1890. * @param Channel Corresponding channel of injected conversion.
  1891. * @retval Injected conversion value
  1892. */
  1893. int32_t HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1894. uint32_t *Channel)
  1895. {
  1896. uint32_t reg = 0;
  1897. int32_t value = 0;
  1898. /* Check parameters */
  1899. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1900. assert_param(Channel != NULL);
  1901. /* Get value of data register for injected channel */
  1902. reg = hdfsdm_filter->Instance->FLTJDATAR;
  1903. /* Extract channel and injected conversion value */
  1904. *Channel = (reg & DFSDM_FLTJDATAR_JDATACH);
  1905. value = ((int32_t)(reg & DFSDM_FLTJDATAR_JDATA) >> DFSDM_FLTJDATAR_JDATA_Pos);
  1906. /* return regular conversion value */
  1907. return value;
  1908. }
  1909. /**
  1910. * @brief This function allows to start filter analog watchdog in interrupt mode.
  1911. * @param hdfsdm_filter DFSDM filter handle.
  1912. * @param awdParam DFSDM filter analog watchdog parameters.
  1913. * @retval HAL status
  1914. */
  1915. HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1916. DFSDM_Filter_AwdParamTypeDef *awdParam)
  1917. {
  1918. HAL_StatusTypeDef status = HAL_OK;
  1919. /* Check parameters */
  1920. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1921. assert_param(IS_DFSDM_FILTER_AWD_DATA_SOURCE(awdParam->DataSource));
  1922. assert_param(IS_DFSDM_INJECTED_CHANNEL(awdParam->Channel));
  1923. assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->HighThreshold));
  1924. assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->LowThreshold));
  1925. assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->HighBreakSignal));
  1926. assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->LowBreakSignal));
  1927. /* Check DFSDM filter state */
  1928. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
  1929. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
  1930. {
  1931. /* Return error status */
  1932. status = HAL_ERROR;
  1933. }
  1934. else
  1935. {
  1936. /* Set analog watchdog data source */
  1937. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
  1938. hdfsdm_filter->Instance->FLTCR1 |= awdParam->DataSource;
  1939. /* Set thresholds and break signals */
  1940. hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH);
  1941. hdfsdm_filter->Instance->FLTAWHTR |= (((uint32_t) awdParam->HighThreshold << DFSDM_FLTAWHTR_AWHT_Pos) | \
  1942. awdParam->HighBreakSignal);
  1943. hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL);
  1944. hdfsdm_filter->Instance->FLTAWLTR |= (((uint32_t) awdParam->LowThreshold << DFSDM_FLTAWLTR_AWLT_Pos) | \
  1945. awdParam->LowBreakSignal);
  1946. /* Set channels and interrupt for analog watchdog */
  1947. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH);
  1948. hdfsdm_filter->Instance->FLTCR2 |= (((awdParam->Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_AWDCH_Pos) | \
  1949. DFSDM_FLTCR2_AWDIE);
  1950. }
  1951. /* Return function status */
  1952. return status;
  1953. }
  1954. /**
  1955. * @brief This function allows to stop filter analog watchdog in interrupt mode.
  1956. * @param hdfsdm_filter DFSDM filter handle.
  1957. * @retval HAL status
  1958. */
  1959. HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  1960. {
  1961. HAL_StatusTypeDef status = HAL_OK;
  1962. /* Check parameters */
  1963. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1964. /* Check DFSDM filter state */
  1965. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
  1966. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
  1967. {
  1968. /* Return error status */
  1969. status = HAL_ERROR;
  1970. }
  1971. else
  1972. {
  1973. /* Reset channels for analog watchdog and deactivate interrupt */
  1974. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH | DFSDM_FLTCR2_AWDIE);
  1975. /* Clear all analog watchdog flags */
  1976. hdfsdm_filter->Instance->FLTAWCFR = (DFSDM_FLTAWCFR_CLRAWHTF | DFSDM_FLTAWCFR_CLRAWLTF);
  1977. /* Reset thresholds and break signals */
  1978. hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH);
  1979. hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL);
  1980. /* Reset analog watchdog data source */
  1981. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
  1982. }
  1983. /* Return function status */
  1984. return status;
  1985. }
  1986. /**
  1987. * @brief This function allows to start extreme detector feature.
  1988. * @param hdfsdm_filter DFSDM filter handle.
  1989. * @param Channel Channels where extreme detector is enabled.
  1990. * This parameter can be a values combination of @ref DFSDM_Channel_Selection.
  1991. * @retval HAL status
  1992. */
  1993. HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  1994. uint32_t Channel)
  1995. {
  1996. HAL_StatusTypeDef status = HAL_OK;
  1997. /* Check parameters */
  1998. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  1999. assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
  2000. /* Check DFSDM filter state */
  2001. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
  2002. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
  2003. {
  2004. /* Return error status */
  2005. status = HAL_ERROR;
  2006. }
  2007. else
  2008. {
  2009. /* Set channels for extreme detector */
  2010. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
  2011. hdfsdm_filter->Instance->FLTCR2 |= ((Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_EXCH_Pos);
  2012. }
  2013. /* Return function status */
  2014. return status;
  2015. }
  2016. /**
  2017. * @brief This function allows to stop extreme detector feature.
  2018. * @param hdfsdm_filter DFSDM filter handle.
  2019. * @retval HAL status
  2020. */
  2021. HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2022. {
  2023. HAL_StatusTypeDef status = HAL_OK;
  2024. __IO uint32_t reg1;
  2025. __IO uint32_t reg2;
  2026. /* Check parameters */
  2027. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2028. /* Check DFSDM filter state */
  2029. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
  2030. (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
  2031. {
  2032. /* Return error status */
  2033. status = HAL_ERROR;
  2034. }
  2035. else
  2036. {
  2037. /* Reset channels for extreme detector */
  2038. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
  2039. /* Clear extreme detector values */
  2040. reg1 = hdfsdm_filter->Instance->FLTEXMAX;
  2041. reg2 = hdfsdm_filter->Instance->FLTEXMIN;
  2042. UNUSED(reg1); /* To avoid GCC warning */
  2043. UNUSED(reg2); /* To avoid GCC warning */
  2044. }
  2045. /* Return function status */
  2046. return status;
  2047. }
  2048. /**
  2049. * @brief This function allows to get extreme detector maximum value.
  2050. * @param hdfsdm_filter DFSDM filter handle.
  2051. * @param Channel Corresponding channel.
  2052. * @retval Extreme detector maximum value
  2053. * This value is between Min_Data = -8388608 and Max_Data = 8388607.
  2054. */
  2055. int32_t HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  2056. uint32_t *Channel)
  2057. {
  2058. uint32_t reg = 0;
  2059. int32_t value = 0;
  2060. /* Check parameters */
  2061. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2062. assert_param(Channel != NULL);
  2063. /* Get value of extreme detector maximum register */
  2064. reg = hdfsdm_filter->Instance->FLTEXMAX;
  2065. /* Extract channel and extreme detector maximum value */
  2066. *Channel = (reg & DFSDM_FLTEXMAX_EXMAXCH);
  2067. value = ((int32_t)(reg & DFSDM_FLTEXMAX_EXMAX) >> DFSDM_FLTEXMAX_EXMAX_Pos);
  2068. /* return extreme detector maximum value */
  2069. return value;
  2070. }
  2071. /**
  2072. * @brief This function allows to get extreme detector minimum value.
  2073. * @param hdfsdm_filter DFSDM filter handle.
  2074. * @param Channel Corresponding channel.
  2075. * @retval Extreme detector minimum value
  2076. * This value is between Min_Data = -8388608 and Max_Data = 8388607.
  2077. */
  2078. int32_t HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  2079. uint32_t *Channel)
  2080. {
  2081. uint32_t reg = 0;
  2082. int32_t value = 0;
  2083. /* Check parameters */
  2084. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2085. assert_param(Channel != NULL);
  2086. /* Get value of extreme detector minimum register */
  2087. reg = hdfsdm_filter->Instance->FLTEXMIN;
  2088. /* Extract channel and extreme detector minimum value */
  2089. *Channel = (reg & DFSDM_FLTEXMIN_EXMINCH);
  2090. value = ((int32_t)(reg & DFSDM_FLTEXMIN_EXMIN) >> DFSDM_FLTEXMIN_EXMIN_Pos);
  2091. /* return extreme detector minimum value */
  2092. return value;
  2093. }
  2094. /**
  2095. * @brief This function allows to get conversion time value.
  2096. * @param hdfsdm_filter DFSDM filter handle.
  2097. * @retval Conversion time value
  2098. * @note To get time in second, this value has to be divided by DFSDM clock frequency.
  2099. */
  2100. uint32_t HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2101. {
  2102. uint32_t reg = 0;
  2103. uint32_t value = 0;
  2104. /* Check parameters */
  2105. assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
  2106. /* Get value of conversion timer register */
  2107. reg = hdfsdm_filter->Instance->FLTCNVTIMR;
  2108. /* Extract conversion time value */
  2109. value = ((reg & DFSDM_FLTCNVTIMR_CNVCNT) >> DFSDM_FLTCNVTIMR_CNVCNT_Pos);
  2110. /* return extreme detector minimum value */
  2111. return value;
  2112. }
  2113. /**
  2114. * @brief This function handles the DFSDM interrupts.
  2115. * @param hdfsdm_filter DFSDM filter handle.
  2116. * @retval None
  2117. */
  2118. void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2119. {
  2120. /* Check if overrun occurs during regular conversion */
  2121. if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_ROVRF) != 0) && \
  2122. ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_ROVRIE) != 0))
  2123. {
  2124. /* Clear regular overrun flag */
  2125. hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
  2126. /* Update error code */
  2127. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
  2128. /* Call error callback */
  2129. HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
  2130. }
  2131. /* Check if overrun occurs during injected conversion */
  2132. else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JOVRF) != 0) && \
  2133. ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_JOVRIE) != 0))
  2134. {
  2135. /* Clear injected overrun flag */
  2136. hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
  2137. /* Update error code */
  2138. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
  2139. /* Call error callback */
  2140. HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
  2141. }
  2142. /* Check if end of regular conversion */
  2143. else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_REOCF) != 0) && \
  2144. ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_REOCIE) != 0))
  2145. {
  2146. /* Call regular conversion complete callback */
  2147. HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
  2148. /* End of conversion if mode is not continuous and software trigger */
  2149. if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
  2150. (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
  2151. {
  2152. /* Disable interrupts for regular conversions */
  2153. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE);
  2154. /* Update DFSDM filter state */
  2155. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
  2156. HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
  2157. }
  2158. }
  2159. /* Check if end of injected conversion */
  2160. else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JEOCF) != 0) && \
  2161. ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_JEOCIE) != 0))
  2162. {
  2163. /* Call injected conversion complete callback */
  2164. HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
  2165. /* Update remaining injected conversions */
  2166. hdfsdm_filter->InjConvRemaining--;
  2167. if(hdfsdm_filter->InjConvRemaining == 0)
  2168. {
  2169. /* End of conversion if trigger is software */
  2170. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
  2171. {
  2172. /* Disable interrupts for injected conversions */
  2173. hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE);
  2174. /* Update DFSDM filter state */
  2175. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
  2176. HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
  2177. }
  2178. /* end of injected sequence, reset the value */
  2179. hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
  2180. hdfsdm_filter->InjectedChannelsNbr : 1;
  2181. }
  2182. }
  2183. /* Check if analog watchdog occurs */
  2184. else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_AWDF) != 0) && \
  2185. ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_AWDIE) != 0))
  2186. {
  2187. uint32_t reg = 0;
  2188. uint32_t threshold = 0;
  2189. uint32_t channel = 0;
  2190. /* Get channel and threshold */
  2191. reg = hdfsdm_filter->Instance->FLTAWSR;
  2192. threshold = ((reg & DFSDM_FLTAWSR_AWLTF) != 0) ? DFSDM_AWD_LOW_THRESHOLD : DFSDM_AWD_HIGH_THRESHOLD;
  2193. if(threshold == DFSDM_AWD_HIGH_THRESHOLD)
  2194. {
  2195. reg = reg >> DFSDM_FLTAWSR_AWHTF_Pos;
  2196. }
  2197. while((reg & 1) == 0)
  2198. {
  2199. channel++;
  2200. reg = reg >> 1;
  2201. }
  2202. /* Clear analog watchdog flag */
  2203. hdfsdm_filter->Instance->FLTAWCFR = (threshold == DFSDM_AWD_HIGH_THRESHOLD) ? \
  2204. (1 << (DFSDM_FLTAWSR_AWHTF_Pos + channel)) : \
  2205. (1 << channel);
  2206. /* Call analog watchdog callback */
  2207. HAL_DFSDM_FilterAwdCallback(hdfsdm_filter, channel, threshold);
  2208. }
  2209. /* Check if clock absence occurs */
  2210. else if((hdfsdm_filter->Instance == DFSDM1_Filter0) && \
  2211. ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) != 0) && \
  2212. ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_CKABIE) != 0))
  2213. {
  2214. uint32_t reg = 0;
  2215. uint32_t channel = 0;
  2216. reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) >> DFSDM_FLTISR_CKABF_Pos);
  2217. while(channel < DFSDM1_CHANNEL_NUMBER)
  2218. {
  2219. /* Check if flag is set and corresponding channel is enabled */
  2220. if(((reg & 1) != 0) && (a_dfsdm1ChannelHandle[channel] != NULL))
  2221. {
  2222. /* Check clock absence has been enabled for this channel */
  2223. if((a_dfsdm1ChannelHandle[channel]->Instance->CHCFGR1 & DFSDM_CHCFGR1_CKABEN) != 0)
  2224. {
  2225. /* Clear clock absence flag */
  2226. hdfsdm_filter->Instance->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
  2227. /* Call clock absence callback */
  2228. HAL_DFSDM_ChannelCkabCallback(a_dfsdm1ChannelHandle[channel]);
  2229. }
  2230. }
  2231. channel++;
  2232. reg = reg >> 1;
  2233. }
  2234. }
  2235. /* Check if short circuit detection occurs */
  2236. else if((hdfsdm_filter->Instance == DFSDM1_Filter0) && \
  2237. ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) != 0) && \
  2238. ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_SCDIE) != 0))
  2239. {
  2240. uint32_t reg = 0;
  2241. uint32_t channel = 0;
  2242. /* Get channel */
  2243. reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) >> DFSDM_FLTISR_SCDF_Pos);
  2244. while((reg & 1) == 0)
  2245. {
  2246. channel++;
  2247. reg = reg >> 1;
  2248. }
  2249. /* Clear short circuit detection flag */
  2250. hdfsdm_filter->Instance->FLTICR = (1 << (DFSDM_FLTICR_CLRSCSDF_Pos + channel));
  2251. /* Call short circuit detection callback */
  2252. HAL_DFSDM_ChannelScdCallback(a_dfsdm1ChannelHandle[channel]);
  2253. }
  2254. }
  2255. /**
  2256. * @brief Regular conversion complete callback.
  2257. * @note In interrupt mode, user has to read conversion value in this function
  2258. * using HAL_DFSDM_FilterGetRegularValue.
  2259. * @param hdfsdm_filter DFSDM filter handle.
  2260. * @retval None
  2261. */
  2262. __weak void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2263. {
  2264. /* Prevent unused argument(s) compilation warning */
  2265. UNUSED(hdfsdm_filter);
  2266. /* NOTE : This function should not be modified, when the callback is needed,
  2267. the HAL_DFSDM_FilterRegConvCpltCallback could be implemented in the user file.
  2268. */
  2269. }
  2270. /**
  2271. * @brief Half regular conversion complete callback.
  2272. * @param hdfsdm_filter DFSDM filter handle.
  2273. * @retval None
  2274. */
  2275. __weak void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2276. {
  2277. /* Prevent unused argument(s) compilation warning */
  2278. UNUSED(hdfsdm_filter);
  2279. /* NOTE : This function should not be modified, when the callback is needed,
  2280. the HAL_DFSDM_FilterRegConvHalfCpltCallback could be implemented in the user file.
  2281. */
  2282. }
  2283. /**
  2284. * @brief Injected conversion complete callback.
  2285. * @note In interrupt mode, user has to read conversion value in this function
  2286. * using HAL_DFSDM_FilterGetInjectedValue.
  2287. * @param hdfsdm_filter DFSDM filter handle.
  2288. * @retval None
  2289. */
  2290. __weak void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2291. {
  2292. /* Prevent unused argument(s) compilation warning */
  2293. UNUSED(hdfsdm_filter);
  2294. /* NOTE : This function should not be modified, when the callback is needed,
  2295. the HAL_DFSDM_FilterInjConvCpltCallback could be implemented in the user file.
  2296. */
  2297. }
  2298. /**
  2299. * @brief Half injected conversion complete callback.
  2300. * @param hdfsdm_filter DFSDM filter handle.
  2301. * @retval None
  2302. */
  2303. __weak void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2304. {
  2305. /* Prevent unused argument(s) compilation warning */
  2306. UNUSED(hdfsdm_filter);
  2307. /* NOTE : This function should not be modified, when the callback is needed,
  2308. the HAL_DFSDM_FilterInjConvHalfCpltCallback could be implemented in the user file.
  2309. */
  2310. }
  2311. /**
  2312. * @brief Filter analog watchdog callback.
  2313. * @param hdfsdm_filter DFSDM filter handle.
  2314. * @param Channel Corresponding channel.
  2315. * @param Threshold Low or high threshold has been reached.
  2316. * @retval None
  2317. */
  2318. __weak void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
  2319. uint32_t Channel, uint32_t Threshold)
  2320. {
  2321. /* Prevent unused argument(s) compilation warning */
  2322. UNUSED(hdfsdm_filter);
  2323. UNUSED(Channel);
  2324. UNUSED(Threshold);
  2325. /* NOTE : This function should not be modified, when the callback is needed,
  2326. the HAL_DFSDM_FilterAwdCallback could be implemented in the user file.
  2327. */
  2328. }
  2329. /**
  2330. * @brief Error callback.
  2331. * @param hdfsdm_filter DFSDM filter handle.
  2332. * @retval None
  2333. */
  2334. __weak void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2335. {
  2336. /* Prevent unused argument(s) compilation warning */
  2337. UNUSED(hdfsdm_filter);
  2338. /* NOTE : This function should not be modified, when the callback is needed,
  2339. the HAL_DFSDM_FilterErrorCallback could be implemented in the user file.
  2340. */
  2341. }
  2342. /**
  2343. * @}
  2344. */
  2345. /** @defgroup DFSDM_Exported_Functions_Group4_Filter Filter state functions
  2346. * @brief Filter state functions
  2347. *
  2348. @verbatim
  2349. ==============================================================================
  2350. ##### Filter state functions #####
  2351. ==============================================================================
  2352. [..] This section provides functions allowing to:
  2353. (+) Get the DFSDM filter state.
  2354. (+) Get the DFSDM filter error.
  2355. @endverbatim
  2356. * @{
  2357. */
  2358. /**
  2359. * @brief This function allows to get the current DFSDM filter handle state.
  2360. * @param hdfsdm_filter DFSDM filter handle.
  2361. * @retval DFSDM filter state.
  2362. */
  2363. HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2364. {
  2365. /* Return DFSDM filter handle state */
  2366. return hdfsdm_filter->State;
  2367. }
  2368. /**
  2369. * @brief This function allows to get the current DFSDM filter error.
  2370. * @param hdfsdm_filter DFSDM filter handle.
  2371. * @retval DFSDM filter error code.
  2372. */
  2373. uint32_t HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
  2374. {
  2375. return hdfsdm_filter->ErrorCode;
  2376. }
  2377. /**
  2378. * @}
  2379. */
  2380. /**
  2381. * @}
  2382. */
  2383. /* End of exported functions -------------------------------------------------*/
  2384. /* Private functions ---------------------------------------------------------*/
  2385. /** @addtogroup DFSDM_Private_Functions DFSDM Private Functions
  2386. * @{
  2387. */
  2388. /**
  2389. * @brief DMA half transfer complete callback for regular conversion.
  2390. * @param hdma DMA handle.
  2391. * @retval None
  2392. */
  2393. static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma)
  2394. {
  2395. /* Get DFSDM filter handle */
  2396. DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
  2397. /* Call regular half conversion complete callback */
  2398. HAL_DFSDM_FilterRegConvHalfCpltCallback(hdfsdm_filter);
  2399. }
  2400. /**
  2401. * @brief DMA transfer complete callback for regular conversion.
  2402. * @param hdma DMA handle.
  2403. * @retval None
  2404. */
  2405. static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma)
  2406. {
  2407. /* Get DFSDM filter handle */
  2408. DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
  2409. /* Call regular conversion complete callback */
  2410. HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
  2411. }
  2412. /**
  2413. * @brief DMA half transfer complete callback for injected conversion.
  2414. * @param hdma DMA handle.
  2415. * @retval None
  2416. */
  2417. static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma)
  2418. {
  2419. /* Get DFSDM filter handle */
  2420. DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
  2421. /* Call injected half conversion complete callback */
  2422. HAL_DFSDM_FilterInjConvHalfCpltCallback(hdfsdm_filter);
  2423. }
  2424. /**
  2425. * @brief DMA transfer complete callback for injected conversion.
  2426. * @param hdma DMA handle.
  2427. * @retval None
  2428. */
  2429. static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma)
  2430. {
  2431. /* Get DFSDM filter handle */
  2432. DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
  2433. /* Call injected conversion complete callback */
  2434. HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
  2435. }
  2436. /**
  2437. * @brief DMA error callback.
  2438. * @param hdma DMA handle.
  2439. * @retval None
  2440. */
  2441. static void DFSDM_DMAError(DMA_HandleTypeDef *hdma)
  2442. {
  2443. /* Get DFSDM filter handle */
  2444. DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
  2445. /* Update error code */
  2446. hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_DMA;
  2447. /* Call error callback */
  2448. HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
  2449. }
  2450. /**
  2451. * @brief This function allows to get the number of injected channels.
  2452. * @param Channels bitfield of injected channels.
  2453. * @retval Number of injected channels.
  2454. */
  2455. static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels)
  2456. {
  2457. uint32_t nbChannels = 0;
  2458. uint32_t tmp;
  2459. /* Get the number of channels from bitfield */
  2460. tmp = (uint32_t) (Channels & DFSDM_LSB_MASK);
  2461. while(tmp != 0)
  2462. {
  2463. if((tmp & 1) != 0)
  2464. {
  2465. nbChannels++;
  2466. }
  2467. tmp = (uint32_t) (tmp >> 1);
  2468. }
  2469. return nbChannels;
  2470. }
  2471. /**
  2472. * @brief This function allows to get the channel number from channel instance.
  2473. * @param Instance DFSDM channel instance.
  2474. * @retval Channel number.
  2475. */
  2476. static uint32_t DFSDM_GetChannelFromInstance(DFSDM_Channel_TypeDef* Instance)
  2477. {
  2478. uint32_t channel = 0xFF;
  2479. /* Get channel from instance */
  2480. if(Instance == DFSDM1_Channel0)
  2481. {
  2482. channel = 0;
  2483. }
  2484. else if(Instance == DFSDM1_Channel1)
  2485. {
  2486. channel = 1;
  2487. }
  2488. else if(Instance == DFSDM1_Channel2)
  2489. {
  2490. channel = 2;
  2491. }
  2492. else if(Instance == DFSDM1_Channel3)
  2493. {
  2494. channel = 3;
  2495. }
  2496. #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \
  2497. defined(STM32L496xx) || defined(STM32L4A6xx) || \
  2498. defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
  2499. else if(Instance == DFSDM1_Channel4)
  2500. {
  2501. channel = 4;
  2502. }
  2503. else if(Instance == DFSDM1_Channel5)
  2504. {
  2505. channel = 5;
  2506. }
  2507. else if(Instance == DFSDM1_Channel6)
  2508. {
  2509. channel = 6;
  2510. }
  2511. else if(Instance == DFSDM1_Channel7)
  2512. {
  2513. channel = 7;
  2514. }
  2515. #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || STM32L496xx || STM32L4A6xx || STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
  2516. return channel;
  2517. }
  2518. /**
  2519. * @brief This function allows to really start regular conversion.
  2520. * @param hdfsdm_filter DFSDM filter handle.
  2521. * @retval None
  2522. */
  2523. static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
  2524. {
  2525. /* Check regular trigger */
  2526. if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER)
  2527. {
  2528. /* Software start of regular conversion */
  2529. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
  2530. }
  2531. else /* synchronous trigger */
  2532. {
  2533. /* Disable DFSDM filter */
  2534. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
  2535. /* Set RSYNC bit in DFSDM_FLTCR1 register */
  2536. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSYNC;
  2537. /* Enable DFSDM filter */
  2538. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
  2539. /* If injected conversion was in progress, restart it */
  2540. if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ)
  2541. {
  2542. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
  2543. {
  2544. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
  2545. }
  2546. /* Update remaining injected conversions */
  2547. hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
  2548. hdfsdm_filter->InjectedChannelsNbr : 1;
  2549. }
  2550. }
  2551. /* Update DFSDM filter state */
  2552. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
  2553. HAL_DFSDM_FILTER_STATE_REG : HAL_DFSDM_FILTER_STATE_REG_INJ;
  2554. }
  2555. /**
  2556. * @brief This function allows to really stop regular conversion.
  2557. * @param hdfsdm_filter DFSDM filter handle.
  2558. * @retval None
  2559. */
  2560. static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
  2561. {
  2562. /* Disable DFSDM filter */
  2563. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
  2564. /* If regular trigger was synchronous, reset RSYNC bit in DFSDM_FLTCR1 register */
  2565. if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SYNC_TRIGGER)
  2566. {
  2567. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
  2568. }
  2569. /* Enable DFSDM filter */
  2570. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
  2571. /* If injected conversion was in progress, restart it */
  2572. if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ)
  2573. {
  2574. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
  2575. {
  2576. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
  2577. }
  2578. /* Update remaining injected conversions */
  2579. hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
  2580. hdfsdm_filter->InjectedChannelsNbr : 1;
  2581. }
  2582. /* Update DFSDM filter state */
  2583. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
  2584. HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
  2585. }
  2586. /**
  2587. * @brief This function allows to really start injected conversion.
  2588. * @param hdfsdm_filter DFSDM filter handle.
  2589. * @retval None
  2590. */
  2591. static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
  2592. {
  2593. /* Check injected trigger */
  2594. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
  2595. {
  2596. /* Software start of injected conversion */
  2597. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
  2598. }
  2599. else /* external or synchronous trigger */
  2600. {
  2601. /* Disable DFSDM filter */
  2602. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
  2603. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
  2604. {
  2605. /* Set JSYNC bit in DFSDM_FLTCR1 register */
  2606. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSYNC;
  2607. }
  2608. else /* external trigger */
  2609. {
  2610. /* Set JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
  2611. hdfsdm_filter->Instance->FLTCR1 |= hdfsdm_filter->ExtTriggerEdge;
  2612. }
  2613. /* Enable DFSDM filter */
  2614. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
  2615. /* If regular conversion was in progress, restart it */
  2616. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) && \
  2617. (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
  2618. {
  2619. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
  2620. }
  2621. }
  2622. /* Update DFSDM filter state */
  2623. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
  2624. HAL_DFSDM_FILTER_STATE_INJ : HAL_DFSDM_FILTER_STATE_REG_INJ;
  2625. }
  2626. /**
  2627. * @brief This function allows to really stop injected conversion.
  2628. * @param hdfsdm_filter DFSDM filter handle.
  2629. * @retval None
  2630. */
  2631. static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
  2632. {
  2633. /* Disable DFSDM filter */
  2634. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
  2635. /* If injected trigger was synchronous, reset JSYNC bit in DFSDM_FLTCR1 register */
  2636. if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
  2637. {
  2638. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC);
  2639. }
  2640. else if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_EXT_TRIGGER)
  2641. {
  2642. /* Reset JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
  2643. hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JEXTEN);
  2644. }
  2645. /* Enable DFSDM filter */
  2646. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
  2647. /* If regular conversion was in progress, restart it */
  2648. if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ) && \
  2649. (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
  2650. {
  2651. hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
  2652. }
  2653. /* Update remaining injected conversions */
  2654. hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
  2655. hdfsdm_filter->InjectedChannelsNbr : 1;
  2656. /* Update DFSDM filter state */
  2657. hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
  2658. HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
  2659. }
  2660. /**
  2661. * @}
  2662. */
  2663. /* End of private functions --------------------------------------------------*/
  2664. /**
  2665. * @}
  2666. */
  2667. #endif /* STM32L451xx || STM32L452xx || STM32L462xx || STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || STM32L496xx || STM32L4A6xx || STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
  2668. #endif /* HAL_DFSDM_MODULE_ENABLED */
  2669. /**
  2670. * @}
  2671. */
  2672. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/