HardwareSerial.cpp 7.6 KB

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  1. /*
  2. HardwareSerial.cpp - Hardware serial library for Wiring
  3. Copyright (c) 2006 Nicholas Zambetti. All right reserved.
  4. This library is free software; you can redistribute it and/or
  5. modify it under the terms of the GNU Lesser General Public
  6. License as published by the Free Software Foundation; either
  7. version 2.1 of the License, or (at your option) any later version.
  8. This library is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  11. Lesser General Public License for more details.
  12. You should have received a copy of the GNU Lesser General Public
  13. License along with this library; if not, write to the Free Software
  14. Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  15. Modified 23 November 2006 by David A. Mellis
  16. Modified 28 September 2010 by Mark Sproul
  17. Modified 14 August 2012 by Alarus
  18. Modified 3 December 2013 by Matthijs Kooijman
  19. */
  20. #include <stdlib.h>
  21. #include <stdio.h>
  22. #include <string.h>
  23. #include <inttypes.h>
  24. #include "Arduino.h"
  25. #include "HardwareSerial.h"
  26. #include "HardwareSerial_private.h"
  27. // this next line disables the entire HardwareSerial.cpp,
  28. // this is so I can support Attiny series and any other chip without a uart
  29. #if defined(HAVE_HWSERIAL0) || defined(HAVE_HWSERIAL1) || defined(HAVE_HWSERIAL2) || defined(HAVE_HWSERIAL3)
  30. // SerialEvent functions are weak, so when the user doesn't define them,
  31. // the linker just sets their address to 0 (which is checked below).
  32. // The Serialx_available is just a wrapper around Serialx.available(),
  33. // but we can refer to it weakly so we don't pull in the entire
  34. // HardwareSerial instance if the user doesn't also refer to it.
  35. #if defined(HAVE_HWSERIAL0)
  36. void serialEvent() __attribute__((weak));
  37. bool Serial0_available() __attribute__((weak));
  38. #endif
  39. #if defined(HAVE_HWSERIAL1)
  40. void serialEvent1() __attribute__((weak));
  41. bool Serial1_available() __attribute__((weak));
  42. #endif
  43. #if defined(HAVE_HWSERIAL2)
  44. void serialEvent2() __attribute__((weak));
  45. bool Serial2_available() __attribute__((weak));
  46. #endif
  47. #if defined(HAVE_HWSERIAL3)
  48. void serialEvent3() __attribute__((weak));
  49. bool Serial3_available() __attribute__((weak));
  50. #endif
  51. void serialEventRun(void)
  52. {
  53. #if defined(HAVE_HWSERIAL0)
  54. if (Serial0_available && serialEvent && Serial0_available()) serialEvent();
  55. #endif
  56. #if defined(HAVE_HWSERIAL1)
  57. if (Serial1_available && serialEvent1 && Serial1_available()) serialEvent1();
  58. #endif
  59. #if defined(HAVE_HWSERIAL2)
  60. if (Serial2_available && serialEvent2 && Serial2_available()) serialEvent2();
  61. #endif
  62. #if defined(HAVE_HWSERIAL3)
  63. if (Serial3_available && serialEvent3 && Serial3_available()) serialEvent3();
  64. #endif
  65. }
  66. // Actual interrupt handlers //////////////////////////////////////////////////////////////
  67. void HardwareSerial::_tx_udr_empty_irq(void)
  68. {
  69. // If interrupts are enabled, there must be more data in the output
  70. // buffer. Send the next byte
  71. unsigned char c = _tx_buffer[_tx_buffer_tail];
  72. _tx_buffer_tail = (_tx_buffer_tail + 1) % SERIAL_TX_BUFFER_SIZE;
  73. *_udr = c;
  74. // clear the TXC bit -- "can be cleared by writing a one to its bit
  75. // location". This makes sure flush() won't return until the bytes
  76. // actually got written
  77. sbi(*_ucsra, TXC0);
  78. if (_tx_buffer_head == _tx_buffer_tail) {
  79. // Buffer empty, so disable interrupts
  80. cbi(*_ucsrb, UDRIE0);
  81. }
  82. }
  83. // Public Methods //////////////////////////////////////////////////////////////
  84. void HardwareSerial::begin(unsigned long baud, byte config)
  85. {
  86. // Try u2x mode first
  87. uint16_t baud_setting = (F_CPU / 4 / baud - 1) / 2;
  88. *_ucsra = 1 << U2X0;
  89. // hardcoded exception for 57600 for compatibility with the bootloader
  90. // shipped with the Duemilanove and previous boards and the firmware
  91. // on the 8U2 on the Uno and Mega 2560. Also, The baud_setting cannot
  92. // be > 4095, so switch back to non-u2x mode if the baud rate is too
  93. // low.
  94. if (((F_CPU == 16000000UL) && (baud == 57600)) || (baud_setting >4095))
  95. {
  96. *_ucsra = 0;
  97. baud_setting = (F_CPU / 8 / baud - 1) / 2;
  98. }
  99. // assign the baud_setting, a.k.a. ubrr (USART Baud Rate Register)
  100. *_ubrrh = baud_setting >> 8;
  101. *_ubrrl = baud_setting;
  102. _written = false;
  103. //set the data bits, parity, and stop bits
  104. #if defined(__AVR_ATmega8__)
  105. config |= 0x80; // select UCSRC register (shared with UBRRH)
  106. #endif
  107. *_ucsrc = config;
  108. sbi(*_ucsrb, RXEN0);
  109. sbi(*_ucsrb, TXEN0);
  110. sbi(*_ucsrb, RXCIE0);
  111. cbi(*_ucsrb, UDRIE0);
  112. }
  113. void HardwareSerial::end()
  114. {
  115. // wait for transmission of outgoing data
  116. while (_tx_buffer_head != _tx_buffer_tail)
  117. ;
  118. cbi(*_ucsrb, RXEN0);
  119. cbi(*_ucsrb, TXEN0);
  120. cbi(*_ucsrb, RXCIE0);
  121. cbi(*_ucsrb, UDRIE0);
  122. // clear any received data
  123. _rx_buffer_head = _rx_buffer_tail;
  124. }
  125. int HardwareSerial::available(void)
  126. {
  127. return ((unsigned int)(SERIAL_RX_BUFFER_SIZE + _rx_buffer_head - _rx_buffer_tail)) % SERIAL_RX_BUFFER_SIZE;
  128. }
  129. int HardwareSerial::peek(void)
  130. {
  131. if (_rx_buffer_head == _rx_buffer_tail) {
  132. return -1;
  133. } else {
  134. return _rx_buffer[_rx_buffer_tail];
  135. }
  136. }
  137. int HardwareSerial::read(void)
  138. {
  139. // if the head isn't ahead of the tail, we don't have any characters
  140. if (_rx_buffer_head == _rx_buffer_tail) {
  141. return -1;
  142. } else {
  143. unsigned char c = _rx_buffer[_rx_buffer_tail];
  144. _rx_buffer_tail = (rx_buffer_index_t)(_rx_buffer_tail + 1) % SERIAL_RX_BUFFER_SIZE;
  145. return c;
  146. }
  147. }
  148. int HardwareSerial::availableForWrite(void)
  149. {
  150. #if (SERIAL_TX_BUFFER_SIZE>256)
  151. uint8_t oldSREG = SREG;
  152. cli();
  153. #endif
  154. tx_buffer_index_t head = _tx_buffer_head;
  155. tx_buffer_index_t tail = _tx_buffer_tail;
  156. #if (SERIAL_TX_BUFFER_SIZE>256)
  157. SREG = oldSREG;
  158. #endif
  159. if (head >= tail) return SERIAL_TX_BUFFER_SIZE - 1 - head + tail;
  160. return tail - head - 1;
  161. }
  162. void HardwareSerial::flush()
  163. {
  164. // If we have never written a byte, no need to flush. This special
  165. // case is needed since there is no way to force the TXC (transmit
  166. // complete) bit to 1 during initialization
  167. if (!_written)
  168. return;
  169. while (bit_is_set(*_ucsrb, UDRIE0) || bit_is_clear(*_ucsra, TXC0)) {
  170. if (bit_is_clear(SREG, SREG_I) && bit_is_set(*_ucsrb, UDRIE0))
  171. // Interrupts are globally disabled, but the DR empty
  172. // interrupt should be enabled, so poll the DR empty flag to
  173. // prevent deadlock
  174. if (bit_is_set(*_ucsra, UDRE0))
  175. _tx_udr_empty_irq();
  176. }
  177. // If we get here, nothing is queued anymore (DRIE is disabled) and
  178. // the hardware finished tranmission (TXC is set).
  179. }
  180. size_t HardwareSerial::write(uint8_t c)
  181. {
  182. // If the buffer and the data register is empty, just write the byte
  183. // to the data register and be done. This shortcut helps
  184. // significantly improve the effective datarate at high (>
  185. // 500kbit/s) bitrates, where interrupt overhead becomes a slowdown.
  186. if (_tx_buffer_head == _tx_buffer_tail && bit_is_set(*_ucsra, UDRE0)) {
  187. *_udr = c;
  188. sbi(*_ucsra, TXC0);
  189. return 1;
  190. }
  191. tx_buffer_index_t i = (_tx_buffer_head + 1) % SERIAL_TX_BUFFER_SIZE;
  192. // If the output buffer is full, there's nothing for it other than to
  193. // wait for the interrupt handler to empty it a bit
  194. while (i == _tx_buffer_tail) {
  195. if (bit_is_clear(SREG, SREG_I)) {
  196. // Interrupts are disabled, so we'll have to poll the data
  197. // register empty flag ourselves. If it is set, pretend an
  198. // interrupt has happened and call the handler to free up
  199. // space for us.
  200. if(bit_is_set(*_ucsra, UDRE0))
  201. _tx_udr_empty_irq();
  202. } else {
  203. // nop, the interrupt handler will free up space for us
  204. }
  205. }
  206. _tx_buffer[_tx_buffer_head] = c;
  207. _tx_buffer_head = i;
  208. sbi(*_ucsrb, UDRIE0);
  209. _written = true;
  210. return 1;
  211. }
  212. #endif // whole file