u8g_com_atmega_st7920_hw_spi.c 5.7 KB

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  1. /*
  2. u8g_com_atmega_st7920_hw_spi.c
  3. Universal 8bit Graphics Library
  4. Copyright (c) 2011, olikraus@gmail.com
  5. All rights reserved.
  6. Redistribution and use in source and binary forms, with or without modification,
  7. are permitted provided that the following conditions are met:
  8. * Redistributions of source code must retain the above copyright notice, this list
  9. of conditions and the following disclaimer.
  10. * Redistributions in binary form must reproduce the above copyright notice, this
  11. list of conditions and the following disclaimer in the documentation and/or other
  12. materials provided with the distribution.
  13. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
  14. CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
  15. INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  16. MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  17. DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
  18. CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  19. SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  20. NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  21. LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  22. CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  23. STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  24. ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
  25. ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  26. A special SPI interface for ST7920 controller with HW SPI Support
  27. Assumes, that
  28. MOSI is at PORTB, Pin 3
  29. and
  30. SCK is at PORTB, Pin 5
  31. Update for ATOMIC operation done (01 Jun 2013)
  32. U8G_ATOMIC_OR(ptr, val)
  33. U8G_ATOMIC_AND(ptr, val)
  34. U8G_ATOMIC_START()
  35. U8G_ATOMIC_END()
  36. */
  37. #include "u8g.h"
  38. #if defined(__AVR__)
  39. #define U8G_ATMEGA_HW_SPI
  40. /* remove the definition for attiny */
  41. #if __AVR_ARCH__ == 2
  42. #undef U8G_ATMEGA_HW_SPI
  43. #endif
  44. #if __AVR_ARCH__ == 25
  45. #undef U8G_ATMEGA_HW_SPI
  46. #endif
  47. #endif
  48. #if defined(U8G_ATMEGA_HW_SPI)
  49. #include <avr/interrupt.h>
  50. #include <avr/io.h>
  51. static uint8_t u8g_atmega_st7920_hw_spi_shift_out(u8g_t *u8g, uint8_t val) U8G_NOINLINE;
  52. static uint8_t u8g_atmega_st7920_hw_spi_shift_out(u8g_t *u8g, uint8_t val)
  53. {
  54. /* send data */
  55. SPDR = val;
  56. /* wait for transmission */
  57. while (!(SPSR & (1<<SPIF)))
  58. ;
  59. /* clear the SPIF flag by reading SPDR */
  60. return SPDR;
  61. }
  62. static void u8g_com_atmega_st7920_write_byte_hw_spi(u8g_t *u8g, uint8_t rs, uint8_t val) U8G_NOINLINE;
  63. static void u8g_com_atmega_st7920_write_byte_hw_spi(u8g_t *u8g, uint8_t rs, uint8_t val)
  64. {
  65. uint8_t i;
  66. if ( rs == 0 )
  67. {
  68. /* command */
  69. u8g_atmega_st7920_hw_spi_shift_out(u8g, 0x0f8);
  70. }
  71. else if ( rs == 1 )
  72. {
  73. /* data */
  74. u8g_atmega_st7920_hw_spi_shift_out(u8g, 0x0fa);
  75. }
  76. u8g_atmega_st7920_hw_spi_shift_out(u8g, val & 0x0f0);
  77. u8g_atmega_st7920_hw_spi_shift_out(u8g, val << 4);
  78. for( i = 0; i < 4; i++ )
  79. u8g_10MicroDelay();
  80. }
  81. uint8_t u8g_com_atmega_st7920_hw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr)
  82. {
  83. switch(msg)
  84. {
  85. case U8G_COM_MSG_INIT:
  86. u8g_SetPIOutput(u8g, U8G_PI_CS);
  87. //u8g_SetPIOutput(u8g, U8G_PI_A0);
  88. U8G_ATOMIC_START();
  89. DDRB |= _BV(3); /* D0, MOSI */
  90. DDRB |= _BV(5); /* SCK */
  91. DDRB |= _BV(2); /* slave select */
  92. PORTB &= ~_BV(3); /* D0, MOSI = 0 */
  93. PORTB &= ~_BV(5); /* SCK = 0 */
  94. U8G_ATOMIC_END();
  95. u8g_SetPILevel(u8g, U8G_PI_CS, 1);
  96. /*
  97. SPR1 SPR0
  98. 0 0 fclk/4
  99. 0 1 fclk/16
  100. 1 0 fclk/64
  101. 1 1 fclk/128
  102. */
  103. SPCR = 0;
  104. /* maybe set CPOL and CPHA to 1 */
  105. /* 20 Dez 2012: did set CPOL and CPHA to 1 in Arduino variant! */
  106. /* 24 Jan 2014: implemented, see also issue 221 */
  107. SPCR = (1<<SPE) | (1<<MSTR)|(0<<SPR1)|(0<<SPR0)|(1<<CPOL)|(1<<CPHA);
  108. #ifdef U8G_HW_SPI_2X
  109. SPSR = (1 << SPI2X); /* double speed, issue 89 */
  110. #endif
  111. u8g->pin_list[U8G_PI_A0_STATE] = 0; /* inital RS state: command mode */
  112. break;
  113. case U8G_COM_MSG_STOP:
  114. break;
  115. case U8G_COM_MSG_RESET:
  116. u8g_SetPILevel(u8g, U8G_PI_RESET, arg_val);
  117. break;
  118. case U8G_COM_MSG_ADDRESS: /* define cmd (arg_val = 0) or data mode (arg_val = 1) */
  119. u8g->pin_list[U8G_PI_A0_STATE] = arg_val;
  120. break;
  121. case U8G_COM_MSG_CHIP_SELECT:
  122. if ( arg_val == 0 )
  123. {
  124. /* disable, note: the st7920 has an active high chip select */
  125. u8g_SetPILevel(u8g, U8G_PI_CS, 0);
  126. }
  127. else
  128. {
  129. /* u8g_SetPILevel(u8g, U8G_PI_SCK, 0 ); */
  130. /* enable */
  131. u8g_SetPILevel(u8g, U8G_PI_CS, 1); /* CS = 1 (high active) */
  132. }
  133. break;
  134. case U8G_COM_MSG_WRITE_BYTE:
  135. u8g_com_atmega_st7920_write_byte_hw_spi(u8g, u8g->pin_list[U8G_PI_A0_STATE], arg_val);
  136. //u8g->pin_list[U8G_PI_A0_STATE] = 2;
  137. break;
  138. case U8G_COM_MSG_WRITE_SEQ:
  139. {
  140. register uint8_t *ptr = arg_ptr;
  141. while( arg_val > 0 )
  142. {
  143. u8g_com_atmega_st7920_write_byte_hw_spi(u8g, u8g->pin_list[U8G_PI_A0_STATE], *ptr++);
  144. //u8g->pin_list[U8G_PI_A0_STATE] = 2;
  145. arg_val--;
  146. }
  147. }
  148. break;
  149. case U8G_COM_MSG_WRITE_SEQ_P:
  150. {
  151. register uint8_t *ptr = arg_ptr;
  152. while( arg_val > 0 )
  153. {
  154. u8g_com_atmega_st7920_write_byte_hw_spi(u8g, u8g->pin_list[U8G_PI_A0_STATE], u8g_pgm_read(ptr));
  155. //u8g->pin_list[U8G_PI_A0_STATE] = 2;
  156. ptr++;
  157. arg_val--;
  158. }
  159. }
  160. break;
  161. }
  162. return 1;
  163. }
  164. #else
  165. uint8_t u8g_com_atmega_st7920_hw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr)
  166. {
  167. return 1;
  168. }
  169. #endif