u8g_dev_pcd8544_84x48.c 5.6 KB

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  1. /*
  2. u8g_dev_pcd8544_84x48.c
  3. Display: Nokia 84x48
  4. Status: Tested with PCF8812 Display
  5. Universal 8bit Graphics Library
  6. Copyright (c) 2011, olikraus@gmail.com
  7. All rights reserved.
  8. Redistribution and use in source and binary forms, with or without modification,
  9. are permitted provided that the following conditions are met:
  10. * Redistributions of source code must retain the above copyright notice, this list
  11. of conditions and the following disclaimer.
  12. * Redistributions in binary form must reproduce the above copyright notice, this
  13. list of conditions and the following disclaimer in the documentation and/or other
  14. materials provided with the distribution.
  15. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
  16. CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
  17. INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  18. MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  19. DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
  20. CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21. SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22. NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  23. LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  24. CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  25. STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  26. ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
  27. ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28. */
  29. #include "u8g.h"
  30. #define WIDTH 84
  31. #define HEIGHT 48
  32. #define PAGE_HEIGHT 8
  33. static const uint8_t u8g_dev_pcd8544_init_seq[] PROGMEM = {
  34. U8G_ESC_CS(0), /* disable chip */
  35. U8G_ESC_ADR(0), /* instruction mode */
  36. U8G_ESC_RST(1), /* do reset low pulse with (1*16)+2 milliseconds */
  37. U8G_ESC_CS(1), /* enable chip */
  38. 0x021, /* activate chip (PD=0), horizontal increment (V=0), enter extended command set (H=1) */
  39. 0x006, /* temp. control: b10 = 2 */
  40. 0x013, /* bias system 1:48 */
  41. 0x0c0, /* medium Vop */
  42. 0x020, /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
  43. 0x00c, /* display on, normal operation */
  44. U8G_ESC_DLY(100), /* delay 100 ms */
  45. 0x020, /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
  46. 0x00d, /* display on, invert */
  47. U8G_ESC_DLY(100), /* delay 100 ms */
  48. U8G_ESC_DLY(100), /* delay 100 ms */
  49. 0x020, /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
  50. 0x00c, /* display on, normal */
  51. U8G_ESC_DLY(100), /* delay 100 ms */
  52. U8G_ESC_CS(0), /* disable chip */
  53. U8G_ESC_END /* end of sequence */
  54. };
  55. static const uint8_t u8g_dev_pcd8544_sleep_on[] PROGMEM = {
  56. U8G_ESC_ADR(0), /* instruction mode */
  57. U8G_ESC_CS(1), /* enable chip */
  58. 0x020, /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
  59. 0x00c, /* display on, normal */
  60. U8G_ESC_CS(0), /* disable chip, bugfix 12 nov 2014 */
  61. U8G_ESC_END /* end of sequence */
  62. };
  63. static const uint8_t u8g_dev_pcd8544_sleep_off[] PROGMEM = {
  64. U8G_ESC_ADR(0), /* instruction mode */
  65. U8G_ESC_CS(1), /* enable chip */
  66. 0x020, /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
  67. 0x008, /* display blank */
  68. 0x024, /* power down (PD=1), horizontal increment (V=0), enter normal command set (H=0) */
  69. U8G_ESC_DLY(50), /* delay 50 ms */
  70. U8G_ESC_CS(0), /* disable chip, bugfix 12 nov 2014 */
  71. U8G_ESC_END /* end of sequence */
  72. };
  73. uint8_t u8g_dev_pcd8544_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
  74. {
  75. switch(msg)
  76. {
  77. case U8G_DEV_MSG_INIT:
  78. u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
  79. u8g_WriteEscSeqP(u8g, dev, u8g_dev_pcd8544_init_seq);
  80. break;
  81. case U8G_DEV_MSG_STOP:
  82. break;
  83. case U8G_DEV_MSG_PAGE_NEXT:
  84. {
  85. u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
  86. u8g_SetAddress(u8g, dev, 0); /* command mode */
  87. u8g_SetChipSelect(u8g, dev, 1);
  88. u8g_WriteByte(u8g, dev, 0x020 ); /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
  89. u8g_WriteByte(u8g, dev, 0x080 ); /* set X address */
  90. u8g_WriteByte(u8g, dev, 0x040 | pb->p.page); /* set Y address */
  91. u8g_SetAddress(u8g, dev, 1); /* data mode */
  92. if ( u8g_pb_WriteBuffer(pb, u8g, dev) == 0 )
  93. return 0;
  94. u8g_SetChipSelect(u8g, dev, 0);
  95. }
  96. break;
  97. case U8G_DEV_MSG_CONTRAST:
  98. /* the contrast adjustment does not work, needs to be analysed */
  99. u8g_SetAddress(u8g, dev, 0); /* instruction mode */
  100. u8g_SetChipSelect(u8g, dev, 1);
  101. u8g_WriteByte(u8g, dev, 0x021); /* command mode, extended function set */
  102. u8g_WriteByte(u8g, dev, 0x080 | ( (*(uint8_t *)arg) >> 1 ) );
  103. u8g_SetChipSelect(u8g, dev, 0);
  104. return 1;
  105. case U8G_DEV_MSG_SLEEP_ON:
  106. u8g_WriteEscSeqP(u8g, dev, u8g_dev_pcd8544_sleep_on);
  107. return 1;
  108. case U8G_DEV_MSG_SLEEP_OFF:
  109. u8g_WriteEscSeqP(u8g, dev, u8g_dev_pcd8544_sleep_off);
  110. return 1;
  111. }
  112. return u8g_dev_pb8v1_base_fn(u8g, dev, msg, arg);
  113. }
  114. U8G_PB_DEV(u8g_dev_pcd8544_84x48_sw_spi , WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_pcd8544_fn, U8G_COM_SW_SPI);
  115. U8G_PB_DEV(u8g_dev_pcd8544_84x48_hw_spi , WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_pcd8544_fn, U8G_COM_HW_SPI);